diff options
Diffstat (limited to 'test/CodeGen/PowerPC/testComparesilesc.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/testComparesilesc.ll | 76 |
1 files changed, 68 insertions, 8 deletions
diff --git a/test/CodeGen/PowerPC/testComparesilesc.ll b/test/CodeGen/PowerPC/testComparesilesc.ll index c625dca9a0e1..94118d642eda 100644 --- a/test/CodeGen/PowerPC/testComparesilesc.ll +++ b/test/CodeGen/PowerPC/testComparesilesc.ll @@ -1,9 +1,9 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \ -; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ +; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-BE \ ; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \ -; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ +; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-LE \ ; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl @glob = common local_unnamed_addr global i8 0, align 1 @@ -14,6 +14,19 @@ define signext i32 @test_ilesc(i8 signext %a, i8 signext %b) { ; CHECK-NEXT: rldicl r3, r3, 1, 63 ; CHECK-NEXT: xori r3, r3, 1 ; CHECK-NEXT: blr +; CHECK-BE-LABEL: test_ilesc: +; CHECK-BE: # %bb.0: # %entry +; CHECK-BE-NEXT: sub r3, r4, r3 +; CHECK-BE-NEXT: rldicl r3, r3, 1, 63 +; CHECK-BE-NEXT: xori r3, r3, 1 +; CHECK-BE-NEXT: blr +; +; CHECK-LE-LABEL: test_ilesc: +; CHECK-LE: # %bb.0: # %entry +; CHECK-LE-NEXT: sub r3, r4, r3 +; CHECK-LE-NEXT: rldicl r3, r3, 1, 63 +; CHECK-LE-NEXT: xori r3, r3, 1 +; CHECK-LE-NEXT: blr entry: %cmp = icmp sle i8 %a, %b %conv2 = zext i1 %cmp to i32 @@ -27,6 +40,19 @@ define signext i32 @test_ilesc_sext(i8 signext %a, i8 signext %b) { ; CHECK-NEXT: rldicl r3, r3, 1, 63 ; CHECK-NEXT: addi r3, r3, -1 ; CHECK-NEXT: blr +; CHECK-BE-LABEL: test_ilesc_sext: +; CHECK-BE: # %bb.0: # %entry +; CHECK-BE-NEXT: sub r3, r4, r3 +; CHECK-BE-NEXT: rldicl r3, r3, 1, 63 +; CHECK-BE-NEXT: addi r3, r3, -1 +; CHECK-BE-NEXT: blr +; +; CHECK-LE-LABEL: test_ilesc_sext: +; CHECK-LE: # %bb.0: # %entry +; CHECK-LE-NEXT: sub r3, r4, r3 +; CHECK-LE-NEXT: rldicl r3, r3, 1, 63 +; CHECK-LE-NEXT: addi r3, r3, -1 +; CHECK-LE-NEXT: blr entry: %cmp = icmp sle i8 %a, %b %sub = sext i1 %cmp to i32 @@ -36,13 +62,30 @@ entry: define void @test_ilesc_store(i8 signext %a, i8 signext %b) { ; CHECK-LABEL: test_ilesc_store: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addis r5, r2, .LC0@toc@ha ; CHECK-NEXT: sub r3, r4, r3 -; CHECK-NEXT: ld r4, .LC0@toc@l(r5) +; CHECK-NEXT: addis r5, r2, glob@toc@ha ; CHECK-NEXT: rldicl r3, r3, 1, 63 ; CHECK-NEXT: xori r3, r3, 1 -; CHECK-NEXT: stb r3, 0(r4) +; CHECK-NEXT: stb r3, glob@toc@l(r5) ; CHECK-NEXT: blr +; CHECK-BE-LABEL: test_ilesc_store: +; CHECK-BE: # %bb.0: # %entry +; CHECK-BE-NEXT: addis r5, r2, .LC0@toc@ha +; CHECK-BE-NEXT: sub r3, r4, r3 +; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r5) +; CHECK-BE-NEXT: rldicl r3, r3, 1, 63 +; CHECK-BE-NEXT: xori r3, r3, 1 +; CHECK-BE-NEXT: stb r3, 0(r4) +; CHECK-BE-NEXT: blr +; +; CHECK-LE-LABEL: test_ilesc_store: +; CHECK-LE: # %bb.0: # %entry +; CHECK-LE-NEXT: sub r3, r4, r3 +; CHECK-LE-NEXT: addis r5, r2, glob@toc@ha +; CHECK-LE-NEXT: rldicl r3, r3, 1, 63 +; CHECK-LE-NEXT: xori r3, r3, 1 +; CHECK-LE-NEXT: stb r3, glob@toc@l(r5) +; CHECK-LE-NEXT: blr entry: %cmp = icmp sle i8 %a, %b %conv3 = zext i1 %cmp to i8 @@ -53,13 +96,30 @@ entry: define void @test_ilesc_sext_store(i8 signext %a, i8 signext %b) { ; CHECK-LABEL: test_ilesc_sext_store: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addis r5, r2, .LC0@toc@ha ; CHECK-NEXT: sub r3, r4, r3 -; CHECK-NEXT: ld r4, .LC0@toc@l(r5) +; CHECK-NEXT: addis r5, r2, glob@toc@ha ; CHECK-NEXT: rldicl r3, r3, 1, 63 ; CHECK-NEXT: addi r3, r3, -1 -; CHECK-NEXT: stb r3, 0(r4) +; CHECK-NEXT: stb r3, glob@toc@l(r5) ; CHECK-NEXT: blr +; CHECK-BE-LABEL: test_ilesc_sext_store: +; CHECK-BE: # %bb.0: # %entry +; CHECK-BE-NEXT: addis r5, r2, .LC0@toc@ha +; CHECK-BE-NEXT: sub r3, r4, r3 +; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r5) +; CHECK-BE-NEXT: rldicl r3, r3, 1, 63 +; CHECK-BE-NEXT: addi r3, r3, -1 +; CHECK-BE-NEXT: stb r3, 0(r4) +; CHECK-BE-NEXT: blr +; +; CHECK-LE-LABEL: test_ilesc_sext_store: +; CHECK-LE: # %bb.0: # %entry +; CHECK-LE-NEXT: sub r3, r4, r3 +; CHECK-LE-NEXT: addis r5, r2, glob@toc@ha +; CHECK-LE-NEXT: rldicl r3, r3, 1, 63 +; CHECK-LE-NEXT: addi r3, r3, -1 +; CHECK-LE-NEXT: stb r3, glob@toc@l(r5) +; CHECK-LE-NEXT: blr entry: %cmp = icmp sle i8 %a, %b %conv3 = sext i1 %cmp to i8 |