1 files changed, 179 insertions, 0 deletions
diff --git a/test/CodeGen/X86/GlobalISel/legalize-cmp.mir b/test/CodeGen/X86/GlobalISel/legalize-cmp.mir
new file mode 100644
index 000000000000..68ccbbba0a73
--- /dev/null
+++ b/test/CodeGen/X86/GlobalISel/legalize-cmp.mir
@@ -0,0 +1,179 @@
+# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=legalizer %s -o - | FileCheck %s
+
+--- |
+  define i32 @test_cmp_i8(i8 %a, i8 %b) {
+    %r = icmp ult i8 %a, %b
+    %res = zext i1 %r to i32
+    ret i32 %res
+  }
+
+  define i32 @test_cmp_i16(i16 %a, i16 %b) {
+    %r = icmp ult i16 %a, %b
+    %res = zext i1 %r to i32
+    ret i32 %res
+  }
+
+  define i32 @test_cmp_i32(i32 %a, i32 %b) {
+    %r = icmp ult i32 %a, %b
+    %res = zext i1 %r to i32
+    ret i32 %res
+  }
+
+  define i32 @test_cmp_i64(i64 %a, i64 %b) {
+    %r = icmp ult i64 %a, %b
+    %res = zext i1 %r to i32
+    ret i32 %res
+  }
+
+  define i32 @test_cmp_p0(i32* %a, i32* %b) {
+    %r = icmp ult i32* %a, %b
+    %res = zext i1 %r to i32
+    ret i32 %res
+  }
+
+...
+---
+name:            test_cmp_i8
+# CHECK-LABEL: name:  test_cmp_i8
+alignment:       4
+legalized:       false
+regBankSelected: false
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+  - { id: 3, class: _ }
+# CHECK:          %0(s8) = COPY %edi
+# CHECK-NEXT:     %1(s8) = COPY %esi
+# CHECK-NEXT:     %2(s1) = G_ICMP intpred(ult), %0(s8), %1
+# CHECK-NEXT:     %3(s32) = G_ZEXT %2(s1)
+# CHECK-NEXT:     %eax = COPY %3(s32)
+# CHECK-NEXT:     RET 0, implicit %eax
+body:             |
+  bb.1 (%ir-block.0):
+    liveins: %edi, %esi
+
+    %0(s8) = COPY %edi
+    %1(s8) = COPY %esi
+    %2(s1) = G_ICMP intpred(ult), %0(s8), %1
+    %3(s32) = G_ZEXT %2(s1)
+    %eax = COPY %3(s32)
+    RET 0, implicit %eax
+
+...
+---
+name:            test_cmp_i16
+# CHECK-LABEL: name:  test_cmp_i16
+alignment:       4
+legalized:       false
+regBankSelected: false
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+  - { id: 3, class: _ }
+# CHECK:          %0(s16) = COPY %edi
+# CHECK-NEXT:     %1(s16) = COPY %esi
+# CHECK-NEXT:     %2(s1) = G_ICMP intpred(ult), %0(s16), %1
+# CHECK-NEXT:     %3(s32) = G_ZEXT %2(s1)
+# CHECK-NEXT:     %eax = COPY %3(s32)
+# CHECK-NEXT:     RET 0, implicit %eax
+body:             |
+  bb.1 (%ir-block.0):
+    liveins: %edi, %esi
+
+    %0(s16) = COPY %edi
+    %1(s16) = COPY %esi
+    %2(s1) = G_ICMP intpred(ult), %0(s16), %1
+    %3(s32) = G_ZEXT %2(s1)
+    %eax = COPY %3(s32)
+    RET 0, implicit %eax
+
+...
+---
+name:            test_cmp_i32
+# CHECK-LABEL: name:  test_cmp_i32
+alignment:       4
+legalized:       false
+regBankSelected: false
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+  - { id: 3, class: _ }
+# CHECK:          %0(s32) = COPY %edi
+# CHECK-NEXT:     %1(s32) = COPY %esi
+# CHECK-NEXT:     %2(s1) = G_ICMP intpred(ult), %0(s32), %1
+# CHECK-NEXT:     %3(s32) = G_ZEXT %2(s1)
+# CHECK-NEXT:     %eax = COPY %3(s32)
+# CHECK-NEXT:     RET 0, implicit %eax
+body:             |
+  bb.1 (%ir-block.0):
+    liveins: %edi, %esi
+
+    %0(s32) = COPY %edi
+    %1(s32) = COPY %esi
+    %2(s1) = G_ICMP intpred(ult), %0(s32), %1
+    %3(s32) = G_ZEXT %2(s1)
+    %eax = COPY %3(s32)
+    RET 0, implicit %eax
+
+...
+---
+name:            test_cmp_i64
+# CHECK-LABEL: name:  test_cmp_i64
+alignment:       4
+legalized:       false
+regBankSelected: false
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+  - { id: 3, class: _ }
+# CHECK:          %0(s64) = COPY %rdi
+# CHECK-NEXT:     %1(s64) = COPY %rsi
+# CHECK-NEXT:     %2(s1) = G_ICMP intpred(ult), %0(s64), %1
+# CHECK-NEXT:     %3(s32) = G_ZEXT %2(s1)
+# CHECK-NEXT:     %eax = COPY %3(s32)
+# CHECK-NEXT:     RET 0, implicit %eax
+body:             |
+  bb.1 (%ir-block.0):
+    liveins: %rdi, %rsi
+
+    %0(s64) = COPY %rdi
+    %1(s64) = COPY %rsi
+    %2(s1) = G_ICMP intpred(ult), %0(s64), %1
+    %3(s32) = G_ZEXT %2(s1)
+    %eax = COPY %3(s32)
+    RET 0, implicit %eax
+
+...
+---
+name:            test_cmp_p0
+# CHECK-LABEL: name:  test_cmp_p0
+alignment:       4
+legalized:       false
+regBankSelected: false
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+  - { id: 3, class: _ }
+# CHECK:          %0(p0) = COPY %rdi
+# CHECK-NEXT:     %1(p0) = COPY %rsi
+# CHECK-NEXT:     %2(s1) = G_ICMP intpred(ult), %0(p0), %1
+# CHECK-NEXT:     %3(s32) = G_ZEXT %2(s1)
+# CHECK-NEXT:     %eax = COPY %3(s32)
+# CHECK-NEXT:     RET 0, implicit %eax
+body:             |
+  bb.1 (%ir-block.0):
+    liveins: %rdi, %rsi
+
+    %0(p0) = COPY %rdi
+    %1(p0) = COPY %rsi
+    %2(s1) = G_ICMP intpred(ult), %0(p0), %1
+    %3(s32) = G_ZEXT %2(s1)
+    %eax = COPY %3(s32)
+    RET 0, implicit %eax
+
+...