diff options
Diffstat (limited to 'test/CodeGen/X86/merge-consecutive-stores.ll')
| -rw-r--r-- | test/CodeGen/X86/merge-consecutive-stores.ll | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/test/CodeGen/X86/merge-consecutive-stores.ll b/test/CodeGen/X86/merge-consecutive-stores.ll new file mode 100644 index 000000000000..426529529891 --- /dev/null +++ b/test/CodeGen/X86/merge-consecutive-stores.ll @@ -0,0 +1,33 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s + +; Make sure that we are zeroing one memory location at a time using xorl and +; not both using XMM registers. + +define i32 @foo (i64* %so) nounwind uwtable ssp { +; CHECK-LABEL: foo: +; CHECK: # BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax +; CHECK-NEXT: movl $0, 28(%eax) +; CHECK-NEXT: movl $0, 24(%eax) +; CHECK-NEXT: movl 20(%eax), %ecx +; CHECK-NEXT: movl $0, 20(%eax) +; CHECK-NEXT: xorl %edx, %edx +; CHECK-NEXT: cmpl 16(%eax), %edx +; CHECK-NEXT: movl $0, 16(%eax) +; CHECK-NEXT: sbbl %ecx, %edx +; CHECK-NEXT: movl $-1, %eax +; CHECK-NEXT: jl .LBB0_2 +; CHECK-NEXT: # BB#1: +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: .LBB0_2: +; CHECK-NEXT: retl + %used = getelementptr inbounds i64, i64* %so, i32 3 + store i64 0, i64* %used, align 8 + %fill = getelementptr inbounds i64, i64* %so, i32 2 + %L = load i64, i64* %fill, align 8 + store i64 0, i64* %fill, align 8 + %cmp28 = icmp sgt i64 %L, 0 + %R = sext i1 %cmp28 to i32 + ret i32 %R +} |