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-rw-r--r--test/CodeGen/X86/tbm_patterns.ll502
1 files changed, 252 insertions, 250 deletions
diff --git a/test/CodeGen/X86/tbm_patterns.ll b/test/CodeGen/X86/tbm_patterns.ll
index 80d36d5af4d2..5ce6bbd4b49e 100644
--- a/test/CodeGen/X86/tbm_patterns.ll
+++ b/test/CodeGen/X86/tbm_patterns.ll
@@ -1,253 +1,255 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+tbm < %s | FileCheck %s
-define i32 @test_x86_tbm_bextri_u32(i32 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_bextri_u32:
- ; CHECK-NOT: mov
- ; CHECK: bextr $
- %0 = lshr i32 %a, 4
- %1 = and i32 %0, 4095
- ret i32 %1
-}
-
-define i32 @test_x86_tbm_bextri_u32_m(i32* nocapture %a) nounwind readonly {
-entry:
- ; CHECK-LABEL: test_x86_tbm_bextri_u32_m:
- ; CHECK-NOT: mov
- ; CHECK: bextr $
- %0 = load i32, i32* %a
- %1 = lshr i32 %0, 4
- %2 = and i32 %1, 4095
- ret i32 %2
-}
-
-define i64 @test_x86_tbm_bextri_u64(i64 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_bextri_u64:
- ; CHECK-NOT: mov
- ; CHECK: bextr $
- %0 = lshr i64 %a, 4
- %1 = and i64 %0, 4095
- ret i64 %1
-}
-
-define i64 @test_x86_tbm_bextri_u64_m(i64* nocapture %a) nounwind readonly {
-entry:
- ; CHECK-LABEL: test_x86_tbm_bextri_u64_m:
- ; CHECK-NOT: mov
- ; CHECK: bextr $
- %0 = load i64, i64* %a
- %1 = lshr i64 %0, 4
- %2 = and i64 %1, 4095
- ret i64 %2
-}
-
-define i32 @test_x86_tbm_blcfill_u32(i32 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blcfill_u32:
- ; CHECK-NOT: mov
- ; CHECK: blcfill %
- %0 = add i32 %a, 1
- %1 = and i32 %0, %a
- ret i32 %1
-}
-
-define i64 @test_x86_tbm_blcfill_u64(i64 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blcfill_u64:
- ; CHECK-NOT: mov
- ; CHECK: blcfill %
- %0 = add i64 %a, 1
- %1 = and i64 %0, %a
- ret i64 %1
-}
-
-define i32 @test_x86_tbm_blci_u32(i32 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blci_u32:
- ; CHECK-NOT: mov
- ; CHECK: blci %
- %0 = add i32 1, %a
- %1 = xor i32 %0, -1
- %2 = or i32 %1, %a
- ret i32 %2
-}
-
-define i64 @test_x86_tbm_blci_u64(i64 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blci_u64:
- ; CHECK-NOT: mov
- ; CHECK: blci %
- %0 = add i64 1, %a
- %1 = xor i64 %0, -1
- %2 = or i64 %1, %a
- ret i64 %2
-}
-
-define i32 @test_x86_tbm_blci_u32_b(i32 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blci_u32_b:
- ; CHECK-NOT: mov
- ; CHECK: blci %
- %0 = sub i32 -2, %a
- %1 = or i32 %0, %a
- ret i32 %1
-}
-
-define i64 @test_x86_tbm_blci_u64_b(i64 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blci_u64_b:
- ; CHECK-NOT: mov
- ; CHECK: blci %
- %0 = sub i64 -2, %a
- %1 = or i64 %0, %a
- ret i64 %1
-}
-
-define i32 @test_x86_tbm_blcic_u32(i32 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blcic_u32:
- ; CHECK-NOT: mov
- ; CHECK: blcic %
- %0 = xor i32 %a, -1
- %1 = add i32 %a, 1
- %2 = and i32 %1, %0
- ret i32 %2
-}
-
-define i64 @test_x86_tbm_blcic_u64(i64 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blcic_u64:
- ; CHECK-NOT: mov
- ; CHECK: blcic %
- %0 = xor i64 %a, -1
- %1 = add i64 %a, 1
- %2 = and i64 %1, %0
- ret i64 %2
-}
-
-define i32 @test_x86_tbm_blcmsk_u32(i32 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blcmsk_u32:
- ; CHECK-NOT: mov
- ; CHECK: blcmsk %
- %0 = add i32 %a, 1
- %1 = xor i32 %0, %a
- ret i32 %1
-}
-
-define i64 @test_x86_tbm_blcmsk_u64(i64 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blcmsk_u64:
- ; CHECK-NOT: mov
- ; CHECK: blcmsk %
- %0 = add i64 %a, 1
- %1 = xor i64 %0, %a
- ret i64 %1
-}
-
-define i32 @test_x86_tbm_blcs_u32(i32 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blcs_u32:
- ; CHECK-NOT: mov
- ; CHECK: blcs %
- %0 = add i32 %a, 1
- %1 = or i32 %0, %a
- ret i32 %1
-}
-
-define i64 @test_x86_tbm_blcs_u64(i64 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blcs_u64:
- ; CHECK-NOT: mov
- ; CHECK: blcs %
- %0 = add i64 %a, 1
- %1 = or i64 %0, %a
- ret i64 %1
-}
-
-define i32 @test_x86_tbm_blsfill_u32(i32 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blsfill_u32:
- ; CHECK-NOT: mov
- ; CHECK: blsfill %
- %0 = add i32 %a, -1
- %1 = or i32 %0, %a
- ret i32 %1
-}
-
-define i64 @test_x86_tbm_blsfill_u64(i64 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blsfill_u64:
- ; CHECK-NOT: mov
- ; CHECK: blsfill %
- %0 = add i64 %a, -1
- %1 = or i64 %0, %a
- ret i64 %1
-}
-
-define i32 @test_x86_tbm_blsic_u32(i32 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blsic_u32:
- ; CHECK-NOT: mov
- ; CHECK: blsic %
- %0 = xor i32 %a, -1
- %1 = add i32 %a, -1
- %2 = or i32 %0, %1
- ret i32 %2
-}
-
-define i64 @test_x86_tbm_blsic_u64(i64 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blsic_u64:
- ; CHECK-NOT: mov
- ; CHECK: blsic %
- %0 = xor i64 %a, -1
- %1 = add i64 %a, -1
- %2 = or i64 %0, %1
- ret i64 %2
-}
-
-define i32 @test_x86_tbm_t1mskc_u32(i32 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_t1mskc_u32:
- ; CHECK-NOT: mov
- ; CHECK: t1mskc %
- %0 = xor i32 %a, -1
- %1 = add i32 %a, 1
- %2 = or i32 %0, %1
- ret i32 %2
-}
-
-define i64 @Ttest_x86_tbm_t1mskc_u64(i64 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_t1mskc_u64:
- ; CHECK-NOT: mov
- ; CHECK: t1mskc %
- %0 = xor i64 %a, -1
- %1 = add i64 %a, 1
- %2 = or i64 %0, %1
- ret i64 %2
-}
-
-define i32 @test_x86_tbm_tzmsk_u32(i32 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_tzmsk_u32:
- ; CHECK-NOT: mov
- ; CHECK: tzmsk %
- %0 = xor i32 %a, -1
- %1 = add i32 %a, -1
- %2 = and i32 %0, %1
- ret i32 %2
-}
-
-define i64 @test_x86_tbm_tzmsk_u64(i64 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_tzmsk_u64:
- ; CHECK-NOT: mov
- ; CHECK: tzmsk %
- %0 = xor i64 %a, -1
- %1 = add i64 %a, -1
- %2 = and i64 %0, %1
- ret i64 %2
+define i32 @test_x86_tbm_bextri_u32(i32 %a) nounwind {
+; CHECK-LABEL: test_x86_tbm_bextri_u32:
+; CHECK: # BB#0:
+; CHECK-NEXT: bextr $3076, %edi, %eax # imm = 0xC04
+; CHECK-NEXT: retq
+ %t0 = lshr i32 %a, 4
+ %t1 = and i32 %t0, 4095
+ ret i32 %t1
+}
+
+define i32 @test_x86_tbm_bextri_u32_m(i32* nocapture %a) nounwind {
+; CHECK-LABEL: test_x86_tbm_bextri_u32_m:
+; CHECK: # BB#0:
+; CHECK-NEXT: bextr $3076, (%rdi), %eax # imm = 0xC04
+; CHECK-NEXT: retq
+ %t0 = load i32, i32* %a
+ %t1 = lshr i32 %t0, 4
+ %t2 = and i32 %t1, 4095
+ ret i32 %t2
+}
+
+define i64 @test_x86_tbm_bextri_u64(i64 %a) nounwind {
+; CHECK-LABEL: test_x86_tbm_bextri_u64:
+; CHECK: # BB#0:
+; CHECK-NEXT: bextr $3076, %edi, %eax # imm = 0xC04
+; CHECK-NEXT: retq
+ %t0 = lshr i64 %a, 4
+ %t1 = and i64 %t0, 4095
+ ret i64 %t1
+}
+
+define i64 @test_x86_tbm_bextri_u64_m(i64* nocapture %a) nounwind {
+; CHECK-LABEL: test_x86_tbm_bextri_u64_m:
+; CHECK: # BB#0:
+; CHECK-NEXT: bextr $3076, (%rdi), %eax # imm = 0xC04
+; CHECK-NEXT: retq
+ %t0 = load i64, i64* %a
+ %t1 = lshr i64 %t0, 4
+ %t2 = and i64 %t1, 4095
+ ret i64 %t2
+}
+
+define i32 @test_x86_tbm_blcfill_u32(i32 %a) nounwind {
+; CHECK-LABEL: test_x86_tbm_blcfill_u32:
+; CHECK: # BB#0:
+; CHECK-NEXT: blcfill %edi, %eax
+; CHECK-NEXT: retq
+ %t0 = add i32 %a, 1
+ %t1 = and i32 %t0, %a
+ ret i32 %t1
+}
+
+define i64 @test_x86_tbm_blcfill_u64(i64 %a) nounwind {
+; CHECK-LABEL: test_x86_tbm_blcfill_u64:
+; CHECK: # BB#0:
+; CHECK-NEXT: blcfill %rdi, %rax
+; CHECK-NEXT: retq
+ %t0 = add i64 %a, 1
+ %t1 = and i64 %t0, %a
+ ret i64 %t1
+}
+
+define i32 @test_x86_tbm_blci_u32(i32 %a) nounwind {
+; CHECK-LABEL: test_x86_tbm_blci_u32:
+; CHECK: # BB#0:
+; CHECK-NEXT: blci %edi, %eax
+; CHECK-NEXT: retq
+ %t0 = add i32 1, %a
+ %t1 = xor i32 %t0, -1
+ %t2 = or i32 %t1, %a
+ ret i32 %t2
+}
+
+define i64 @test_x86_tbm_blci_u64(i64 %a) nounwind {
+; CHECK-LABEL: test_x86_tbm_blci_u64:
+; CHECK: # BB#0:
+; CHECK-NEXT: blci %rdi, %rax
+; CHECK-NEXT: retq
+ %t0 = add i64 1, %a
+ %t1 = xor i64 %t0, -1
+ %t2 = or i64 %t1, %a
+ ret i64 %t2
+}
+
+define i32 @test_x86_tbm_blci_u32_b(i32 %a) nounwind {
+; CHECK-LABEL: test_x86_tbm_blci_u32_b:
+; CHECK: # BB#0:
+; CHECK-NEXT: blci %edi, %eax
+; CHECK-NEXT: retq
+ %t0 = sub i32 -2, %a
+ %t1 = or i32 %t0, %a
+ ret i32 %t1
+}
+
+define i64 @test_x86_tbm_blci_u64_b(i64 %a) nounwind {
+; CHECK-LABEL: test_x86_tbm_blci_u64_b:
+; CHECK: # BB#0:
+; CHECK-NEXT: blci %rdi, %rax
+; CHECK-NEXT: retq
+ %t0 = sub i64 -2, %a
+ %t1 = or i64 %t0, %a
+ ret i64 %t1
+}
+
+define i32 @test_x86_tbm_blcic_u32(i32 %a) nounwind {
+; CHECK-LABEL: test_x86_tbm_blcic_u32:
+; CHECK: # BB#0:
+; CHECK-NEXT: blcic %edi, %eax
+; CHECK-NEXT: retq
+ %t0 = xor i32 %a, -1
+ %t1 = add i32 %a, 1
+ %t2 = and i32 %t1, %t0
+ ret i32 %t2
+}
+
+define i64 @test_x86_tbm_blcic_u64(i64 %a) nounwind {
+; CHECK-LABEL: test_x86_tbm_blcic_u64:
+; CHECK: # BB#0:
+; CHECK-NEXT: blcic %rdi, %rax
+; CHECK-NEXT: retq
+ %t0 = xor i64 %a, -1
+ %t1 = add i64 %a, 1
+ %t2 = and i64 %t1, %t0
+ ret i64 %t2
+}
+
+define i32 @test_x86_tbm_blcmsk_u32(i32 %a) nounwind {
+; CHECK-LABEL: test_x86_tbm_blcmsk_u32:
+; CHECK: # BB#0:
+; CHECK-NEXT: blcmsk %edi, %eax
+; CHECK-NEXT: retq
+ %t0 = add i32 %a, 1
+ %t1 = xor i32 %t0, %a
+ ret i32 %t1
+}
+
+define i64 @test_x86_tbm_blcmsk_u64(i64 %a) nounwind {
+; CHECK-LABEL: test_x86_tbm_blcmsk_u64:
+; CHECK: # BB#0:
+; CHECK-NEXT: blcmsk %rdi, %rax
+; CHECK-NEXT: retq
+ %t0 = add i64 %a, 1
+ %t1 = xor i64 %t0, %a
+ ret i64 %t1
+}
+
+define i32 @test_x86_tbm_blcs_u32(i32 %a) nounwind {
+; CHECK-LABEL: test_x86_tbm_blcs_u32:
+; CHECK: # BB#0:
+; CHECK-NEXT: blcs %edi, %eax
+; CHECK-NEXT: retq
+ %t0 = add i32 %a, 1
+ %t1 = or i32 %t0, %a
+ ret i32 %t1
+}
+
+define i64 @test_x86_tbm_blcs_u64(i64 %a) nounwind {
+; CHECK-LABEL: test_x86_tbm_blcs_u64:
+; CHECK: # BB#0:
+; CHECK-NEXT: blcs %rdi, %rax
+; CHECK-NEXT: retq
+ %t0 = add i64 %a, 1
+ %t1 = or i64 %t0, %a
+ ret i64 %t1
+}
+
+define i32 @test_x86_tbm_blsfill_u32(i32 %a) nounwind {
+; CHECK-LABEL: test_x86_tbm_blsfill_u32:
+; CHECK: # BB#0:
+; CHECK-NEXT: blsfill %edi, %eax
+; CHECK-NEXT: retq
+ %t0 = add i32 %a, -1
+ %t1 = or i32 %t0, %a
+ ret i32 %t1
+}
+
+define i64 @test_x86_tbm_blsfill_u64(i64 %a) nounwind {
+; CHECK-LABEL: test_x86_tbm_blsfill_u64:
+; CHECK: # BB#0:
+; CHECK-NEXT: blsfill %rdi, %rax
+; CHECK-NEXT: retq
+ %t0 = add i64 %a, -1
+ %t1 = or i64 %t0, %a
+ ret i64 %t1
+}
+
+define i32 @test_x86_tbm_blsic_u32(i32 %a) nounwind {
+; CHECK-LABEL: test_x86_tbm_blsic_u32:
+; CHECK: # BB#0:
+; CHECK-NEXT: blsic %edi, %eax
+; CHECK-NEXT: retq
+ %t0 = xor i32 %a, -1
+ %t1 = add i32 %a, -1
+ %t2 = or i32 %t0, %t1
+ ret i32 %t2
+}
+
+define i64 @test_x86_tbm_blsic_u64(i64 %a) nounwind {
+; CHECK-LABEL: test_x86_tbm_blsic_u64:
+; CHECK: # BB#0:
+; CHECK-NEXT: blsic %rdi, %rax
+; CHECK-NEXT: retq
+ %t0 = xor i64 %a, -1
+ %t1 = add i64 %a, -1
+ %t2 = or i64 %t0, %t1
+ ret i64 %t2
+}
+
+define i32 @test_x86_tbm_t1mskc_u32(i32 %a) nounwind {
+; CHECK-LABEL: test_x86_tbm_t1mskc_u32:
+; CHECK: # BB#0:
+; CHECK-NEXT: t1mskc %edi, %eax
+; CHECK-NEXT: retq
+ %t0 = xor i32 %a, -1
+ %t1 = add i32 %a, 1
+ %t2 = or i32 %t0, %t1
+ ret i32 %t2
+}
+
+define i64 @Ttest_x86_tbm_t1mskc_u64(i64 %a) nounwind {
+; CHECK-LABEL: Ttest_x86_tbm_t1mskc_u64:
+; CHECK: # BB#0:
+; CHECK-NEXT: t1mskc %rdi, %rax
+; CHECK-NEXT: retq
+ %t0 = xor i64 %a, -1
+ %t1 = add i64 %a, 1
+ %t2 = or i64 %t0, %t1
+ ret i64 %t2
+}
+
+define i32 @test_x86_tbm_tzmsk_u32(i32 %a) nounwind {
+; CHECK-LABEL: test_x86_tbm_tzmsk_u32:
+; CHECK: # BB#0:
+; CHECK-NEXT: tzmsk %edi, %eax
+; CHECK-NEXT: retq
+ %t0 = xor i32 %a, -1
+ %t1 = add i32 %a, -1
+ %t2 = and i32 %t0, %t1
+ ret i32 %t2
+}
+
+define i64 @test_x86_tbm_tzmsk_u64(i64 %a) nounwind {
+; CHECK-LABEL: test_x86_tbm_tzmsk_u64:
+; CHECK: # BB#0:
+; CHECK-NEXT: tzmsk %rdi, %rax
+; CHECK-NEXT: retq
+ %t0 = xor i64 %a, -1
+ %t1 = add i64 %a, -1
+ %t2 = and i64 %t0, %t1
+ ret i64 %t2
}
+
generated by cgit v1.2.3 (git 2.25.1) at 2025-10-04 15:49:19 +0000