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-rw-r--r--test/CodeGen/arm-long-calls.c4
-rw-r--r--test/CodeGen/arm-no-movt.c4
-rw-r--r--test/CodeGen/arm-target-attr.c19
-rw-r--r--test/CodeGen/arm-target-features.c34
-rw-r--r--test/CodeGen/arm-thumb-mode-target-feature.c33
-rw-r--r--test/CodeGen/captured-statements.c7
-rw-r--r--test/CodeGen/mips-madd4.c87
-rw-r--r--test/CodeGen/neon-aapcs-align.c17
8 files changed, 182 insertions, 23 deletions
diff --git a/test/CodeGen/arm-long-calls.c b/test/CodeGen/arm-long-calls.c
index fdd7babe9fe6..cff2d6607113 100644
--- a/test/CodeGen/arm-long-calls.c
+++ b/test/CodeGen/arm-long-calls.c
@@ -1,7 +1,7 @@
// RUN: %clang_cc1 -triple thumbv7-apple-ios5 -target-feature +long-calls -emit-llvm -o - %s | FileCheck -check-prefix=LONGCALL %s
// RUN: %clang_cc1 -triple thumbv7-apple-ios5 -emit-llvm -o - %s | FileCheck -check-prefix=NOLONGCALL %s
-// LONGCALL: attributes #0 = { {{.*}} "target-features"="+long-calls"
-// NOLONGCALL-NOT: attributes #0 = { {{.*}} "target-features"="+long-calls"
+// LONGCALL: attributes #0 = { {{.*}} "target-features"="+long-calls,+thumb-mode"
+// NOLONGCALL-NOT: attributes #0 = { {{.*}} "target-features"="+long-calls,+thumb-mode"
int foo1(int a) { return a; }
diff --git a/test/CodeGen/arm-no-movt.c b/test/CodeGen/arm-no-movt.c
index 0773941fb384..f61f2248643e 100644
--- a/test/CodeGen/arm-no-movt.c
+++ b/test/CodeGen/arm-no-movt.c
@@ -1,7 +1,7 @@
// RUN: %clang_cc1 -triple thumbv7-apple-ios5 -target-feature +no-movt -emit-llvm -o - %s | FileCheck -check-prefix=NO-MOVT %s
// RUN: %clang_cc1 -triple thumbv7-apple-ios5 -emit-llvm -o - %s | FileCheck -check-prefix=MOVT %s
-// NO-MOVT: attributes #0 = { {{.*}} "target-features"="+no-movt"
-// MOVT-NOT: attributes #0 = { {{.*}} "target-features"="+no-movt"
+// NO-MOVT: attributes #0 = { {{.*}} "target-features"="+no-movt,+thumb-mode"
+// MOVT-NOT: attributes #0 = { {{.*}} "target-features"="+no-movt,+thumb-mode"
int foo1(int a) { return a; }
diff --git a/test/CodeGen/arm-target-attr.c b/test/CodeGen/arm-target-attr.c
new file mode 100644
index 000000000000..42fe8d15aaf4
--- /dev/null
+++ b/test/CodeGen/arm-target-attr.c
@@ -0,0 +1,19 @@
+// RUN: %clang_cc1 -triple thumb-apple-darwin -emit-llvm -o - %s | FileCheck --check-prefix CHECKPOS %s
+// RUN: %clang_cc1 -triple thumb-apple-darwin -emit-llvm -o - %s | FileCheck --check-prefix CHECKNEG %s
+// RUN: %clang_cc1 -triple arm-apple-darwin -emit-llvm -o - %s | FileCheck --check-prefix CHECKPOS %s
+// RUN: %clang_cc1 -triple arm-apple-darwin -emit-llvm -o - %s | FileCheck --check-prefix CHECKNEG %s
+
+__attribute__((target("arm"))) void test_target_arm() {
+ // CHECKPOS: define void @test_target_arm() [[ARM_ATTRS:#[0-9]+]]
+ // CHECKNEG: define void @test_target_arm() [[ARM_ATTRS:#[0-9]+]]
+}
+
+__attribute__((target("thumb"))) void test_target_thumb() {
+ // CHECKPOS: define void @test_target_thumb() [[THUMB_ATTRS:#[0-9]+]]
+ // CHECKNEG: define void @test_target_thumb() [[THUMB_ATTRS:#[0-9]+]]
+}
+
+// CHECKPOS: attributes [[ARM_ATTRS]] = { {{.*}} "target-features"="{{.*}}-thumb-mode{{.*}}"
+// CHECKPOS: attributes [[THUMB_ATTRS]] = { {{.*}} "target-features"="{{.*}}+thumb-mode{{.*}}"
+// CHECKNEG-NOT: attributes [[ARM_ATTRS]] = { {{.*}} "target-features"="{{.*}}+thumb-mode{{.*}}"
+// CHECKNEG-NOT: attributes [[THUMB_ATTRS]] = { {{.*}} "target-features"="{{.*}}-thumb-mode{{.*}}"
diff --git a/test/CodeGen/arm-target-features.c b/test/CodeGen/arm-target-features.c
index 7437fb0e4ed2..e5591a28ad1a 100644
--- a/test/CodeGen/arm-target-features.c
+++ b/test/CodeGen/arm-target-features.c
@@ -1,65 +1,63 @@
// REQUIRES: arm-registered-target
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabihf -target-cpu cortex-a8 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP3
-// CHECK-VFP3: "target-features"="+dsp,+neon,+vfp3"
-
-
-// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-a9 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP3-FP16
-// CHECK-VFP3-FP16: "target-features"="+dsp,+fp16,+neon,+vfp3"
+// CHECK-VFP3: "target-features"="+dsp,+neon,+thumb-mode
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabihf -target-cpu cortex-a5 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4
-// CHECK-VFP4: "target-features"="+dsp,+neon,+vfp4"
+// CHECK-VFP4: "target-features"="+dsp,+neon,+thumb-mode,+vfp4"
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabihf -target-cpu cortex-a7 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-a12 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV
-// RUN: %clang_cc1 -triple armv7-linux-gnueabihf -target-cpu cortex-a15 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV
-// RUN: %clang_cc1 -triple armv7-linux-gnueabihf -target-cpu cortex-a17 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV
// RUN: %clang_cc1 -triple thumbv7s-linux-gnueabi -target-cpu swift -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabihf -target-cpu krait -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV
-// CHECK-VFP4-DIV: "target-features"="+dsp,+hwdiv,+hwdiv-arm,+neon,+vfp4"
+// CHECK-VFP4-DIV: "target-features"="+dsp,+hwdiv,+hwdiv-arm,+neon,+thumb-mode,+vfp4"
+// RUN: %clang_cc1 -triple armv7-linux-gnueabihf -target-cpu cortex-a15 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV-ARM
+// RUN: %clang_cc1 -triple armv7-linux-gnueabihf -target-cpu cortex-a17 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV-ARM
+// CHECK-VFP4-DIV-ARM: "target-features"="+dsp,+hwdiv,+hwdiv-arm,+neon,+vfp4,-thumb-mode"
// RUN: %clang_cc1 -triple thumbv7s-apple-ios7.0 -target-cpu cyclone -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a32 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a35 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
-// RUN: %clang_cc1 -triple armv8-linux-gnueabi -target-cpu cortex-a53 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a72 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a73 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu exynos-m1 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu exynos-m2 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu exynos-m3 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
-// CHECK-BASIC-V8: "target-features"="+crc,+crypto,+dsp,+fp-armv8,+hwdiv,+hwdiv-arm,+neon"
+// CHECK-BASIC-V8: "target-features"="+crc,+crypto,+dsp,+fp-armv8,+hwdiv,+hwdiv-arm,+neon,+thumb-mode"
+// RUN: %clang_cc1 -triple armv8-linux-gnueabi -target-cpu cortex-a53 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8-ARM
+// CHECK-BASIC-V8-ARM: "target-features"="+crc,+crypto,+dsp,+fp-armv8,+hwdiv,+hwdiv-arm,+neon,-thumb-mode"
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-r5 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP3-D16-DIV
-// CHECK-VFP3-D16-DIV: "target-features"="+d16,+dsp,+hwdiv,+hwdiv-arm,+vfp3"
+// CHECK-VFP3-D16-DIV: "target-features"="+d16,+dsp,+hwdiv,+hwdiv-arm,+thumb-mode,+vfp3"
// RUN: %clang_cc1 -triple armv7-linux-gnueabi -target-cpu cortex-r4f -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP3-D16-THUMB-DIV
-// CHECK-VFP3-D16-THUMB-DIV: "target-features"="+d16,+dsp,+hwdiv,+vfp3"
+// CHECK-VFP3-D16-THUMB-DIV: "target-features"="+d16,+dsp,+hwdiv,+vfp3,-thumb-mode"
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-r7 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP3-D16-FP16-DIV
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-r8 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP3-D16-FP16-DIV
-// CHECK-VFP3-D16-FP16-DIV: "target-features"="+d16,+dsp,+fp16,+hwdiv,+hwdiv-arm,+vfp3"
+// CHECK-VFP3-D16-FP16-DIV: "target-features"="+d16,+dsp,+fp16,+hwdiv,+hwdiv-arm,+thumb-mode,+vfp3"
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-m4 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-D16-SP-THUMB-DIV
-// CHECK-VFP4-D16-SP-THUMB-DIV: "target-features"="+d16,+dsp,+fp-only-sp,+hwdiv,+vfp4"
+// CHECK-VFP4-D16-SP-THUMB-DIV: "target-features"="+d16,+dsp,+fp-only-sp,+hwdiv,+thumb-mode,+vfp4"
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-m7 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP5-D16-THUMB-DIV
-// CHECK-VFP5-D16-THUMB-DIV: "target-features"="+d16,+dsp,+fp-armv8,+hwdiv"
+// CHECK-VFP5-D16-THUMB-DIV: "target-features"="+d16,+dsp,+fp-armv8,+hwdiv,+thumb-mode"
// RUN: %clang_cc1 -triple armv7-linux-gnueabi -target-cpu cortex-r4 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-THUMB-DIV
-// CHECK-THUMB-DIV: "target-features"="+dsp,+hwdiv"
+// CHECK-THUMB-DIV: "target-features"="+dsp,+hwdiv,-thumb-mode"
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-m3 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-THUMB-DIV-M3
-// CHECK-THUMB-DIV-M3: "target-features"="+hwdiv"
+// CHECK-THUMB-DIV-M3: "target-features"="+hwdiv,+thumb-mode"
void foo() {}
diff --git a/test/CodeGen/arm-thumb-mode-target-feature.c b/test/CodeGen/arm-thumb-mode-target-feature.c
new file mode 100644
index 000000000000..5c41d0b16fda
--- /dev/null
+++ b/test/CodeGen/arm-thumb-mode-target-feature.c
@@ -0,0 +1,33 @@
+// REQUIRES: arm-registered-target
+
+// RUN: %clang_cc1 -triple thumbv7-linux-gnueabihf -emit-llvm -o - %s | FileCheck --check-prefix THUMB %s
+// RUN: %clang_cc1 -triple thumbv7eb-linux-gnueabihf -emit-llvm -o - %s | FileCheck --check-prefix THUMB %s
+// RUN: %clang -target armv7-linux-gnueabihf -mthumb -S -emit-llvm -o - %s | FileCheck --check-prefix THUMB-CLANG %s
+// RUN: %clang_cc1 -triple armv7-linux-gnueabihf -emit-llvm -o - %s | FileCheck --check-prefix ARM %s
+// RUN: %clang_cc1 -triple armv7eb-linux-gnueabihf -emit-llvm -o - %s | FileCheck --check-prefix ARM %s
+
+void t1() {}
+
+ __attribute__((target("no-thumb-mode")))
+void t2() {}
+
+ __attribute__((target("thumb-mode")))
+void t3() {}
+
+// THUMB: void @t1() [[ThumbAttr:#[0-7]]]
+// THUMB: void @t2() [[NoThumbAttr:#[0-7]]]
+// THUMB: void @t3() [[ThumbAttr:#[0-7]]]
+// THUMB: attributes [[ThumbAttr]] = { {{.*}} "target-features"="+thumb-mode"
+// THUMB: attributes [[NoThumbAttr]] = { {{.*}} "target-features"="-thumb-mode"
+//
+// THUMB-CLANG: void @t1() [[ThumbAttr:#[0-7]]]
+// THUMB-CLANG: void @t2() [[NoThumbAttr:#[0-7]]]
+// THUMB-CLANG: void @t3() [[ThumbAttr:#[0-7]]]
+// THUMB-CLANG: attributes [[ThumbAttr]] = { {{.*}} "target-features"="{{.*}}+thumb-mode
+// THUMB-CLANG: attributes [[NoThumbAttr]] = { {{.*}} "target-features"="{{.*}}-thumb-mode
+
+// ARM: void @t1() [[NoThumbAtr:#[0-7]]]
+// ARM: void @t2() [[NoThumbAttr:#[0-7]]]
+// ARM: void @t3() [[ThumbAttr:#[0-7]]]
+// ARM: attributes [[NoThumbAttr]] = { {{.*}} "target-features"="-thumb-mode"
+// ARM: attributes [[ThumbAttr]] = { {{.*}} "target-features"="+thumb-mode"
diff --git a/test/CodeGen/captured-statements.c b/test/CodeGen/captured-statements.c
index 607ec8e55f48..68ff2517be1e 100644
--- a/test/CodeGen/captured-statements.c
+++ b/test/CodeGen/captured-statements.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -triple %itanium_abi_triple -emit-llvm %s -o %t
+// RUN: %clang_cc1 -triple %itanium_abi_triple -emit-llvm %s -o %t -debug-info-kind=limited
// RUN: FileCheck %s -input-file=%t -check-prefix=CHECK-GLOBALS
// RUN: FileCheck %s -input-file=%t -check-prefix=CHECK-1
// RUN: FileCheck %s -input-file=%t -check-prefix=CHECK-2
@@ -98,3 +98,8 @@ void dont_capture_global() {
// CHECK-GLOBALS: load i32, i32* @global
// CHECK-GLOBALS: load i32, i32* @
// CHECK-GLOBALS: load i32, i32* @e
+
+// CHECK-GLOBALS-NOT: DIFlagObjectPointer
+// CHECK-1-NOT: DIFlagObjectPointer
+// CHECK-2-NOT: DIFlagObjectPointer
+// CHECK-3-NOT: DIFlagObjectPointer
diff --git a/test/CodeGen/mips-madd4.c b/test/CodeGen/mips-madd4.c
new file mode 100644
index 000000000000..bc7bb593f95d
--- /dev/null
+++ b/test/CodeGen/mips-madd4.c
@@ -0,0 +1,87 @@
+// REQUIRES: mips-registered-target
+// RUN: %clang --target=mips64-unknown-linux -S -mmadd4 %s -o -| FileCheck %s -check-prefix=MADD4
+// RUN: %clang --target=mips64-unknown-linux -S -mno-madd4 %s -o -| FileCheck %s -check-prefix=NOMADD4
+// RUN: %clang --target=mips64-unknown-linux -S -mmadd4 -fno-honor-nans %s -o -| FileCheck %s -check-prefix=MADD4-NONAN
+// RUN: %clang --target=mips64-unknown-linux -S -mno-madd4 -fno-honor-nans %s -o -| FileCheck %s -check-prefix=NOMADD4-NONAN
+
+float madd_s (float f, float g, float h)
+{
+ return (f * g) + h;
+}
+// MADD4: madd.s
+// NOMADD4: mul.s
+// NOMADD4: add.s
+
+float msub_s (float f, float g, float h)
+{
+ return (f * g) - h;
+}
+// MADD4: msub.s
+// NOMADD4: mul.s
+// NOMADD4: sub.s
+
+double madd_d (double f, double g, double h)
+{
+ return (f * g) + h;
+}
+// MADD4: madd.d
+// NOMADD4: mul.d
+// NOMADD4: add.d
+
+double msub_d (double f, double g, double h)
+{
+ return (f * g) - h;
+}
+// MADD4: msub.d
+// NOMADD4: mul.d
+// NOMADD4: sub.d
+
+
+float nmadd_s (float f, float g, float h)
+{
+ // FIXME: Zero has been explicitly placed to force generation of a positive
+ // zero in IR until pattern used to match this instruction is changed to
+ // comply with negative zero as well.
+ return 0-((f * g) + h);
+}
+// MADD4-NONAN: nmadd.s
+// NOMADD4-NONAN: mul.s
+// NOMADD4-NONAN: add.s
+// NOMADD4-NONAN: sub.s
+
+float nmsub_s (float f, float g, float h)
+{
+ // FIXME: Zero has been explicitly placed to force generation of a positive
+ // zero in IR until pattern used to match this instruction is changed to
+ // comply with negative zero as well.
+ return 0-((f * g) - h);
+}
+// MADD4-NONAN: nmsub.s
+// NOMADD4-NONAN: mul.s
+// NOMADD4-NONAN: sub.s
+// NOMADD4-NONAN: sub.s
+
+double nmadd_d (double f, double g, double h)
+{
+ // FIXME: Zero has been explicitly placed to force generation of a positive
+ // zero in IR until pattern used to match this instruction is changed to
+ // comply with negative zero as well.
+ return 0-((f * g) + h);
+}
+// MADD4-NONAN: nmadd.d
+// NOMADD4-NONAN: mul.d
+// NOMADD4-NONAN: add.d
+// NOMADD4-NONAN: sub.d
+
+double nmsub_d (double f, double g, double h)
+{
+ // FIXME: Zero has been explicitly placed to force generation of a positive
+ // zero in IR until pattern used to match this instruction is changed to
+ // comply with negative zero as well.
+ return 0-((f * g) - h);
+}
+// MADD4-NONAN: nmsub.d
+// NOMADD4-NONAN: mul.d
+// NOMADD4-NONAN: sub.d
+// NOMADD4-NONAN: sub.d
+
diff --git a/test/CodeGen/neon-aapcs-align.c b/test/CodeGen/neon-aapcs-align.c
new file mode 100644
index 000000000000..4b7e5ff4d387
--- /dev/null
+++ b/test/CodeGen/neon-aapcs-align.c
@@ -0,0 +1,17 @@
+// RUN: %clang_cc1 -triple armv7a-none-eabi -target-feature +neon -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=AAPCS
+// RUN: %clang_cc1 -triple armv7a-none-gnueabi -target-feature +neon -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=AAPCS
+// RUN: %clang_cc1 -triple armv7a-none-freebsd -target-feature +neon -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=AAPCS
+
+// RUN: %clang_cc1 -triple armv7a-apple-ios -target-feature +neon -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=DEFAULT
+// RUN: %clang_cc1 -triple armv7a-none-android -target-feature +neon -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=DEFAULT
+// RUN: %clang_cc1 -triple armv7a-none-androideabi -target-feature +neon -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=DEFAULT
+
+#include <arm_neon.h>
+// Neon types have 64-bit alignment
+int32x4_t gl_b;
+void t3(int32x4_t *src) {
+// CHECK: @t3
+ gl_b = *src;
+// AAPCS: store <4 x i32> {{%.*}}, <4 x i32>* @gl_b, align 8
+// DEFAULT: store <4 x i32> {{%.*}}, <4 x i32>* @gl_b, align 16
+}
generated by cgit v1.2.3 (git 2.25.1) at 2025-10-10 10:29:12 +0000