diff options
Diffstat (limited to 'test/CodeGenCXX/arm.cpp')
| -rw-r--r-- | test/CodeGenCXX/arm.cpp | 46 | 
1 files changed, 23 insertions, 23 deletions
| diff --git a/test/CodeGenCXX/arm.cpp b/test/CodeGenCXX/arm.cpp index b6629f444e3f..7d94cba7ff11 100644 --- a/test/CodeGenCXX/arm.cpp +++ b/test/CodeGenCXX/arm.cpp @@ -56,14 +56,14 @@ namespace test1 {    // CHECK: define linkonce_odr [[A]]* @_ZN5test11AC1Ei([[A]]* returned %this, i32 %i) unnamed_addr    // CHECK:   [[THIS:%.*]] = alloca [[A]]*, align 4    // CHECK:   store [[A]]* {{.*}}, [[A]]** [[THIS]] -  // CHECK:   [[THIS1:%.*]] = load [[A]]** [[THIS]] +  // CHECK:   [[THIS1:%.*]] = load [[A]]*, [[A]]** [[THIS]]    // CHECK:   {{%.*}} = call [[A]]* @_ZN5test11AC2Ei(    // CHECK:   ret [[A]]* [[THIS1]]    // CHECK: define linkonce_odr [[A]]* @_ZN5test11AD1Ev([[A]]* returned %this) unnamed_addr    // CHECK:   [[THIS:%.*]] = alloca [[A]]*, align 4    // CHECK:   store [[A]]* {{.*}}, [[A]]** [[THIS]] -  // CHECK:   [[THIS1:%.*]] = load [[A]]** [[THIS]] +  // CHECK:   [[THIS1:%.*]] = load [[A]]*, [[A]]** [[THIS]]    // CHECK:   {{%.*}} = call [[A]]* @_ZN5test11AD2Ev(    // CHECK:   ret [[A]]* [[THIS1]]  } @@ -117,7 +117,7 @@ namespace test3 {    void b(int n) {      // CHECK-LABEL: define void @_ZN5test31bEi( -    // CHECK: [[N:%.*]] = load i32* +    // CHECK: [[N:%.*]] = load i32, i32*      // CHECK: @llvm.umul.with.overflow.i32(i32 [[N]], i32 4)      // CHECK: @llvm.uadd.with.overflow.i32(i32 {{.*}}, i32 8)      // CHECK: [[OR:%.*]] = or i1 @@ -138,7 +138,7 @@ namespace test3 {    void d(int n) {      // CHECK-LABEL: define void @_ZN5test31dEi( -    // CHECK: [[N:%.*]] = load i32* +    // CHECK: [[N:%.*]] = load i32, i32*      // CHECK: @llvm.umul.with.overflow.i32(i32 [[N]], i32 80)      // CHECK: [[NE:%.*]] = mul i32 [[N]], 20      // CHECK: @llvm.uadd.with.overflow.i32(i32 {{.*}}, i32 8) @@ -190,7 +190,7 @@ namespace test4 {    void b(int n) {      // CHECK-LABEL: define void @_ZN5test41bEi( -    // CHECK: [[N:%.*]] = load i32* +    // CHECK: [[N:%.*]] = load i32, i32*      // CHECK: @llvm.umul.with.overflow.i32(i32 [[N]], i32 4)      // CHECK: @llvm.uadd.with.overflow.i32(i32 {{.*}}, i32 8)      // CHECK: [[SZ:%.*]] = select @@ -210,7 +210,7 @@ namespace test4 {    void d(int n) {      // CHECK-LABEL: define void @_ZN5test41dEi( -    // CHECK: [[N:%.*]] = load i32* +    // CHECK: [[N:%.*]] = load i32, i32*      // CHECK: @llvm.umul.with.overflow.i32(i32 [[N]], i32 80)      // CHECK: [[NE:%.*]] = mul i32 [[N]], 20      // CHECK: @llvm.uadd.with.overflow.i32(i32 {{.*}}, i32 8) @@ -226,7 +226,7 @@ namespace test4 {      // CHECK: [[ALLOC:%.*]] = getelementptr inbounds {{.*}}, i64 -8      // CHECK: getelementptr inbounds {{.*}}, i64 4      // CHECK: bitcast -    // CHECK: [[T0:%.*]] = load i32* +    // CHECK: [[T0:%.*]] = load i32, i32*      // CHECK: [[T1:%.*]] = mul i32 4, [[T0]]      // CHECK: [[T2:%.*]] = add i32 [[T1]], 8      // CHECK: call void @_ZN5test41AdaEPvm(i8* [[ALLOC]], i32 [[T2]]) @@ -238,7 +238,7 @@ namespace test4 {      // CHECK: [[ALLOC:%.*]] = getelementptr inbounds {{.*}}, i64 -8      // CHECK: getelementptr inbounds {{.*}}, i64 4      // CHECK: bitcast -    // CHECK: [[T0:%.*]] = load i32* +    // CHECK: [[T0:%.*]] = load i32, i32*      // CHECK: [[T1:%.*]] = mul i32 4, [[T0]]      // CHECK: [[T2:%.*]] = add i32 [[T1]], 8      // CHECK: call void @_ZN5test41AdaEPvm(i8* [[ALLOC]], i32 [[T2]]) @@ -256,7 +256,7 @@ namespace test5 {    void test(A *a) {      // CHECK:      [[PTR:%.*]] = alloca [[A:%.*]]*, align 4      // CHECK-NEXT: store [[A]]* {{.*}}, [[A]]** [[PTR]], align 4 -    // CHECK-NEXT: [[TMP:%.*]] = load [[A]]** [[PTR]], align 4 +    // CHECK-NEXT: [[TMP:%.*]] = load [[A]]*, [[A]]** [[PTR]], align 4      // CHECK-NEXT: call [[A]]* @_ZN5test51AD1Ev([[A]]* [[TMP]])      // CHECK-NEXT: ret void      a->~A(); @@ -272,13 +272,13 @@ namespace test6 {    void test(A *a) {      // CHECK:      [[AVAR:%.*]] = alloca [[A:%.*]]*, align 4      // CHECK-NEXT: store [[A]]* {{.*}}, [[A]]** [[AVAR]], align 4 -    // CHECK-NEXT: [[V:%.*]] = load [[A]]** [[AVAR]], align 4 +    // CHECK-NEXT: [[V:%.*]] = load [[A]]*, [[A]]** [[AVAR]], align 4      // CHECK-NEXT: [[ISNULL:%.*]] = icmp eq [[A]]* [[V]], null      // CHECK-NEXT: br i1 [[ISNULL]]      // CHECK:      [[T0:%.*]] = bitcast [[A]]* [[V]] to void ([[A]]*)*** -    // CHECK-NEXT: [[T1:%.*]] = load void ([[A]]*)*** [[T0]] -    // CHECK-NEXT: [[T2:%.*]] = getelementptr inbounds void ([[A]]*)** [[T1]], i64 1 -    // CHECK-NEXT: [[T3:%.*]] = load void ([[A]]*)** [[T2]] +    // CHECK-NEXT: [[T1:%.*]] = load void ([[A]]*)**, void ([[A]]*)*** [[T0]] +    // CHECK-NEXT: [[T2:%.*]] = getelementptr inbounds void ([[A]]*)*, void ([[A]]*)** [[T1]], i64 1 +    // CHECK-NEXT: [[T3:%.*]] = load void ([[A]]*)*, void ([[A]]*)** [[T2]]      // CHECK-NEXT: call void [[T3]]([[A]]* [[V]])      // CHECK-NEXT: br label      // CHECK:      ret void @@ -293,7 +293,7 @@ namespace test7 {    // CHECK-LABEL: define void @_ZN5test74testEv()    void test() { -    // CHECK:      [[T0:%.*]] = load atomic i8* bitcast (i32* @_ZGVZN5test74testEvE1x to i8*) acquire, align 1 +    // CHECK:      [[T0:%.*]] = load atomic i8, i8* bitcast (i32* @_ZGVZN5test74testEvE1x to i8*) acquire, align 1      // CHECK-NEXT: [[T1:%.*]] = and i8 [[T0]], 1      // CHECK-NEXT: [[T2:%.*]] = icmp eq i8 [[T1]], 0      // CHECK-NEXT: br i1 [[T2]] @@ -328,7 +328,7 @@ namespace test8 {    // CHECK-LABEL: define void @_ZN5test84testEv()    void test() { -    // CHECK:      [[T0:%.*]] = load atomic i8* bitcast (i32* @_ZGVZN5test84testEvE1x to i8*) acquire, align 1 +    // CHECK:      [[T0:%.*]] = load atomic i8, i8* bitcast (i32* @_ZGVZN5test84testEvE1x to i8*) acquire, align 1      // CHECK-NEXT: [[T1:%.*]] = and i8 [[T0]], 1      // CHECK-NEXT: [[T2:%.*]] = icmp eq i8 [[T1]], 0      // CHECK-NEXT: br i1 [[T2]] @@ -374,7 +374,7 @@ namespace test9 {    }  // CHECK:    define [[TEST9:%.*]]* @_ZN5test97testNewEj(i32  // CHECK:      [[N_VAR:%.*]] = alloca i32, align 4 -// CHECK:      [[N:%.*]] = load i32* [[N_VAR]], align 4 +// CHECK:      [[N:%.*]] = load i32, i32* [[N_VAR]], align 4  // CHECK-NEXT: [[T0:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[N]], i32 16)  // CHECK-NEXT: [[O0:%.*]] = extractvalue { i32, i1 } [[T0]], 1  // CHECK-NEXT: [[T1:%.*]] = extractvalue { i32, i1 } [[T0]], 0 @@ -386,9 +386,9 @@ namespace test9 {  // CHECK-NEXT: [[ALLOC:%.*]] = call noalias i8* @_Znam(i32 [[T4]])  // CHECK-NEXT: [[T0:%.*]] = bitcast i8* [[ALLOC]] to i32*  // CHECK-NEXT: store i32 16, i32* [[T0]] -// CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds i32* [[T0]], i32 1 +// CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds i32, i32* [[T0]], i32 1  // CHECK-NEXT: store i32 [[N]], i32* [[T1]] -// CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds i8* [[ALLOC]], i64 16 +// CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds i8, i8* [[ALLOC]], i64 16  // CHECK-NEXT: bitcast i8* [[T0]] to [[TEST9]]*  //   Array allocation follows. @@ -396,15 +396,15 @@ namespace test9 {      delete[] array;    }  // CHECK-LABEL:    define void @_ZN5test910testDeleteEPNS_1AE( -// CHECK:      [[BEGIN:%.*]] = load [[TEST9]]** +// CHECK:      [[BEGIN:%.*]] = load [[TEST9]]*, [[TEST9]]**  // CHECK-NEXT: [[T0:%.*]] = icmp eq [[TEST9]]* [[BEGIN]], null  // CHECK-NEXT: br i1 [[T0]],  // CHECK:      [[T0:%.*]] = bitcast [[TEST9]]* [[BEGIN]] to i8* -// CHECK-NEXT: [[ALLOC:%.*]] = getelementptr inbounds i8* [[T0]], i64 -16 -// CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds i8* [[ALLOC]], i64 4 +// CHECK-NEXT: [[ALLOC:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 -16 +// CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds i8, i8* [[ALLOC]], i64 4  // CHECK-NEXT: [[T1:%.*]] = bitcast i8* [[T0]] to i32* -// CHECK-NEXT: [[N:%.*]] = load i32* [[T1]] -// CHECK-NEXT: [[END:%.*]] = getelementptr inbounds [[TEST9]]* [[BEGIN]], i32 [[N]] +// CHECK-NEXT: [[N:%.*]] = load i32, i32* [[T1]] +// CHECK-NEXT: [[END:%.*]] = getelementptr inbounds [[TEST9]], [[TEST9]]* [[BEGIN]], i32 [[N]]  // CHECK-NEXT: [[T0:%.*]] = icmp eq [[TEST9]]* [[BEGIN]], [[END]]  // CHECK-NEXT: br i1 [[T0]],  //   Array deallocation follows. | 
