diff options
Diffstat (limited to 'test/MC/ARM')
165 files changed, 15030 insertions, 134 deletions
diff --git a/test/MC/ARM/2013-03-18-Br-to-label-named-like-reg.s b/test/MC/ARM/2013-03-18-Br-to-label-named-like-reg.s index 172abcf6f813..66fba3b6ac9b 100644 --- a/test/MC/ARM/2013-03-18-Br-to-label-named-like-reg.s +++ b/test/MC/ARM/2013-03-18-Br-to-label-named-like-reg.s @@ -1,5 +1,6 @@ -@ RUN: llvm-mc -arch arm %s +@ RUN: llvm-mc -triple arm-eabi %s -o - | FileCheck %s + @ CHECK: test: -@ CHECK: br r1 +@ CHECK: bl r1 test: bl r1 diff --git a/test/MC/ARM/AlignedBundling/lit.local.cfg b/test/MC/ARM/AlignedBundling/lit.local.cfg index ba763cf03ffc..e71f3cc4c41e 100644 --- a/test/MC/ARM/AlignedBundling/lit.local.cfg +++ b/test/MC/ARM/AlignedBundling/lit.local.cfg @@ -1,4 +1,3 @@ -targets = set(config.root.targets_to_build.split()) -if not 'X86' in targets: +if not 'X86' in config.root.targets: config.unsupported = True diff --git a/test/MC/ARM/Windows/mov32t-range.s b/test/MC/ARM/Windows/mov32t-range.s new file mode 100644 index 000000000000..fef8ff2aca7a --- /dev/null +++ b/test/MC/ARM/Windows/mov32t-range.s @@ -0,0 +1,37 @@ +@ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \ +@ RUN: | llvm-readobj -r - | FileCheck -check-prefix CHECK-RELOCATIONS %s + +@ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \ +@ RUN: | llvm-objdump -d - | FileCheck -check-prefix CHECK-ENCODING %s + + .syntax unified + .thumb + .text + + .def truncation + .scl 3 + .type 32 + .endef + .align 2 + .thumb_func +truncation: + movw r0, :lower16:.Lerange + movt r0, :upper16:.Lerange + bx lr + + .section .rdata,"rd" +.Lbuffer: + .zero 65536 +.Lerange: + .asciz "-erange" + +@ CHECK-RELOCATIONS: Relocations [ +@ CHECK-RELOCATIONS: .text { +@ CHECK-RELOCATIONS: 0x0 IMAGE_REL_ARM_MOV32T .rdata +@ CHECK-RELOCATIONS-NOT: 0x4 IMAGE_REL_ARM_MOV32T .rdata +@ CHECK-RELOCATIONS: } +@ CHECK-RELOCATIONS: ] + +@ CHECK-ENCODING: 0: 40 f2 00 00 +@ CHECK-ENCODING-NEXT: 4: c0 f2 01 00 + diff --git a/test/MC/ARM/Windows/multiple-text-sections.s b/test/MC/ARM/Windows/multiple-text-sections.s new file mode 100644 index 000000000000..241eee4bcad3 --- /dev/null +++ b/test/MC/ARM/Windows/multiple-text-sections.s @@ -0,0 +1,58 @@ +@ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \ +@ RUN: | llvm-readobj -s - | FileCheck %s + + .syntax unified + .text + .thumb + + .section .text,"xr",one_only,a + + .def a; + .scl 2; + .type 32; + .endef +a: + movs r0, #65 + bx lr + + .section .text,"xr",one_only,b + + .def b; + .scl 2; + .type 32; + .endef + .thumb_func +b: + movs r0, #66 + bx lr + +@ CHECK: Sections [ +@ CHECK: Section { +@ CHECK: Name: .text +@ CHECK: Characteristics [ +@ CHECK: IMAGE_SCN_CNT_CODE +@ CHECK: IMAGE_SCN_MEM_16BIT +@ CHECK: IMAGE_SCN_MEM_EXECUTE +@ CHECK: IMAGE_SCN_MEM_READ +@ CHECK: ] +@ CHECK: } +@ CHECK: Section { +@ CHECK: Name: .text +@ CHECK: Characteristics [ +@ CHECK: IMAGE_SCN_CNT_CODE +@ CHECK: IMAGE_SCN_MEM_16BIT +@ CHECK: IMAGE_SCN_MEM_EXECUTE +@ CHECK: IMAGE_SCN_MEM_READ +@ CHECK: ] +@ CHECK: } +@ CHECK: Section { +@ CHECK: Name: .text +@ CHECK: Characteristics [ +@ CHECK: IMAGE_SCN_CNT_CODE +@ CHECK: IMAGE_SCN_MEM_16BIT +@ CHECK: IMAGE_SCN_MEM_EXECUTE +@ CHECK: IMAGE_SCN_MEM_READ +@ CHECK: ] +@ CHECK: } +@ CHECK: ] + diff --git a/test/MC/ARM/Windows/text-attributes.s b/test/MC/ARM/Windows/text-attributes.s new file mode 100644 index 000000000000..62aa028789fb --- /dev/null +++ b/test/MC/ARM/Windows/text-attributes.s @@ -0,0 +1,30 @@ +@ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \ +@ RUN: | llvm-readobj -s - | FileCheck %s + + .syntax unified + .thumb + + .text + + .def function + .type 32 + .scl 2 + .endef + .global function + .thumb_func +function: + bx lr + +@ CHECK: Sections [ +@ CHECK: Section { +@ CHECK: Name: .text +@ CHECK: Characteristics [ +@ CHECK: IMAGE_SCN_ALIGN_4BYTES +@ CHECK: IMAGE_SCN_CNT_CODE +@ CHECK: IMAGE_SCN_MEM_16BIT +@ CHECK: IMAGE_SCN_MEM_EXECUTE +@ CHECK: IMAGE_SCN_MEM_PURGEABLE +@ CHECK: IMAGE_SCN_MEM_READ +@ CHECK: ] +@ CHECK: } +@ CHECK: ] diff --git a/test/MC/ARM/arm-elf-symver.s b/test/MC/ARM/arm-elf-symver.s new file mode 100644 index 000000000000..5fb1f6a0f3eb --- /dev/null +++ b/test/MC/ARM/arm-elf-symver.s @@ -0,0 +1,143 @@ +@ RUN: llvm-mc -filetype=obj -triple arm-none-linux-gnueabi %s -o - | llvm-readobj -r -t | FileCheck %s +@ RUN: llvm-mc -filetype=obj -triple thumb-none-linux-gnueabi %s -o - | llvm-readobj -r -t | FileCheck %s + +defined1: +defined2: +defined3: + .symver defined1, bar1@zed + .symver undefined1, bar2@zed + + .symver defined2, bar3@@zed + + .symver defined3, bar5@@@zed + .symver undefined3, bar6@@@zed + + .long defined1 + .long undefined1 + .long defined2 + .long defined3 + .long undefined3 + + .global global1 + .symver global1, g1@@zed +global1: + +@ CHECK: Relocations [ +@ CHECK-NEXT: Section (2) .rel.text { +@ CHECK-NEXT: 0x0 R_ARM_ABS32 .text 0x0 +@ CHECK-NEXT: 0x4 R_ARM_ABS32 bar2@zed 0x0 +@ CHECK-NEXT: 0x8 R_ARM_ABS32 .text 0x0 +@ CHECK-NEXT: 0xC R_ARM_ABS32 .text 0x0 +@ CHECK-NEXT: 0x10 R_ARM_ABS32 bar6@zed 0x0 +@ CHECK-NEXT: } +@ CHECK-NEXT: ] + +@ CHECK: Symbol { +@ CHECK: Name: bar1@zed +@ CHECK-NEXT: Value: 0x0 +@ CHECK-NEXT: Size: 0 +@ CHECK-NEXT: Binding: Local (0x0) +@ CHECK-NEXT: Type: None (0x0) +@ CHECK-NEXT: Other: 0 +@ CHECK-NEXT: Section: .text (0x1) +@ CHECK-NEXT: } +@ CHECK-NEXT: Symbol { +@ CHECK-NEXT: Name: bar3@@zed +@ CHECK-NEXT: Value: 0x0 +@ CHECK-NEXT: Size: 0 +@ CHECK-NEXT: Binding: Local (0x0) +@ CHECK-NEXT: Type: None (0x0) +@ CHECK-NEXT: Other: 0 +@ CHECK-NEXT: Section: .text (0x1) +@ CHECK-NEXT: } +@ CHECK-NEXT: Symbol { +@ CHECK-NEXT: Name: bar5@@zed +@ CHECK-NEXT: Value: 0x0 +@ CHECK-NEXT: Size: 0 +@ CHECK-NEXT: Binding: Local (0x0) +@ CHECK-NEXT: Type: None (0x0) +@ CHECK-NEXT: Other: 0 +@ CHECK-NEXT: Section: .text (0x1) +@ CHECK-NEXT: } +@ CHECK-NEXT: Symbol { +@ CHECK-NEXT: Name: defined1 +@ CHECK-NEXT: Value: 0x0 +@ CHECK-NEXT: Size: 0 +@ CHECK-NEXT: Binding: Local (0x0) +@ CHECK-NEXT: Type: None (0x0) +@ CHECK-NEXT: Other: 0 +@ CHECK-NEXT: Section: .text (0x1) +@ CHECK-NEXT: } +@ CHECK-NEXT: Symbol { +@ CHECK-NEXT: Name: defined2 +@ CHECK-NEXT: Value: 0x0 +@ CHECK-NEXT: Size: 0 +@ CHECK-NEXT: Binding: Local (0x0) +@ CHECK-NEXT: Type: None (0x0) +@ CHECK-NEXT: Other: 0 +@ CHECK-NEXT: Section: .text (0x1) +@ CHECK-NEXT: } +@ CHECK-NEXT: Symbol { +@ CHECK-NEXT: Name: .text (0) +@ CHECK-NEXT: Value: 0x0 +@ CHECK-NEXT: Size: 0 +@ CHECK-NEXT: Binding: Local (0x0) +@ CHECK-NEXT: Type: Section (0x3) +@ CHECK-NEXT: Other: 0 +@ CHECK-NEXT: Section: .text (0x1) +@ CHECK-NEXT: } +@ CHECK-NEXT: Symbol { +@ CHECK-NEXT: Name: .data (0) +@ CHECK-NEXT: Value: 0x0 +@ CHECK-NEXT: Size: 0 +@ CHECK-NEXT: Binding: Local (0x0) +@ CHECK-NEXT: Type: Section (0x3) +@ CHECK-NEXT: Other: 0 +@ CHECK-NEXT: Section: .data (0x3) +@ CHECK-NEXT: } +@ CHECK-NEXT: Symbol { +@ CHECK-NEXT: Name: .bss (0) +@ CHECK-NEXT: Value: 0x0 +@ CHECK-NEXT: Size: 0 +@ CHECK-NEXT: Binding: Local (0x0) +@ CHECK-NEXT: Type: Section (0x3) +@ CHECK-NEXT: Other: 0 +@ CHECK-NEXT: Section: .bss (0x4) +@ CHECK-NEXT: } +@ CHECK-NEXT: Symbol { +@ CHECK-NEXT: Name: g1@@zed +@ CHECK-NEXT: Value: 0x14 +@ CHECK-NEXT: Size: 0 +@ CHECK-NEXT: Binding: Global (0x1) +@ CHECK-NEXT: Type: None (0x0) +@ CHECK-NEXT: Other: 0 +@ CHECK-NEXT: Section: .text (0x1) +@ CHECK-NEXT: } +@ CHECK-NEXT: Symbol { +@ CHECK-NEXT: Name: global1 +@ CHECK-NEXT: Value: 0x14 +@ CHECK-NEXT: Size: 0 +@ CHECK-NEXT: Binding: Global (0x1) +@ CHECK-NEXT: Type: None (0x0) +@ CHECK-NEXT: Other: 0 +@ CHECK-NEXT: Section: .text (0x1) +@ CHECK-NEXT: } +@ CHECK-NEXT: Symbol { +@ CHECK-NEXT: Name: bar2@zed +@ CHECK-NEXT: Value: 0x0 +@ CHECK-NEXT: Size: 0 +@ CHECK-NEXT: Binding: Global (0x1) +@ CHECK-NEXT: Type: None (0x0) +@ CHECK-NEXT: Other: 0 +@ CHECK-NEXT: Section: Undefined (0x0) +@ CHECK-NEXT: } +@ CHECK-NEXT: Symbol { +@ CHECK-NEXT: Name: bar6@zed +@ CHECK-NEXT: Value: 0x0 +@ CHECK-NEXT: Size: 0 +@ CHECK-NEXT: Binding: Global (0x1) +@ CHECK-NEXT: Type: None (0x0) +@ CHECK-NEXT: Other: 0 +@ CHECK-NEXT: Section: Undefined (0x0) +@ CHECK-NEXT: } +@ CHECK-NEXT: ] diff --git a/test/MC/ARM/arm-ldrd.s b/test/MC/ARM/arm-ldrd.s index c26ee25aad7d..af4bc735f39c 100644 --- a/test/MC/ARM/arm-ldrd.s +++ b/test/MC/ARM/arm-ldrd.s @@ -1,4 +1,4 @@ -// RUN: not llvm-mc -arch arm -mattr=+v5te %s 2>&1 | FileCheck %s +// RUN: not llvm-mc -triple arm-eabi -mattr=+v5te %s -o /dev/null 2>&1 | FileCheck %s // // rdar://14479793 diff --git a/test/MC/ARM/arm-memory-instructions.s b/test/MC/ARM/arm-memory-instructions.s index ad35dd26a04a..f41c779b8f6b 100644 --- a/test/MC/ARM/arm-memory-instructions.s +++ b/test/MC/ARM/arm-memory-instructions.s @@ -485,3 +485,14 @@ Lbaz: .quad 0 @ CHECK: strht r8, [r1], #-25 @ encoding: [0xb9,0x81,0x61,0xe0] @ CHECK: strht r5, [r3], r4 @ encoding: [0xb4,0x50,0xa3,0xe0] @ CHECK: strht r6, [r8], -r0 @ encoding: [0xb0,0x60,0x28,0xe0] + +@------------------------------------------------------------------------------ +@ GNU Assembler Compatibility +@------------------------------------------------------------------------------ + + ldrd r0, [sp] + strd r0, [sp] + +@ CHECK: ldrd r0, r1, [sp] @ encoding: [0xd0,0x00,0xcd,0xe1] +@ CHECK: strd r0, r1, [sp] @ encoding: [0xf0,0x00,0xcd,0xe1] + diff --git a/test/MC/ARM/arm-qualifier-diagnostics.s b/test/MC/ARM/arm-qualifier-diagnostics.s new file mode 100644 index 000000000000..8b75eee5de20 --- /dev/null +++ b/test/MC/ARM/arm-qualifier-diagnostics.s @@ -0,0 +1,15 @@ +@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o - %s 2>&1 | FileCheck %s + + .syntax unified + + .type function,%function +function: + ldr.n r0, [r0] + +@ CHECK: error: instruction with .n (narrow) qualifier not allowed in arm mode +@ CHECK: ldr.n r0, [r0] +@ CHECK: ^ +@ CHECK-NOT: error: unexpected token in operand +@ CHECK-NOT: ldr.n r0, [r0] +@ CHECK-NOT: ^ + diff --git a/test/MC/ARM/arm-thumb-cpus-default.s b/test/MC/ARM/arm-thumb-cpus-default.s index 636ee3c50571..d7a18490ffc5 100644 --- a/test/MC/ARM/arm-thumb-cpus-default.s +++ b/test/MC/ARM/arm-thumb-cpus-default.s @@ -1,9 +1,20 @@ -@ RUN: llvm-mc -show-encoding -arch=arm < %s | FileCheck %s --check-prefix=CHECK-ARM-ONLY -@ RUN: llvm-mc -show-encoding -triple=armv4t < %s | FileCheck %s --check-prefix=CHECK-ARM-THUMB -@ RUN: llvm-mc -show-encoding -arch=arm -mcpu=cortex-a15 < %s| FileCheck %s --check-prefix=CHECK-ARM-THUMB -@ RUN: llvm-mc -show-encoding -arch=arm -mcpu=cortex-m3 < %s | FileCheck %s --check-prefix=CHECK-THUMB-ONLY -@ RUN: llvm-mc -show-encoding -triple=armv7m < %s | FileCheck %s --check-prefix=CHECK-THUMB-ONLY -@ RUN: llvm-mc -show-encoding -triple=armv6m < %s | FileCheck %s --check-prefix=CHECK-THUMB-ONLY +@ RUN: llvm-mc -show-encoding -triple=arm-eabi < %s \ +@ RUN: | FileCheck %s --check-prefix=CHECK-ARM-ONLY + +@ RUN: llvm-mc -show-encoding -triple=armv4t-eabi < %s \ +@ RUN: | FileCheck %s --check-prefix=CHECK-ARM-THUMB + +@ RUN: llvm-mc -show-encoding -triple=arm-eabi -mcpu=cortex-a15 < %s \ +@ RUN: | FileCheck %s --check-prefix=CHECK-ARM-THUMB + +@ RUN: llvm-mc -show-encoding -triple=arm-eabi -mcpu=cortex-m3 < %s \ +@ RUN: | FileCheck %s --check-prefix=CHECK-THUMB-ONLY + +@ RUN: llvm-mc -show-encoding -triple=armv7m-eabi < %s \ +@ RUN: | FileCheck %s --check-prefix=CHECK-THUMB-ONLY + +@ RUN: llvm-mc -show-encoding -triple=armv6m-eabi < %s \ +@ RUN: | FileCheck %s --check-prefix=CHECK-THUMB-ONLY @ Make sure the architecture chosen by LLVM defaults to a compatible @ ARM/Thumb mode. diff --git a/test/MC/ARM/arm-thumb-cpus.s b/test/MC/ARM/arm-thumb-cpus.s index 24be989db330..9005c7f2a174 100644 --- a/test/MC/ARM/arm-thumb-cpus.s +++ b/test/MC/ARM/arm-thumb-cpus.s @@ -1,9 +1,20 @@ -@ RUN: not llvm-mc -show-encoding -arch=arm < %s 2>&1 | FileCheck %s --check-prefix=CHECK-ARM-ONLY -@ RUN: llvm-mc -show-encoding -triple=armv4t < %s 2>&1| FileCheck %s --check-prefix=CHECK-ARM-THUMB -@ RUN: llvm-mc -show-encoding -arch=arm -mcpu=cortex-a15 < %s 2>&1| FileCheck %s --check-prefix=CHECK-ARM-THUMB -@ RUN: not llvm-mc -show-encoding -arch=arm -mcpu=cortex-m3 < %s 2>&1 | FileCheck %s --check-prefix=CHECK-THUMB-ONLY -@ RUN: not llvm-mc -show-encoding -triple=armv7m < %s 2>&1 | FileCheck %s --check-prefix=CHECK-THUMB-ONLY -@ RUN: not llvm-mc -show-encoding -triple=armv6m < %s 2>&1 | FileCheck %s --check-prefix=CHECK-THUMB-ONLY +@ RUN: not llvm-mc -show-encoding -triple=arm-eabi < %s 2>&1 \ +@ RUN: | FileCheck %s --check-prefix=CHECK-ARM-ONLY + +@ RUN: llvm-mc -show-encoding -triple=armv4t < %s 2>&1 \ +@ RUN: | FileCheck %s --check-prefix=CHECK-ARM-THUMB + +@ RUN: llvm-mc -show-encoding -triple=arm-eabi -mcpu=cortex-a15 < %s 2>&1 \ +@ RUN: | FileCheck %s --check-prefix=CHECK-ARM-THUMB + +@ RUN: not llvm-mc -show-encoding -triple=arm-eabi -mcpu=cortex-m3 < %s 2>&1 \ +@ RUN: | FileCheck %s --check-prefix=CHECK-THUMB-ONLY + +@ RUN: not llvm-mc -show-encoding -triple=armv7m-eabi < %s 2>&1 \ +@ RUN: | FileCheck %s --check-prefix=CHECK-THUMB-ONLY + +@ RUN: not llvm-mc -show-encoding -triple=armv6m-eabi < %s 2>&1 \ +@ RUN: | FileCheck %s --check-prefix=CHECK-THUMB-ONLY @ Make sure correct diagnostics are given for CPUs without support for @ one or other of the execution states. diff --git a/test/MC/ARM/arm_addrmode2.s b/test/MC/ARM/arm_addrmode2.s index ca99233b9b5c..53290ab0dd3e 100644 --- a/test/MC/ARM/arm_addrmode2.s +++ b/test/MC/ARM/arm_addrmode2.s @@ -4,27 +4,35 @@ @ CHECK: ldrt r1, [r0], r2 @ encoding: [0x02,0x10,0xb0,0xe6] @ CHECK: ldrt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xb0,0xe6] @ CHECK: ldrt r1, [r0], #4 @ encoding: [0x04,0x10,0xb0,0xe4] +@ CHECK: ldrt r1, [r0], #0 @ encoding: [0x00,0x10,0xb0,0xe4] @ CHECK: ldrbt r1, [r0], r2 @ encoding: [0x02,0x10,0xf0,0xe6] @ CHECK: ldrbt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xf0,0xe6] @ CHECK: ldrbt r1, [r0], #4 @ encoding: [0x04,0x10,0xf0,0xe4] +@ CHECK: ldrbt r1, [r0], #0 @ encoding: [0x00,0x10,0xf0,0xe4] @ CHECK: strt r1, [r0], r2 @ encoding: [0x02,0x10,0xa0,0xe6] @ CHECK: strt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xa0,0xe6] @ CHECK: strt r1, [r0], #4 @ encoding: [0x04,0x10,0xa0,0xe4] +@ CHECK: strt r1, [r0], #0 @ encoding: [0x00,0x10,0xa0,0xe4] @ CHECK: strbt r1, [r0], r2 @ encoding: [0x02,0x10,0xe0,0xe6] @ CHECK: strbt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xe0,0xe6] @ CHECK: strbt r1, [r0], #4 @ encoding: [0x04,0x10,0xe0,0xe4] +@ CHECK: strbt r1, [r0], #0 @ encoding: [0x00,0x10,0xe0,0xe4] ldrt r1, [r0], r2 ldrt r1, [r0], r2, lsr #3 ldrt r1, [r0], #4 + ldrt r1, [r0] ldrbt r1, [r0], r2 ldrbt r1, [r0], r2, lsr #3 ldrbt r1, [r0], #4 + ldrbt r1, [r0] strt r1, [r0], r2 strt r1, [r0], r2, lsr #3 strt r1, [r0], #4 + strt r1, [r0] strbt r1, [r0], r2 strbt r1, [r0], r2, lsr #3 strbt r1, [r0], #4 + strbt r1, [r0] @ Pre-indexed @ CHECK: ldr r1, [r0, r2, lsr #3]! @ encoding: [0xa2,0x11,0xb0,0xe7] diff --git a/test/MC/ARM/arm_fixups.s b/test/MC/ARM/arm_fixups.s index 99eb3c539416..1f56e1285245 100644 --- a/test/MC/ARM/arm_fixups.s +++ b/test/MC/ARM/arm_fixups.s @@ -1,9 +1,13 @@ @ RUN: llvm-mc -triple armv7-unknown-unknown %s --show-encoding > %t @ RUN: FileCheck < %t %s +@ RUN: llvm-mc -triple armebv7-unknown-unknown %s --show-encoding > %t +@ RUN: FileCheck --check-prefix=CHECK-BE < %t %s bl _printf @ CHECK: bl _printf @ encoding: [A,A,A,0xeb] @ CHECK: @ fixup A - offset: 0, value: _printf, kind: fixup_arm_uncondbl +@ CHECK-BE: bl _printf @ encoding: [0xeb,A,A,A] +@ CHECK-BE: @ fixup A - offset: 0, value: _printf, kind: fixup_arm_uncondbl mov r9, :lower16:(_foo) movw r9, :lower16:(_foo) @@ -11,12 +15,20 @@ @ CHECK: movw r9, :lower16:_foo @ encoding: [A,0x90'A',0b0000AAAA,0xe3] @ CHECK: @ fixup A - offset: 0, value: _foo, kind: fixup_arm_movw_lo16 +@ CHECK-BE: movw r9, :lower16:_foo @ encoding: [0xe3,0b0000AAAA,0x90'A',A] +@ CHECK-BE: @ fixup A - offset: 0, value: _foo, kind: fixup_arm_movw_lo16 @ CHECK: movw r9, :lower16:_foo @ encoding: [A,0x90'A',0b0000AAAA,0xe3] @ CHECK: @ fixup A - offset: 0, value: _foo, kind: fixup_arm_movw_lo16 +@ CHECK-BE: movw r9, :lower16:_foo @ encoding: [0xe3,0b0000AAAA,0x90'A',A] +@ CHECK-BE: @ fixup A - offset: 0, value: _foo, kind: fixup_arm_movw_lo16 @ CHECK: movt r9, :upper16:_foo @ encoding: [A,0x90'A',0b0100AAAA,0xe3] @ CHECK: @ fixup A - offset: 0, value: _foo, kind: fixup_arm_movt_hi16 +@ CHECK-BE: movt r9, :upper16:_foo @ encoding: [0xe3,0b0100AAAA,0x90'A',A] +@ CHECK-BE: @ fixup A - offset: 0, value: _foo, kind: fixup_arm_movt_hi16 - mov r2, fred + mov r2, :lower16:fred -@ CHECK: movw r2, fred @ encoding: [A,0x20'A',0b0000AAAA,0xe3] +@ CHECK: movw r2, :lower16:fred @ encoding: [A,0x20'A',0b0000AAAA,0xe3] @ CHECK: @ fixup A - offset: 0, value: fred, kind: fixup_arm_movw_lo16 +@ CHECK-BE: movw r2, :lower16:fred @ encoding: [0xe3,0b0000AAAA,0x20'A',A] +@ CHECK-BE: @ fixup A - offset: 0, value: fred, kind: fixup_arm_movw_lo16 diff --git a/test/MC/ARM/arm_word_directive.s b/test/MC/ARM/arm_word_directive.s deleted file mode 100644 index e782479b6081..000000000000 --- a/test/MC/ARM/arm_word_directive.s +++ /dev/null @@ -1,6 +0,0 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown %s | FileCheck %s - -@ CHECK: TEST0: -@ CHECK: .long 3 -TEST0: - .word 3 diff --git a/test/MC/ARM/basic-arm-instructions.s b/test/MC/ARM/basic-arm-instructions.s index 29bc6c07cc6c..e5e96170a775 100644 --- a/test/MC/ARM/basic-arm-instructions.s +++ b/test/MC/ARM/basic-arm-instructions.s @@ -1,4 +1,5 @@ @ RUN: llvm-mc -triple=armv7-apple-darwin -mcpu=cortex-a8 -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -triple=armebv7-unknown-unknown -mcpu=cortex-a8 -show-encoding < %s | FileCheck --check-prefix=CHECK-BE %s .syntax unified .globl _func @@ -135,8 +136,12 @@ Lforward: @ CHECK: Lback: @ CHECK: adr r2, Lback @ encoding: [A,0x20'A',0x0f'A',0xe2'A'] @ CHECK: @ fixup A - offset: 0, value: Lback, kind: fixup_arm_adr_pcrel_12 +@ CHECK-BE: adr r2, Lback @ encoding: [0xe2'A',0x0f'A',0x20'A',A] +@ CHECK-BE: @ fixup A - offset: 0, value: Lback, kind: fixup_arm_adr_pcrel_12 @ CHECK: adr r3, Lforward @ encoding: [A,0x30'A',0x0f'A',0xe2'A'] @ CHECK: @ fixup A - offset: 0, value: Lforward, kind: fixup_arm_adr_pcrel_12 +@ CHECK-BE: adr r3, Lforward @ encoding: [0xe2'A',0x0f'A',0x30'A',A] +@ CHECK-BE: @ fixup A - offset: 0, value: Lforward, kind: fixup_arm_adr_pcrel_12 @ CHECK: Lforward: @ CHECK: adr r2, #3 @ encoding: [0x03,0x20,0x8f,0xe2] @ CHECK: adr r2, #-3 @ encoding: [0x03,0x20,0x4f,0xe2] @@ -310,9 +315,13 @@ Lforward: beq _baz @ CHECK: b _bar @ encoding: [A,A,A,0xea] - @ fixup A - offset: 0, value: _bar, kind: fixup_arm_uncondbranch +@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_uncondbranch +@ CHECK-BE: b _bar @ encoding: [0xea,A,A,A] +@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_uncondbranch @ CHECK: beq _baz @ encoding: [A,A,A,0x0a] - @ fixup A - offset: 0, value: _baz, kind: fixup_arm_condbranch +@ CHECK: @ fixup A - offset: 0, value: _baz, kind: fixup_arm_condbranch +@ CHECK-BE: beq _baz @ encoding: [0x0a,A,A,A] +@ CHECK-BE: @ fixup A - offset: 0, value: _baz, kind: fixup_arm_condbranch @------------------------------------------------------------------------------ @@ -420,10 +429,16 @@ Lforward: @ CHECK: bl _bar @ encoding: [A,A,A,0xeb] @ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_uncondbl +@ CHECK-BE: bl _bar @ encoding: [0xeb,A,A,A] +@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_uncondbl @ CHECK: bleq _bar @ encoding: [A,A,A,0x0b] @ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_condbl +@ CHECK-BE: bleq _bar @ encoding: [0x0b,A,A,A] +@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_condbl @ CHECK: blx _bar @ encoding: [A,A,A,0xfa] - @ fixup A - offset: 0, value: _bar, kind: fixup_arm_blx +@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_blx +@ CHECK-BE: blx _bar @ encoding: [0xfa,A,A,A] +@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_blx @ CHECK: blls #28634268 @ encoding: [0x27,0x3b,0x6d,0x9b] @ CHECK: blx #32424576 @ encoding: [0xa0,0xb0,0x7b,0xfa] @ CHECK: blx #16212288 @ encoding: [0x50,0xd8,0x3d,0xfa] diff --git a/test/MC/ARM/basic-thumb-instructions.s b/test/MC/ARM/basic-thumb-instructions.s index dec7f5b13334..30ab733375ba 100644 --- a/test/MC/ARM/basic-thumb-instructions.s +++ b/test/MC/ARM/basic-thumb-instructions.s @@ -4,6 +4,7 @@ @--- @ RUN: llvm-mc -triple=thumbv6-apple-darwin -show-encoding < %s | FileCheck %s @ RUN: llvm-mc -triple=thumbv7-apple-darwin -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -triple=thumbebv7-unknown-unknown -show-encoding < %s | FileCheck --check-prefix=CHECK-BE %s .syntax unified .globl _func @@ -90,7 +91,9 @@ _func: adr r3, #1020 @ CHECK: adr r2, _baz @ encoding: [A,0xa2] - @ fixup A - offset: 0, value: _baz, kind: fixup_thumb_adr_pcrel_10 +@ CHECK: @ fixup A - offset: 0, value: _baz, kind: fixup_thumb_adr_pcrel_10 +@ CHECK-BE: adr r2, _baz @ encoding: [0xa2,A] +@ CHECK-BE: @ fixup A - offset: 0, value: _baz, kind: fixup_thumb_adr_pcrel_10 @ CHECK: adr r5, #0 @ encoding: [0x00,0xa5] @ CHECK: adr r2, #4 @ encoding: [0x01,0xa2] @ CHECK: adr r3, #1020 @ encoding: [0xff,0xa3] @@ -132,9 +135,13 @@ _func: beq #160 @ CHECK: b _baz @ encoding: [A,0xe0'A'] - @ fixup A - offset: 0, value: _baz, kind: fixup_arm_thumb_br +@ CHECK: @ fixup A - offset: 0, value: _baz, kind: fixup_arm_thumb_br +@ CHECK-BE: b _baz @ encoding: [0xe0'A',A] +@ CHECK-BE: @ fixup A - offset: 0, value: _baz, kind: fixup_arm_thumb_br @ CHECK: beq _bar @ encoding: [A,0xd0] - @ fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_bcc +@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_bcc +@ CHECK-BE: beq _bar @ encoding: [0xd0,A] +@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_bcc @ CHECK: b #1838 @ encoding: [0x97,0xe3] @ CHECK: b #-420 @ encoding: [0x2e,0xe7] @ CHECK: beq #-256 @ encoding: [0x80,0xd0] @@ -174,9 +181,13 @@ _func: blx _baz @ CHECK: bl _bar @ encoding: [A,0xf0'A',A,0xd0'A'] - @ fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_bl +@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_bl +@ CHECK-BE: bl _bar @ encoding: [0xf0'A',A,0xd0'A',A] +@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_bl @ CHECK: blx _baz @ encoding: [A,0xf0'A',A,0xc0'A'] - @ fixup A - offset: 0, value: _baz, kind: fixup_arm_thumb_blx +@ CHECK: @ fixup A - offset: 0, value: _baz, kind: fixup_arm_thumb_blx +@ CHECK-BE: blx _baz @ encoding: [0xf0'A',A,0xc0'A',A] +@ CHECK-BE: @ fixup A - offset: 0, value: _baz, kind: fixup_arm_thumb_blx @------------------------------------------------------------------------------ @@ -272,7 +283,9 @@ _func: ldr r3, #368 @ CHECK: ldr r1, _foo @ encoding: [A,0x49] - @ fixup A - offset: 0, value: _foo, kind: fixup_arm_thumb_cp +@ CHECK: @ fixup A - offset: 0, value: _foo, kind: fixup_arm_thumb_cp +@ CHECK-BE: ldr r1, _foo @ encoding: [0x49,A] +@ CHECK-BE: @ fixup A - offset: 0, value: _foo, kind: fixup_arm_thumb_cp @ CHECK: ldr r3, [pc, #604] @ encoding: [0x97,0x4b] @ CHECK: ldr r3, [pc, #368] @ encoding: [0x5c,0x4b] diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s index 3a5f48832c15..05e0b2b574e9 100644 --- a/test/MC/ARM/basic-thumb2-instructions.s +++ b/test/MC/ARM/basic-thumb2-instructions.s @@ -1,4 +1,5 @@ @ RUN: llvm-mc -triple=thumbv7-apple-darwin -mcpu=cortex-a8 -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -triple=thumbebv7-unknown-unknown -mcpu=cortex-a8 -show-encoding < %s | FileCheck --check-prefix=CHECK-BE %s .syntax unified .globl _func @@ -227,12 +228,18 @@ _func: bmi.w #-183396 @ CHECK: b.w _bar @ encoding: [A,0xf0'A',A,0x90'A'] - @ fixup A - offset: 0, value: _bar, kind: fixup_t2_uncondbranch +@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_uncondbranch +@ CHECK-BE: b.w _bar @ encoding: [0xf0'A',A,0x90'A',A] +@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_uncondbranch @ CHECK: beq.w _bar @ encoding: [A,0xf0'A',A,0x80'A'] - @ fixup A - offset: 0, value: _bar, kind: fixup_t2_condbranch +@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_condbranch +@ CHECK-BE: beq.w _bar @ encoding: [0xf0'A',A,0x80'A',A] +@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_condbranch @ CHECK: it eq @ encoding: [0x08,0xbf] @ CHECK: beq.w _bar @ encoding: [A,0xf0'A',A,0x90'A'] - @ fixup A - offset: 0, value: _bar, kind: fixup_t2_uncondbranch +@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_uncondbranch +@ CHECK-BE: beq.w _bar @ encoding: [0xf0'A',A,0x90'A',A] +@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_uncondbranch @ CHECK: bmi.w #-183396 @ encoding: [0x13,0xf5,0xce,0xa9] @@ -332,9 +339,13 @@ _func: @ CHECK: cbnz r7, #6 @ encoding: [0x1f,0xb9] @ CHECK: cbnz r7, #12 @ encoding: [0x37,0xb9] @ CHECK: cbz r6, _bar @ encoding: [0x06'A',0xb1'A'] - @ fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_cb +@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_cb +@ CHECK-BE: cbz r6, _bar @ encoding: [0xb1'A',0x06'A'] +@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_cb @ CHECK: cbnz r6, _bar @ encoding: [0x06'A',0xb9'A'] - @ fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_cb +@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_cb +@ CHECK-BE: cbnz r6, _bar @ encoding: [0xb9'A',0x06'A'] +@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_cb @------------------------------------------------------------------------------ @@ -800,11 +811,20 @@ _func: @------------------------------------------------------------------------------ ldr.w r5, _foo ldr lr, (_strcmp-4) + ldr sp, _foo @ CHECK: ldr.w r5, _foo @ encoding: [0x5f'A',0xf8'A',A,0x50'A'] @ CHECK: @ fixup A - offset: 0, value: _foo, kind: fixup_t2_ldst_pcrel_12 +@ CHECK-BE: ldr.w r5, _foo @ encoding: [0xf8'A',0x5f'A',0x50'A',A] +@ CHECK-BE: @ fixup A - offset: 0, value: _foo, kind: fixup_t2_ldst_pcrel_12 @ CHECK: ldr.w lr, _strcmp-4 @ encoding: [0x5f'A',0xf8'A',A,0xe0'A'] @ CHECK: @ fixup A - offset: 0, value: _strcmp-4, kind: fixup_t2_ldst_pcrel_12 +@ CHECK-BE: ldr.w lr, _strcmp-4 @ encoding: [0xf8'A',0x5f'A',0xe0'A',A] +@ CHECK-BE: @ fixup A - offset: 0, value: _strcmp-4, kind: fixup_t2_ldst_pcrel_12 +@ CHECK: ldr.w sp, _foo @ encoding: [0x5f'A',0xf8'A',A,0xd0'A'] +@ CHECK: @ fixup A - offset: 0, value: _foo, kind: fixup_t2_ldst_pcrel_12 +@ CHECK-BE: ldr.w sp, _foo @ encoding: [0xf8'A',0x5f'A',0xd0'A',A] +@ CHECK-BE: @ fixup A - offset: 0, value: _foo, kind: fixup_t2_ldst_pcrel_12 ldr r7, [pc, #8] ldr.n r7, [pc, #8] @@ -818,19 +838,21 @@ _func: ldr r8, [pc, #132] ldr pc, [pc, #256] ldr pc, [pc, #-400] + ldr sp, [pc, #4] @ CHECK: ldr r7, [pc, #8] @ encoding: [0x02,0x4f] @ CHECK: ldr r7, [pc, #8] @ encoding: [0x02,0x4f] @ CHECK: ldr.w r7, [pc, #8] @ encoding: [0xdf,0xf8,0x08,0x70] -@ CHECK: ldr r4, [pc, #1020] @ encoding: [0xff,0x4c] +@ CHECK: ldr r4, [pc, #1020] @ encoding: [0xff,0x4c] @ CHECK: ldr.w r3, [pc, #-1020] @ encoding: [0x5f,0xf8,0xfc,0x33] -@ CHECK: ldr.w r6, [pc, #1024] @ encoding: [0xdf,0xf8,0x00,0x64] -@ CHECK: ldr.w r0, [pc, #-1024] @ encoding: [0x5f,0xf8,0x00,0x04] -@ CHECK: ldr.w r2, [pc, #4095] @ encoding: [0xdf,0xf8,0xff,0x2f] -@ CHECK: ldr.w r1, [pc, #-4095] @ encoding: [0x5f,0xf8,0xff,0x1f] -@ CHECK: ldr.w r8, [pc, #132] @ encoding: [0xdf,0xf8,0x84,0x80] +@ CHECK: ldr.w r6, [pc, #1024] @ encoding: [0xdf,0xf8,0x00,0x64] +@ CHECK: ldr.w r0, [pc, #-1024] @ encoding: [0x5f,0xf8,0x00,0x04] +@ CHECK: ldr.w r2, [pc, #4095] @ encoding: [0xdf,0xf8,0xff,0x2f] +@ CHECK: ldr.w r1, [pc, #-4095] @ encoding: [0x5f,0xf8,0xff,0x1f] +@ CHECK: ldr.w r8, [pc, #132] @ encoding: [0xdf,0xf8,0x84,0x80] @ CHECK: ldr.w pc, [pc, #256] @ encoding: [0xdf,0xf8,0x00,0xf1] @ CHECK: ldr.w pc, [pc, #-400] @ encoding: [0x5f,0xf8,0x90,0xf1] +@ CHECK: ldr.w sp, [pc, #4] @ encoding: [0xdf,0xf8,0x04,0xd0] ldrb r9, [pc, #-0] ldrsb r11, [pc, #-0] @@ -839,9 +861,9 @@ _func: ldr r5, [pc, #-0] @ CHECK: ldrb.w r9, [pc, #-0] @ encoding: [0x1f,0xf8,0x00,0x90] -@ CHECK: ldrsb.w r11, [pc, #-0] @ encoding: [0x1f,0xf9,0x00,0xb0] +@ CHECK: ldrsb.w r11, [pc, #-0] @ encoding: [0x1f,0xf9,0x00,0xb0] @ CHECK: ldrh.w r10, [pc, #-0] @ encoding: [0x3f,0xf8,0x00,0xa0] -@ CHECK: ldrsh.w r1, [pc, #-0] @ encoding: [0x3f,0xf9,0x00,0x10] +@ CHECK: ldrsh.w r1, [pc, #-0] @ encoding: [0x3f,0xf9,0x00,0x10] @ CHECK: ldr.w r5, [pc, #-0] @ encoding: [0x5f,0xf8,0x00,0x50] @------------------------------------------------------------------------------ @@ -1022,6 +1044,8 @@ _func: @ CHECK: ldrh.w r5, _bar @ encoding: [0x3f'A',0xf8'A',A,0x50'A'] @ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_ldst_pcrel_12 +@ CHECK-BE: ldrh.w r5, _bar @ encoding: [0xf8'A',0x3f'A',0x50'A',A] +@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_ldst_pcrel_12 @------------------------------------------------------------------------------ @@ -1091,6 +1115,8 @@ _func: @ CHECK: ldrsb.w r5, _bar @ encoding: [0x1f'A',0xf9'A',A,0x50'A'] @ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_ldst_pcrel_12 +@ CHECK-BE: ldrsb.w r5, _bar @ encoding: [0xf9'A',0x1f'A',0x50'A',A] +@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_ldst_pcrel_12 @------------------------------------------------------------------------------ @@ -1160,6 +1186,8 @@ _func: @ CHECK: ldrsh.w r5, _bar @ encoding: [0x3f'A',0xf9'A',A,0x50'A'] @ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_ldst_pcrel_12 +@ CHECK-BE: ldrsh.w r5, _bar @ encoding: [0xf9'A',0x3f'A',0x50'A',A] +@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_ldst_pcrel_12 @ TEMPORARILY DISABLED: @ ldrsh.w r4, [pc, #1435] @@ -2777,6 +2805,9 @@ _func: strd r0, r1, [r2, #-0] strd r0, r1, [r2, #-0]! strd r0, r1, [r2], #-0 + strd r0, r1, [r2, #256] + strd r0, r1, [r2, #256]! + strd r0, r1, [r2], #256 @ CHECK: strd r3, r5, [r6, #24] @ encoding: [0xc6,0xe9,0x06,0x35] @ CHECK: strd r3, r5, [r6, #24]! @ encoding: [0xe6,0xe9,0x06,0x35] @@ -2787,6 +2818,9 @@ _func: @ CHECK: strd r0, r1, [r2, #-0] @ encoding: [0x42,0xe9,0x00,0x01] @ CHECK: strd r0, r1, [r2, #-0]! @ encoding: [0x62,0xe9,0x00,0x01] @ CHECK: strd r0, r1, [r2], #-0 @ encoding: [0x62,0xe8,0x00,0x01] +@ CHECK: strd r0, r1, [r2, #256] @ encoding: [0xc2,0xe9,0x40,0x01] +@ CHECK: strd r0, r1, [r2, #256]! @ encoding: [0xe2,0xe9,0x40,0x01] +@ CHECK: strd r0, r1, [r2], #256 @ encoding: [0xe2,0xe8,0x40,0x01] @------------------------------------------------------------------------------ diff --git a/test/MC/ARM/big-endian-arm-fixup.s b/test/MC/ARM/big-endian-arm-fixup.s new file mode 100644 index 000000000000..5fb9cef5028d --- /dev/null +++ b/test/MC/ARM/big-endian-arm-fixup.s @@ -0,0 +1,107 @@ +// RUN: llvm-mc -triple=armeb-eabi -mattr v7,vfp2 -filetype=obj < %s | llvm-objdump -s - | FileCheck %s + + .syntax unified + .text + .align 2 + .code 32 + +@ARM::fixup_arm_condbl +.section s_condbl,"ax",%progbits +// CHECK-LABEL: Contents of section s_condbl +// CHECK: 0000 0b000002 + bleq condbl_label+16 +condbl_label: + +@ARM::fixup_arm_uncondbl +.section s_uncondbl,"ax",%progbits +// CHECK-LABEL: Contents of section s_uncondbl +// CHECK: 0000 eb000002 + bl uncond_label+16 +uncond_label: + +@ARM::fixup_arm_blx +.section s_blx,"ax",%progbits +// CHECK-LABEL: Contents of section s_blx +// CHECK: 0000 fa000002 + blx blx_label+16 +blx_label: + +@ARM::fixup_arm_uncondbranch +.section s_uncondbranch,"ax",%progbits +// CHECK-LABEL: Contents of section s_uncondbranch +// CHECK: 0000 ea000003 + b uncondbranch_label+16 +uncondbranch_label: + +@ARM::fixup_arm_condbranch +.section s_condbranch,"ax",%progbits +// CHECK-LABEL: Contents of section s_condbranch +// CHECK: 0000 0a000003 + beq condbranch_label+16 +condbranch_label: + +@ARM::fixup_arm_pcrel_10 +.section s_arm_pcrel_10,"ax",%progbits +// CHECK-LABEL: Contents of section s_arm_pcrel_10 +// CHECK: 0000 ed9f0b03 + vldr d0, arm_pcrel_10_label+16 +arm_pcrel_10_label: + +@ARM::fixup_arm_ldst_pcrel_12 +.section s_arm_ldst_pcrel_12,"ax",%progbits +// CHECK-LABEL: Contents of section s_arm_ldst_pcrel_12 +// CHECK: 0000 e59f000c + ldr r0, arm_ldst_pcrel_12_label+16 +arm_ldst_pcrel_12_label: + +@ARM::fixup_arm_adr_pcrel_12 +.section s_arm_adr_pcrel_12,"ax",%progbits +// CHECK-LABEL: Contents of section s_arm_adr_pcrel_12 +// CHECK: 0000 e28f0010 + adr r0, arm_adr_pcrel_12_label+20 +arm_adr_pcrel_12_label: + +@ARM::fixup_arm_adr_pcrel_10_unscaled +.section s_arm_adr_pcrel_10_unscaled,"ax",%progbits +// CHECK-LABEL: Contents of section s_arm_adr_pcrel_10_unscaled +// CHECK: 0000 e1cf01d4 + ldrd r0, r1, arm_adr_pcrel_10_unscaled_label+24 +arm_adr_pcrel_10_unscaled_label: + +@ARM::fixup_arm_movw_lo16 +.section s_movw,"ax",%progbits +// CHECK-LABEL: Contents of section s_movw +// CHECK: 0000 e3000008 + movw r0, :lower16:(some_label+8) + +@ARM::fixup_arm_movt_hi16 +.section s_movt,"ax",%progbits +// CHECK-LABEL: Contents of section s_movt +// CHECK: 0000 e34f0ffc + movt r0, :upper16:GOT-(movt_label) +movt_label: + +@FK_Data_1 +.section s_fk_data_1 +// CHECK-LABEL: Contents of section s_fk_data_1 +// CHECK: 0000 01 +fk_data1_l_label: +.byte fk_data1_h_label-fk_data1_l_label +fk_data1_h_label: + +@FK_Data_2 +.section s_fk_data_2 +// CHECK-LABEL: Contents of section s_fk_data_2 +// CHECK: 0000 0002 +fk_data2_l_label: +.short fk_data2_h_label-fk_data2_l_label +fk_data2_h_label: + +@FK_Data_4 +.section s_fk_data_4 +// CHECK-LABEL: Contents of section s_fk_data_4 +// CHECK: 0000 00000004 +fk_data4_l_label: +.long fk_data4_h_label-fk_data4_l_label +fk_data4_h_label: + diff --git a/test/MC/ARM/big-endian-thumb-fixup.s b/test/MC/ARM/big-endian-thumb-fixup.s new file mode 100644 index 000000000000..5023fca26be1 --- /dev/null +++ b/test/MC/ARM/big-endian-thumb-fixup.s @@ -0,0 +1,63 @@ +// RUN: llvm-mc -triple=armeb-eabi -mattr v7,vfp2 -filetype=obj < %s | llvm-objdump -s - | FileCheck %s + + .syntax unified + .text + .align 2 + .code 16 + +@ARM::fixup_arm_thumb_bl +.section s_thumb_bl,"ax",%progbits +// CHECK-LABEL: Contents of section s_thumb_bl +// CHECK: 0000 f000f801 + bl thumb_bl_label + nop +thumb_bl_label: + +@ARM::fixup_arm_thumb_blx +// CHECK-LABEL: Contents of section s_thumb_bl +// CHECK: 0000 f000e802 +.section s_thumb_blx,"ax",%progbits + blx thumb_blx_label+8 +thumb_blx_label: + +@ARM::fixup_arm_thumb_br +.section s_thumb_br,"ax",%progbits +// CHECK-LABEL: Contents of section s_thumb_br +// CHECK: 0000 e000bf00 + b thumb_br_label + nop +thumb_br_label: + +@ARM::fixup_arm_thumb_bcc +.section s_thumb_bcc,"ax",%progbits +// CHECK-LABEL: Contents of section s_thumb_bcc +// CHECK: 0000 d000bf00 + beq thumb_bcc_label + nop +thumb_bcc_label: + +@ARM::fixup_arm_thumb_cb +.section s_thumb_cb,"ax",%progbits +// CHECK-LABEL: Contents of section s_thumb_cb +// CHECK: 0000 b100bf00 + cbz r0, thumb_cb_label + nop +thumb_cb_label: + +@ARM::fixup_arm_thumb_cp +.section s_thumb_cp,"ax",%progbits +// CHECK-LABEL: Contents of section s_thumb_cp +// CHECK: 0000 4801bf00 + ldr r0, =thumb_cp_label + nop + nop +thumb_cp_label: + +@ARM::fixup_arm_thumb_adr_pcrel_10 +.section s_thumb_adr_pcrel_10,"ax",%progbits +// CHECK-LABEL: Contents of section s_thumb_adr_pcrel_10 +// CHECK: 0000 a000bf00 + adr r0, thumb_adr_pcrel_10_label + nop +thumb_adr_pcrel_10_label: + diff --git a/test/MC/ARM/big-endian-thumb2-fixup.s b/test/MC/ARM/big-endian-thumb2-fixup.s new file mode 100644 index 000000000000..4fd5276fce6e --- /dev/null +++ b/test/MC/ARM/big-endian-thumb2-fixup.s @@ -0,0 +1,49 @@ +// RUN: llvm-mc -triple=thumbeb-eabi -mattr v7,vfp2 -filetype=obj < %s | llvm-objdump -s - | FileCheck %s + + .syntax unified + .text + .align 2 + +@ARM::fixup_t2_movw_lo16 +.section s_movw,"ax",%progbits +// CHECK-LABEL: Contents of section s_movw +// CHECK: 0000 f2400008 + movw r0, :lower16:(some_label+8) + +@ARM::fixup_t2_movt_hi16 +.section s_movt,"ax",%progbits +// CHECK-LABEL: Contents of section s_movt +// CHECK: 0000 f6cf70fc + movt r0, :upper16:GOT-(movt_label) +movt_label: + +@ARM::fixup_t2_uncondbranch +.section s_uncondbranch,"ax",%progbits +// CHECK-LABEL: Contents of section s_uncondbranch +// CHECK: 0000 f000b801 bf00 + b.w uncond_label + nop +uncond_label: + +@ARM::fixup_t2_condbranch +.section s_condbranch,"ax",%progbits +// CHECK-LABEL: Contents of section s_condbranch +// CHECK: 0000 f0008001 bf00 + beq.w cond_label + nop +cond_label: + +@ARM::fixup_t2_ldst_precel_12 +.section s_ldst_precel_12,"ax",%progbits + ldr r0, ldst_precel_12_label + nop + nop +ldst_precel_12_label: + +@ARM::fixup_t2_adr_pcrel_12 +.section s_adr_pcrel_12,"ax",%progbits + adr r0, adr_pcrel_12_label + nop + nop +adr_pcrel_12_label: + diff --git a/test/MC/ARM/bkpt.s b/test/MC/ARM/bkpt.s new file mode 100644 index 000000000000..fcd4040b186f --- /dev/null +++ b/test/MC/ARM/bkpt.s @@ -0,0 +1,32 @@ +@ RUN: llvm-mc -triple armv7-unknown-unknown -filetype asm -o - %s | FileCheck %s + + .syntax unified + .thumb + + .global thumb_default_bkpt + .type thumb_default_bkpt, %function + .thumb_func +thumb_default_bkpt: + bkpt + +@ CHECK-LABEL: thumb_default_bkpt +@ CHECK: bkpt #0 + + .global normal_bkpt + .type normal_bkpt, %function +normal_bkpt: + bkpt #42 + +@ CHECK-LABEL: normal_bkpt +@ CHECK: bkpt #42 + + .arm + + .global arm_default_bkpt + .type arm_default_bkpt, %function +arm_default_bkpt: + bkpt + +@ CEHCK-LABEL: arm_default_bkpt +@ CHECK: bkpt #0 + diff --git a/test/MC/ARM/cmp-immediate-fixup-error.s b/test/MC/ARM/cmp-immediate-fixup-error.s new file mode 100644 index 000000000000..25a2368643db --- /dev/null +++ b/test/MC/ARM/cmp-immediate-fixup-error.s @@ -0,0 +1,7 @@ +@ RUN: not llvm-mc -triple=arm-linux-gnueabi -filetype=obj < %s 2>&1 | FileCheck %s + +.text + cmp r0, #(l1 - unknownLabel + 4) >> 2 +@ CHECK: error: expected relocatable expression + +l1: diff --git a/test/MC/ARM/cmp-immediate-fixup-error2.s b/test/MC/ARM/cmp-immediate-fixup-error2.s new file mode 100644 index 000000000000..71f7fa141e02 --- /dev/null +++ b/test/MC/ARM/cmp-immediate-fixup-error2.s @@ -0,0 +1,7 @@ +@ RUN: not llvm-mc -triple=arm-linux-gnueabi -filetype=obj < %s 2>&1 | FileCheck %s + +.text + cmp r0, #(l1 - unknownLabel) +@ CHECK: error: symbol 'unknownLabel' can not be undefined in a subtraction expression + +l1: diff --git a/test/MC/ARM/cmp-immediate-fixup.s b/test/MC/ARM/cmp-immediate-fixup.s new file mode 100644 index 000000000000..e21d5c20ccda --- /dev/null +++ b/test/MC/ARM/cmp-immediate-fixup.s @@ -0,0 +1,9 @@ +@ PR18931 +@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj -o - \ +@ RUN: | llvm-objdump --disassemble -arch=arm - | FileCheck %s + + .text +@ CHECK: cmp r2, #1 + cmp r2, #(l2 - l1 + 4) >> 2 +l1: +l2: diff --git a/test/MC/ARM/cmp-immediate-fixup2.s b/test/MC/ARM/cmp-immediate-fixup2.s new file mode 100644 index 000000000000..c091145523c0 --- /dev/null +++ b/test/MC/ARM/cmp-immediate-fixup2.s @@ -0,0 +1,9 @@ +@ PR18931 +@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj -o - \ +@ RUN: | llvm-objdump --disassemble -arch=arm - | FileCheck %s + + .text +@ CHECK: cmp r2, #0 + cmp r2, #(l2 - l1) +l1: +l2: diff --git a/test/MC/ARM/coff-debugging-secrel.ll b/test/MC/ARM/coff-debugging-secrel.ll new file mode 100644 index 000000000000..f37b19e6a70c --- /dev/null +++ b/test/MC/ARM/coff-debugging-secrel.ll @@ -0,0 +1,49 @@ +; RUN: llc -mtriple thumbv7--windows-itanium -filetype obj -o - %s \ +; RUN: | llvm-readobj -r - | FileCheck %s -check-prefix CHECK-ITANIUM + +; RUN: llc -mtriple thumbv7--windows-msvc -filetype obj -o - %s \ +; RUN: | llvm-readobj -r - | FileCheck %s -check-prefix CHECK-MSVC + +; ModuleID = '/Users/compnerd/work/llvm/test/MC/ARM/reduced.c' +target datalayout = "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:64-v128:64:128-a:0:32-n32-S64" +target triple = "thumbv7--windows-itanium" + +define arm_aapcs_vfpcc void @function() { +entry: + ret void, !dbg !0 +} + +!llvm.dbg.cu = !{!7} +!llvm.module.flags = !{!9, !10} + +!0 = metadata !{i32 1, i32 0, metadata !1, null} +!1 = metadata !{i32 786478, metadata !2, metadata !3, metadata !"function", metadata !"function", metadata !"", i32 1, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, void ()* @function, null, null, metadata !6, i32 1} ; [ DW_TAG_subprogram ], [line 1], [def], [function] +!2 = metadata !{metadata !"/Users/compnerd/work/llvm/test/MC/ARM/reduced.c", metadata !"/Users/compnerd/work/llvm"} +!3 = metadata !{i32 786473, metadata !2} ; [ DW_TAG_file_type] [/Users/compnerd/work/llvm/test/MC/ARM/reduced.c] +!4 = metadata !{i32 786453, i32 0, null, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !5, i32 0, null, null, null} ; [ DW_TAG_subroutine_type ], [line 0, size 0, align 0, offset 0] [from ] +!5 = metadata !{null} +!6 = metadata !{} +!7 = metadata !{i32 786449, metadata !2, i32 12, metadata !"clang version 3.5.0", i1 false, metadata !"", i32 0, metadata !6, metadata !6, metadata !8, metadata !6, metadata !6, metadata !"", i32 1} ; [ DW_TAG_compile_unit ] [/Users/compnerd/work/llvm/test/MC/ARM/reduced.c] [DW_LANG_C99] +!8 = metadata !{metadata !1} +!9 = metadata !{i32 2, metadata !"Dwarf Version", i32 4} +!10 = metadata !{i32 1, metadata !"Debug Info Version", i32 1} + +; CHECK-ITANIUM: Relocations [ +; CHECK-ITANIUM: Section {{.*}} .debug_info { +; CHECK-ITANIUM: 0x6 IMAGE_REL_ARM_SECREL .debug_abbrev +; CHECK-ITANIUM: 0xC IMAGE_REL_ARM_SECREL .debug_str +; CHECK-ITANIUM: 0x12 IMAGE_REL_ARM_SECREL .debug_str +; CHECK-ITANIUM: 0x16 IMAGE_REL_ARM_SECREL .debug_line +; CHECK-ITANIUM: } +; CHECK-ITANIUM: Section {{.*}}.debug_pubnames { +; CHECK-ITANIUM: 0x6 IMAGE_REL_ARM_SECREL .debug_info +; CHECK-ITANIUM: } +; CHECK-ITANIUM: ] + +; CHECK-MSVC: Relocations [ +; CHECK-MSVC: Section {{.*}} .debug$S { +; CHECK-MSVC: 0xC IMAGE_REL_ARM_SECREL function +; CHECK-MSVC: 0x10 IMAGE_REL_ARM_SECTION function +; CHECK-MSVC: } +; CHECK-MSVC: ] + diff --git a/test/MC/ARM/coff-file.s b/test/MC/ARM/coff-file.s new file mode 100644 index 000000000000..f0dd29a29256 --- /dev/null +++ b/test/MC/ARM/coff-file.s @@ -0,0 +1,47 @@ +// RUN: llvm-mc -triple thumbv7-windows -filetype obj %s -o - | llvm-objdump -t - \ +// RUN: | FileCheck %s + +// RUN: llvm-mc -triple thumbv7-windows -filetype obj %s -o - \ +// RUN: | llvm-readobj -symbols | FileCheck %s -check-prefix CHECK-SCN + + .file "null-padded.asm" +// CHECK: (nx 1) {{0x[0-9]+}} .file +// CHECK-NEXT: AUX null-padded.asm{{$}} + + .file "eighteen-chars.asm" + +// CHECK: (nx 1) {{0x[0-9]+}} .file +// CHECK-NEXT: AUX eighteen-chars.asm{{$}} + + .file "multiple-auxiliary-entries.asm" + +// CHECK: (nx 2) {{0x[0-9]+}} .file +// CHECK-NEXT: AUX multiple-auxiliary-entries.asm{{$}} + +// CHECK-SCN: Symbols [ +// CHECK-SCN: Symbol { +// CHECK-SCN: Name: .file +// CHECK-SCN: Section: (65534) +// CHECK-SCN: StorageClass: File +// CHECK-SCN: AuxFileRecord { +// CHECK-SCN: FileName: null-padded.asm +// CHECK-SCN: } +// CHECK-SCN: } +// CHECK-SCN: Symbol { +// CHECK-SCN: Name: .file +// CHECK-SCN: Section: (65534) +// CHECK-SCN: StorageClass: File +// CHECK-SCN: AuxFileRecord { +// CHECK-SCN: FileName: eighteen-chars.asm +// CHECK-SCN: } +// CHECK-SCN: } +// CHECK-SCN: Symbol { +// CHECK-SCN: Name: .file +// CHECK-SCN: Section: (65534) +// CHECK-SCN: StorageClass: File +// CHECK-SCN: AuxFileRecord { +// CHECK-SCN: FileName: multiple-auxiliary-entries.asm +// CHECK-SCN: } +// CHECK-SCN: } +// CHECK-SCN: ] + diff --git a/test/MC/ARM/coff-function-type-info.ll b/test/MC/ARM/coff-function-type-info.ll new file mode 100644 index 000000000000..a9f7c186b630 --- /dev/null +++ b/test/MC/ARM/coff-function-type-info.ll @@ -0,0 +1,45 @@ +; RUN: llc -mtriple thumbv7-windows-itanium -filetype asm -o - %s \ +; RUN: | FileCheck %s -check-prefix CHECK-ASM + +; RUN: llc -mtriple thumbv7-windows-itanium -filetype obj -o - %s \ +; RUN: | llvm-readobj -t | FileCheck %s -check-prefix CHECK-OBJECT + +define arm_aapcs_vfpcc void @external() { +entry: + ret void +} + +; CHECK-ASM: .def external +; CHECK-ASM: .scl 2 +; CHECK-ASM: .type 32 +; CHECK-ASM: .endef +; CHECK-ASM: .globl external + +define internal arm_aapcs_vfpcc void @internal() { +entry: + ret void +} + +; CHECK-ASM: .def internal +; CHECK-ASM: .scl 3 +; CHECK-ASM: .type 32 +; CHECK-ASM: .endef +; CHECK-ASM-NOT: .globl internal + +; CHECK-OBJECT: Symbol { +; CHECK-OBJECT: Name: external +; CHECK-OBJECT: Section: .text +; CHECK-OBJECT: BaseType: Null +; CHECK-OBJECT: ComplexType: Function +; CHECK-OBJECT: StorageClass: External +; CHECK-OBJECT: AuxSymbolCount: 0 +; CHECK-OBJECT: } +; CHECK-OBJECT: Symbol { +; CHECK-OBJECT: Name: internal +; CHECK-OBJECT: Section: .text +; CHECK-OBJECT: BaseType: Null +; CHECK-OBJECT: ComplexType: Function +; CHECK-OBJECT: StorageClass: Static +; CHECK-OBJECT: AuxSymbolCount: 0 +; CHECK-OBJECT: } + diff --git a/test/MC/ARM/coff-relocations.s b/test/MC/ARM/coff-relocations.s new file mode 100644 index 000000000000..6ebae709f6cf --- /dev/null +++ b/test/MC/ARM/coff-relocations.s @@ -0,0 +1,101 @@ +@ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \ +@ RUN: | llvm-readobj -r - | FileCheck %s -check-prefix CHECK-RELOCATION + +@ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \ +@ RUN: | llvm-objdump -d - | FileCheck %s -check-prefix CHECK-ENCODING + + .syntax unified + .text + .thumb + + .global target + + .thumb_func +branch24t: + b target + +@ CHECK-ENCODING-LABEL: branch24t +@ CHECK-ENCODING-NEXT: b.w #0 + + .thumb_func +branch20t: + bcc target + +@ CHECK-ENCODING-LABEL: branch20t +@ CHECK-ENCODING-NEXT: blo.w #0 + + .thumb_func +blx23t: + bl target + +@ CHECK-ENCODING-LABEL: blx23t +@ CHECK-ENCODING-NEXT: bl #0 + + .thumb_func +mov32t: + movw r0, :lower16:target + movt r0, :upper16:target + blx r0 + +@ CHECK-ENCODING-LABEL: mov32t +@ CHECK-ENCODING-NEXT: movw r0, #0 +@ CHECK-ENCODING-NEXT: movt r0, #0 +@ CHECK-ENCODING-NEXT: blx r0 + + .thumb_func +addr32: + ldr r0, .Laddr32 + bx r0 + trap +.Laddr32: + .long target + +@ CHECK-ENCODING-LABEL: addr32 +@ CHECK-ENCODING-NEXT: ldr r0, [pc, #4] +@ CHECK-ENCODING-NEXT: bx r0 +@ CHECK-ENCODING-NEXT: trap +@ CHECK-ENCODING-NEXT: movs r0, r0 +@ CHECK-ENCODING-NEXT: movs r0, r0 + + .thumb_func +addr32nb: + ldr r0, .Laddr32nb + bx r0 + trap +.Laddr32nb: + .long target(imgrel) + +@ CHECK-ENCODING-LABEL: addr32nb +@ CHECK-ENCODING-NEXT: ldr.w r0, [pc, #4] +@ CHECK-ENCODING-NEXT: bx r0 +@ CHECK-ENCODING-NEXT: trap +@ CHECK-ENCODING-NEXT: movs r0, r0 +@ CHECK-ENCODING-NEXT: movs r0, r0 + + .thumb_func +secrel: + ldr r0, .Lsecrel + bx r0 + trap +.Lsecrel: + .long target(secrel32) + +@ CHECK-ENCODING-LABEL: secrel +@ CHECK-ENCODING-NEXT: ldr.w r0, [pc, #4] +@ CHECK-ENCODING-NEXT: bx r0 +@ CHECK-ENCODING-NEXT: trap +@ CHECK-ENCODING-NEXT: movs r0, r0 +@ CHECK-ENCODING-NEXT: movs r0, r0 + +@ CHECK-RELOCATION: Relocations [ +@ CHECK-RELOCATION: Section (1) .text { +@ CHCEK-RELOCATION: 0x0 IMAGE_REL_ARM_BRANCH24T +@ CHECK-RELOCATION: 0x4 IMAGE_REL_ARM_BRANCH20T +@ CHECK-RELOCATION: 0x8 IMAGE_REL_ARM_BLX23T +@ CHECK-RELOCATION: 0xC IMAGE_REL_ARM_MOV32T +@ CHECK-RELOCATION: 0x1C IMAGE_REL_ARM_ADDR32 +@ CHECK-RELOCATION: 0x28 IMAGE_REL_ARM_ADDR32NB +@ CHECK-RELOCATION: 0x34 IMAGE_REL_ARM_SECREL +@ CHECK-RELOCATION: } +@ CHECK-RELOCATION: ] + diff --git a/test/MC/ARM/comment.s b/test/MC/ARM/comment.s new file mode 100644 index 000000000000..c24bc1aaa406 --- /dev/null +++ b/test/MC/ARM/comment.s @@ -0,0 +1,47 @@ +@ Tests to check that '@' does not get lexed as an identifier for arm +@ RUN: llvm-mc %s -triple=armv7-linux-gnueabi | FileCheck %s +@ RUN: llvm-mc %s -triple=armv7-linux-gnueabi 2>&1 | FileCheck %s --check-prefix=ERROR + +foo: + bl boo@plt should be ignored + bl goo@plt + .long bar@got to parse this as a comment + .long baz@got + add r0, r0@ignore this extra junk + +@ the symver directive should allow @ in the second symbol name +defined1: +defined2: +defined3: +bar: + .symver defined1, bar1@zed + .symver defined2, bar3@@zed + .symver defined3, bar5@@@zed + +far: + .long baz@got + +@CHECK-LABEL: foo: +@CHECK: bl boo +@CHECK-NOT: @ +@CHECK: bl goo +@CHECK-NOT: @ +@CHECK: .long bar +@CHECK-NOT: @ +@CHECK: .long baz +@CHECK-NOT: @ +@CHECK: add r0, r0 +@CHECK-NOT: @ + +@CHECK-LABEL: bar: +@CHECK: bar1@zed = defined1 +@CHECK: bar3@@zed = defined2 +@CHECK: bar5@@@zed = defined3 + +@ Make sure we did not mess up the parser state and it still lexes +@ comments correctly by excluding the @ in normal symbols +@CHECK-LABEL: far: +@CHECK: .long baz +@CHECK-NOT: @ + +@ERROR-NOT: error: diff --git a/test/MC/ARM/complex-operands.s b/test/MC/ARM/complex-operands.s new file mode 100644 index 000000000000..72f8f88d2aa4 --- /dev/null +++ b/test/MC/ARM/complex-operands.s @@ -0,0 +1,40 @@ +@ RUN: llvm-mc -triple armv7-eabi -filetype asm -o - %s | FileCheck %s + + .syntax unified + + .data + + .type .L_table_begin,%object +.L_table_begin: + .rep 2 + .long 0xd15ab1ed + .long 0x0ff1c1a1 + .endr +.L_table_end: + + .text + + .type return,%function +return: + bx lr + + .global arm_function + .type arm_function,%function +arm_function: + mov r0, #:lower16:((.L_table_end - .L_table_begin) >> 2) + blx return + +@ CHECK-LABEL: arm_function +@ CHECK: movw r0, :lower16:((.L_table_end-.L_table_begin)>>2) +@ CHECK: blx return + + .global thumb_function + .type thumb_function,%function +thumb_function: + mov r0, #:lower16:((.L_table_end - .L_table_begin) >> 2) + blx return + +@ CHECK-LABEL: thumb_function +@ CHECK: movw r0, :lower16:((.L_table_end-.L_table_begin)>>2) +@ CHECK: blx return + diff --git a/test/MC/ARM/data-in-code.ll b/test/MC/ARM/data-in-code.ll index 9fccf2e9f880..3bb017d7513f 100644 --- a/test/MC/ARM/data-in-code.ll +++ b/test/MC/ARM/data-in-code.ll @@ -144,6 +144,16 @@ exit: ;; ARM-NEXT: Other: ;; ARM-NEXT: Section: [[MIXED_SECT]] +;; ARM: Symbol { +;; ARM: Name: $d +;; ARM-NEXT: Value: 0x0 +;; ARM-NEXT: Size: 0 +;; ARM-NEXT: Binding: Local (0x0) +;; ARM-NEXT: Type: None (0x0) +;; ARM-NEXT: Other: 0 +;; ARM-NEXT: Section: .ARM.exidx +;; ARM-NEXT: } + ;; ARM-NOT: ${{[atd]}} ;; TMB: Symbol { diff --git a/test/MC/ARM/diagnostics.s b/test/MC/ARM/diagnostics.s index 3c26f6d645c8..88c5fb5b688a 100644 --- a/test/MC/ARM/diagnostics.s +++ b/test/MC/ARM/diagnostics.s @@ -351,6 +351,24 @@ @ CHECK-ERRORS: ubfxgt r4, r5, #16, #17 @ CHECK-ERRORS: ^ + @ Using pc for SBFX/UBFX + sbfx pc, r2, #1, #3 + sbfx sp, pc, #4, #5 + ubfx pc, r0, #0, #31 + ubfx r14, pc, #1, #2 +@ CHECK-ERRORS: error: invalid operand for instruction +@ CHECK-ERRORS: sbfx pc, r2, #1, #3 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: invalid operand for instruction +@ CHECK-ERRORS: sbfx sp, pc, #4, #5 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: invalid operand for instruction +@ CHECK-ERRORS: ubfx pc, r0, #0, #31 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: invalid operand for instruction +@ CHECK-ERRORS: ubfx r14, pc, #1, #2 +@ CHECK-ERRORS: ^ + @ Out of order Rt/Rt2 operands for ldrd ldrd r4, r3, [r8] ldrd r4, r3, [r8, #8]! @@ -465,3 +483,11 @@ ldm sp!, {r0}^ @ CHECK-ERRORS: error: system STM cannot have writeback register @ CHECK-ERRORS: error: writeback register only allowed on system LDM if PC in register-list + +foo2: + mov r0, foo2 + movw r0, foo2 +@ CHECK-ERRORS: error: immediate expression for mov requires :lower16: or :upper16 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: immediate expression for mov requires :lower16: or :upper16 +@ CHECK-ERRORS: ^ diff --git a/test/MC/ARM/directive-align.s b/test/MC/ARM/directive-align.s new file mode 100644 index 000000000000..d3e39cb1c563 --- /dev/null +++ b/test/MC/ARM/directive-align.s @@ -0,0 +1,28 @@ +@ RUN: llvm-mc -triple armv7-eabi %s | FileCheck %s + + .data + +unaligned: + .byte 1 + .align + +@ CHECK-LABEL: unaligned +@ CHECK-NEXT: .byte 1 +@ CHECK-NEXT: .align 2 + +aligned: + .long 0x1d10c1e5 + .align + +@ CHECK-LABEL: aligned +@ CHECK-NEXT: .long 487637477 +@ CHECK-NEXT: .align 2 + +trailer: + .long 0xd1ab011c + .align 2 + +@ CHECK-LABEL: trailer +@ CHECK-NEXT: .long 3517645084 +@ CHECK-NEXT: .align 2 + diff --git a/test/MC/ARM/directive-arch-armv2.s b/test/MC/ARM/directive-arch-armv2.s new file mode 100644 index 000000000000..40857ca9fad8 --- /dev/null +++ b/test/MC/ARM/directive-arch-armv2.s @@ -0,0 +1,30 @@ +@ Test the .arch directive for armv2 + +@ This test case will check the default .ARM.attributes value for the +@ armv2 architecture. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch armv2 + +@ CHECK-ASM: .arch armv2 + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 2 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v4 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv2a.s b/test/MC/ARM/directive-arch-armv2a.s new file mode 100644 index 000000000000..62c2ace796f9 --- /dev/null +++ b/test/MC/ARM/directive-arch-armv2a.s @@ -0,0 +1,30 @@ +@ Test the .arch directive for armv2a + +@ This test case will check the default .ARM.attributes value for the +@ armv2a architecture. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch armv2a + +@ CHECK-ASM: .arch armv2a + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 2A +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v4 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv3.s b/test/MC/ARM/directive-arch-armv3.s new file mode 100644 index 000000000000..41cce659246b --- /dev/null +++ b/test/MC/ARM/directive-arch-armv3.s @@ -0,0 +1,30 @@ +@ Test the .arch directive for armv3 + +@ This test case will check the default .ARM.attributes value for the +@ armv3 architecture. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch armv3 + +@ CHECK-ASM: .arch armv3 + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 3 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v4 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv3m.s b/test/MC/ARM/directive-arch-armv3m.s new file mode 100644 index 000000000000..8041da2e1e52 --- /dev/null +++ b/test/MC/ARM/directive-arch-armv3m.s @@ -0,0 +1,30 @@ +@ Test the .arch directive for armv3m + +@ This test case will check the default .ARM.attributes value for the +@ armv3m architecture. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch armv3m + +@ CHECK-ASM: .arch armv3m + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 3M +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v4 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv4.s b/test/MC/ARM/directive-arch-armv4.s new file mode 100644 index 000000000000..fb838428403f --- /dev/null +++ b/test/MC/ARM/directive-arch-armv4.s @@ -0,0 +1,38 @@ +@ Test the .arch directive for armv4 + +@ This test case will check the default .ARM.attributes value for the +@ armv4 architecture. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch armv4 + +@ CHECK-ASM: .arch armv4 + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 4 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v4 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: } + +@ Check that multiplication is supported + mul r4, r5, r6 + mla r4, r5, r6, r3 + smull r4, r5, r6, r3 + umull r4, r5, r6, r3 + smlal r4, r5, r6, r3 + umlal r4, r5, r6, r3 + diff --git a/test/MC/ARM/directive-arch-armv4t.s b/test/MC/ARM/directive-arch-armv4t.s new file mode 100644 index 000000000000..33a5ae385753 --- /dev/null +++ b/test/MC/ARM/directive-arch-armv4t.s @@ -0,0 +1,34 @@ +@ Test the .arch directive for armv4t + +@ This test case will check the default .ARM.attributes value for the +@ armv4t architecture. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch armv4t + +@ CHECK-ASM: .arch armv4t + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 4T +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v4T +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-1 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv5.s b/test/MC/ARM/directive-arch-armv5.s new file mode 100644 index 000000000000..73a8c95db796 --- /dev/null +++ b/test/MC/ARM/directive-arch-armv5.s @@ -0,0 +1,30 @@ +@ Test the .arch directive for armv5 + +@ This test case will check the default .ARM.attributes value for the +@ armv5 architecture. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch armv5 + +@ CHECK-ASM: .arch armv5 + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 5 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v5T +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv5t.s b/test/MC/ARM/directive-arch-armv5t.s new file mode 100644 index 000000000000..66a75c4c89e2 --- /dev/null +++ b/test/MC/ARM/directive-arch-armv5t.s @@ -0,0 +1,34 @@ +@ Test the .arch directive for armv5t + +@ This test case will check the default .ARM.attributes value for the +@ armv5t architecture. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch armv5t + +@ CHECK-ASM: .arch armv5t + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 5T +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v5T +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-1 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv5te.s b/test/MC/ARM/directive-arch-armv5te.s new file mode 100644 index 000000000000..f3932d84a56f --- /dev/null +++ b/test/MC/ARM/directive-arch-armv5te.s @@ -0,0 +1,34 @@ +@ Test the .arch directive for armv5te + +@ This test case will check the default .ARM.attributes value for the +@ armv5te architecture. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch armv5te + +@ CHECK-ASM: .arch armv5te + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 5TE +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v5TE +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-1 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv6-m.s b/test/MC/ARM/directive-arch-armv6-m.s new file mode 100644 index 000000000000..d89a627740bd --- /dev/null +++ b/test/MC/ARM/directive-arch-armv6-m.s @@ -0,0 +1,30 @@ +@ Test the .arch directive for armv6-m + +@ This test case will check the default .ARM.attributes value for the +@ armv6-m architecture. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch armv6-m + +@ CHECK-ASM: .arch armv6-m + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 6-M +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v6-M +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-1 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv6.s b/test/MC/ARM/directive-arch-armv6.s new file mode 100644 index 000000000000..fb489207355e --- /dev/null +++ b/test/MC/ARM/directive-arch-armv6.s @@ -0,0 +1,34 @@ +@ Test the .arch directive for armv6 + +@ This test case will check the default .ARM.attributes value for the +@ armv6 architecture. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch armv6 + +@ CHECK-ASM: .arch armv6 + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 6 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v6 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-1 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv6j.s b/test/MC/ARM/directive-arch-armv6j.s new file mode 100644 index 000000000000..e27beef1ebaf --- /dev/null +++ b/test/MC/ARM/directive-arch-armv6j.s @@ -0,0 +1,34 @@ +@ Test the .arch directive for armv6j + +@ This test case will check the default .ARM.attributes value for the +@ armv6j architecture. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch armv6j + +@ CHECK-ASM: .arch armv6j + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 6J +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v6 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-1 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv6t2.s b/test/MC/ARM/directive-arch-armv6t2.s new file mode 100644 index 000000000000..85f4491b0c6f --- /dev/null +++ b/test/MC/ARM/directive-arch-armv6t2.s @@ -0,0 +1,34 @@ +@ Test the .arch directive for armv6t2 + +@ This test case will check the default .ARM.attributes value for the +@ armv6t2 architecture. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch armv6t2 + +@ CHECK-ASM: .arch armv6t2 + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 6T2 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v6T2 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-2 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv6z.s b/test/MC/ARM/directive-arch-armv6z.s new file mode 100644 index 000000000000..78a9ab1d5de7 --- /dev/null +++ b/test/MC/ARM/directive-arch-armv6z.s @@ -0,0 +1,38 @@ +@ Test the .arch directive for armv6z + +@ This test case will check the default .ARM.attributes value for the +@ armv6z architecture. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch armv6z + +@ CHECK-ASM: .arch armv6z + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 6Z +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v6KZ +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-1 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: Virtualization_use +@ CHECK-ATTR: Description: TrustZone +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv6zk.s b/test/MC/ARM/directive-arch-armv6zk.s new file mode 100644 index 000000000000..48d9cc1a2bf1 --- /dev/null +++ b/test/MC/ARM/directive-arch-armv6zk.s @@ -0,0 +1,38 @@ +@ Test the .arch directive for armv6zk + +@ This test case will check the default .ARM.attributes value for the +@ armv6zk architecture. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch armv6zk + +@ CHECK-ASM: .arch armv6zk + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 6ZK +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v6KZ +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-1 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: Virtualization_use +@ CHECK-ATTR: Description: TrustZone +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv7-a.s b/test/MC/ARM/directive-arch-armv7-a.s new file mode 100644 index 000000000000..792429a4e047 --- /dev/null +++ b/test/MC/ARM/directive-arch-armv7-a.s @@ -0,0 +1,38 @@ +@ Test the .arch directive for armv7-a + +@ This test case will check the default .ARM.attributes value for the +@ armv7-a architecture. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch armv7-a + +@ CHECK-ASM: .arch armv7-a + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 7-A +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v7 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch_profile +@ CHECK-ATTR: Description: Application +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-2 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv7-m.s b/test/MC/ARM/directive-arch-armv7-m.s new file mode 100644 index 000000000000..058f23ba2bea --- /dev/null +++ b/test/MC/ARM/directive-arch-armv7-m.s @@ -0,0 +1,34 @@ +@ Test the .arch directive for armv7-m + +@ This test case will check the default .ARM.attributes value for the +@ armv7-m architecture. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch armv7-m + +@ CHECK-ASM: .arch armv7-m + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 7-M +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v7 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch_profile +@ CHECK-ATTR: Description: Microcontroller +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-2 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv7-r.s b/test/MC/ARM/directive-arch-armv7-r.s new file mode 100644 index 000000000000..99481f70c5f2 --- /dev/null +++ b/test/MC/ARM/directive-arch-armv7-r.s @@ -0,0 +1,38 @@ +@ Test the .arch directive for armv7-r + +@ This test case will check the default .ARM.attributes value for the +@ armv7-r architecture. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch armv7-r + +@ CHECK-ASM: .arch armv7-r + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 7-R +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v7 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch_profile +@ CHECK-ATTR: Description: Real-time +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-2 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv7.s b/test/MC/ARM/directive-arch-armv7.s new file mode 100644 index 000000000000..0cd499666ea6 --- /dev/null +++ b/test/MC/ARM/directive-arch-armv7.s @@ -0,0 +1,30 @@ +@ Test the .arch directive for armv7 + +@ This test case will check the default .ARM.attributes value for the +@ armv7 architecture. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch armv7 + +@ CHECK-ASM: .arch armv7 + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 7 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v7 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-2 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv7a.s b/test/MC/ARM/directive-arch-armv7a.s new file mode 100644 index 000000000000..3bb202fb278b --- /dev/null +++ b/test/MC/ARM/directive-arch-armv7a.s @@ -0,0 +1,38 @@ +@ Test the .arch directive for armv7-a + +@ This test case will check the default .ARM.attributes value for the +@ armv7-a architecture when using the armv7a alias. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch armv7a + +@ CHECK-ASM: .arch armv7-a + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 7-A +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v7 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch_profile +@ CHECK-ATTR: Description: Application +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-2 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv7m.s b/test/MC/ARM/directive-arch-armv7m.s new file mode 100644 index 000000000000..0e9f546387bf --- /dev/null +++ b/test/MC/ARM/directive-arch-armv7m.s @@ -0,0 +1,34 @@ +@ Test the .arch directive for armv7-m + +@ This test case will check the default .ARM.attributes value for the +@ armv7-m architecture when using the armv7m alias. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch armv7m + +@ CHECK-ASM: .arch armv7-m + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 7-M +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v7 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch_profile +@ CHECK-ATTR: Description: Microcontroller +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-2 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv7r.s b/test/MC/ARM/directive-arch-armv7r.s new file mode 100644 index 000000000000..9009d1341281 --- /dev/null +++ b/test/MC/ARM/directive-arch-armv7r.s @@ -0,0 +1,38 @@ +@ Test the .arch directive for armv7-r + +@ This test case will check the default .ARM.attributes value for the +@ armv7-r architecture when using the armv7r alias. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch armv7r + +@ CHECK-ASM: .arch armv7-r + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 7-R +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v7 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch_profile +@ CHECK-ATTR: Description: Real-time +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-2 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv8-a.s b/test/MC/ARM/directive-arch-armv8-a.s new file mode 100644 index 000000000000..636378155e70 --- /dev/null +++ b/test/MC/ARM/directive-arch-armv8-a.s @@ -0,0 +1,46 @@ +@ Test the .arch directive for armv8-a + +@ This test case will check the default .ARM.attributes value for the +@ armv8-a architecture. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch armv8-a + +@ CHECK-ASM: .arch armv8-a + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 8-A +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v8 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch_profile +@ CHECK-ATTR: Description: Application +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-2 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: MPextension_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: Virtualization_use +@ CHECK-ATTR: Description: TrustZone + Virtualization Extensions +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv8a.s b/test/MC/ARM/directive-arch-armv8a.s new file mode 100644 index 000000000000..4a1915c53436 --- /dev/null +++ b/test/MC/ARM/directive-arch-armv8a.s @@ -0,0 +1,46 @@ +@ Test the .arch directive for armv8-a + +@ This test case will check the default .ARM.attributes value for the +@ armv8-a architecture when using the armv8a alias. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch armv8a + +@ CHECK-ASM: .arch armv8-a + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 8-A +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v8 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch_profile +@ CHECK-ATTR: Description: Application +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-2 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: MPextension_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: Virtualization_use +@ CHECK-ATTR: Description: TrustZone + Virtualization Extensions +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-iwmmxt.s b/test/MC/ARM/directive-arch-iwmmxt.s new file mode 100644 index 000000000000..db25ec683fe5 --- /dev/null +++ b/test/MC/ARM/directive-arch-iwmmxt.s @@ -0,0 +1,38 @@ +@ Test the .arch directive for iwmmxt + +@ This test case will check the default .ARM.attributes value for the +@ iwmmxt architecture. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch iwmmxt + +@ CHECK-ASM: .arch iwmmxt + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: IWMMXT +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v5TE +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-1 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: WMMX_arch +@ CHECK-ATTR: Description: WMMXv1 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-iwmmxt2.s b/test/MC/ARM/directive-arch-iwmmxt2.s new file mode 100644 index 000000000000..de94f97b449e --- /dev/null +++ b/test/MC/ARM/directive-arch-iwmmxt2.s @@ -0,0 +1,38 @@ +@ Test the .arch directive for iwmmxt2 + +@ This test case will check the default .ARM.attributes value for the +@ iwmmxt2 architecture. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch iwmmxt2 + +@ CHECK-ASM: .arch iwmmxt2 + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: IWMMXT2 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v5TE +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-1 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: WMMX_arch +@ CHECK-ATTR: Description: WMMXv2 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch_extension-crc.s b/test/MC/ARM/directive-arch_extension-crc.s new file mode 100644 index 000000000000..9e4dedabca48 --- /dev/null +++ b/test/MC/ARM/directive-arch_extension-crc.s @@ -0,0 +1,57 @@ +@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-V7 +@ RUN: not llvm-mc -triple armv8-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-V8 + + .syntax unified + + .arm + + .arch_extension crc +@ CHECK-V7: error: architectural extension 'crc' is not allowed for the current base architecture +@ CHECK-V7-NEXT: .arch_extension crc +@ CHECK-V7-NEXT: ^ + + .type crc,%function +crc: + crc32b r0, r1, r2 +@ CHECK-V7: error: instruction requires: crc armv8 + crc32h r0, r1, r2 +@ CHECK-V7: error: instruction requires: crc armv8 + crc32w r0, r1, r2 +@ CHECK-V7: error: instruction requires: crc armv8 + + crc32cb r0, r1, r2 +@ CHECK-V7: error: instruction requires: crc armv8 + crc32ch r0, r1, r2 +@ CHECK-V7: error: instruction requires: crc armv8 + crc32cw r0, r1, r2 +@ CHECK-V7: error: instruction requires: crc armv8 + + .arch_extension nocrc +@ CHECK-V7: error: architectural extension 'crc' is not allowed for the current base architecture +@ CHECK-V7-NEXT: .arch_extension nocrc +@ CHECK-V7-NEXT: ^ + + .type nocrc,%function +nocrc: + crc32b r0, r1, r2 +@ CHECK-V7: error: instruction requires: crc armv8 +@ CHECK-V8: error: instruction requires: crc arm-mode + crc32h r0, r1, r2 +@ CHECK-V7: error: instruction requires: crc armv8 +@ CHECK-V8: error: instruction requires: crc arm-mode + crc32w r0, r1, r2 +@ CHECK-V7: error: instruction requires: crc armv8 +@ CHECK-V8: error: instruction requires: crc arm-mode + + crc32cb r0, r1, r2 +@ CHECK-V7: error: instruction requires: crc armv8 +@ CHECK-V8: error: instruction requires: crc arm-mode + crc32ch r0, r1, r2 +@ CHECK-V7: error: instruction requires: crc armv8 +@ CHECK-V8: error: instruction requires: crc arm-mode + crc32cw r0, r1, r2 +@ CHECK-V7: error: instruction requires: crc armv8 +@ CHECK-V8: error: instruction requires: crc arm-mode + diff --git a/test/MC/ARM/directive-arch_extension-crypto.s b/test/MC/ARM/directive-arch_extension-crypto.s new file mode 100644 index 000000000000..898ba06cf017 --- /dev/null +++ b/test/MC/ARM/directive-arch_extension-crypto.s @@ -0,0 +1,108 @@ +@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-V7 +@ RUN: not llvm-mc -triple armv8-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-V8 +@ RUN: not llvm-mc -triple thumbv7-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-V7 +@ RUN: not llvm-mc -triple thumbv8-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-V8 + + .syntax unified + + .arch_extension crypto +@ CHECK-V7: error: architectural extension 'crypto' is not allowed for the current base architecture +@ CHECK-V7-NEXT: .arch_extension crypto +@ CHECK-V7-NEXT: ^ + + .type crypto,%function +crypto: + vmull.p64 q0, d0, d1 +@ CHECK-V7: error: instruction requires: crypto armv8 + + aesd.8 q0, q1 +@ CHECK-V7: error: instruction requires: crypto armv8 + aese.8 q0, q1 +@ CHECK-V7: error: instruction requires: crypto armv8 + aesimc.8 q0, q1 +@ CHECK-V7: error: instruction requires: crypto armv8 + aesmc.8 q0, q1 +@ CHECK-V7: error: instruction requires: crypto armv8 + + sha1h.32 q0, q1 +@ CHECK-V7: error: instruction requires: crypto armv8 + sha1su1.32 q0, q1 +@ CHECK-V7: error: instruction requires: crypto armv8 + sha256su0.32 q0, q1 +@ CHECK-V7: error: instruction requires: crypto armv8 + + sha1c.32 q0, q1, q2 +@ CHECK-V7: error: instruction requires: crypto armv8 + sha1m.32 q0, q1, q2 +@ CHECK-V7: error: instruction requires: crypto armv8 + sha1p.32 q0, q1, q2 +@ CHECK-V7: error: instruction requires: crypto armv8 + sha1su0.32 q0, q1, q2 +@ CHECK-V7: error: instruction requires: crypto armv8 + sha256h.32 q0, q1, q2 +@ CHECK-V7: error: instruction requires: crypto armv8 + sha256h2.32 q0, q1, q2 +@ CHECK-V7: error: instruction requires: crypto armv8 + sha256su1.32 q0, q1, q2 +@ CHECK-V7: error: instruction requires: crypto armv8 + + .arch_extension nocrypto +@ CHECK-V7: error: architectural extension 'crypto' is not allowed for the current base architecture +@ CHECK-V7-NEXT: .arch_extension nocrypto +@ CHECK-V7-NEXT: ^ + + .type nocrypto,%function +nocrypto: + vmull.p64 q0, d0, d1 +@ CHECK-V7: error: instruction requires: crypto armv8 +@ CHECK-V8: error: instruction requires: crypto + + aesd.8 q0, q1 +@ CHECK-V7: error: instruction requires: crypto armv8 +@ CHECK-V8: error: instruction requires: crypto + aese.8 q0, q1 +@ CHECK-V7: error: instruction requires: crypto armv8 +@ CHECK-V8: error: instruction requires: crypto + aesimc.8 q0, q1 +@ CHECK-V7: error: instruction requires: crypto armv8 +@ CHECK-V8: error: instruction requires: crypto + aesmc.8 q0, q1 +@ CHECK-V7: error: instruction requires: crypto armv8 +@ CHECK-V8: error: instruction requires: crypto + + sha1h.32 q0, q1 +@ CHECK-V7: error: instruction requires: crypto armv8 +@ CHECK-V8: error: instruction requires: crypto + sha1su1.32 q0, q1 +@ CHECK-V7: error: instruction requires: crypto armv8 +@ CHECK-V8: error: instruction requires: crypto + sha256su0.32 q0, q1 +@ CHECK-V7: error: instruction requires: crypto armv8 +@ CHECK-V8: error: instruction requires: crypto + + sha1c.32 q0, q1, q2 +@ CHECK-V7: error: instruction requires: crypto armv8 +@ CHECK-V8: error: instruction requires: crypto + sha1m.32 q0, q1, q2 +@ CHECK-V7: error: instruction requires: crypto armv8 +@ CHECK-V8: error: instruction requires: crypto + sha1p.32 q0, q1, q2 +@ CHECK-V7: error: instruction requires: crypto armv8 +@ CHECK-V8: error: instruction requires: crypto + sha1su0.32 q0, q1, q2 +@ CHECK-V7: error: instruction requires: crypto armv8 +@ CHECK-V8: error: instruction requires: crypto + sha256h.32 q0, q1, q2 +@ CHECK-V7: error: instruction requires: crypto armv8 +@ CHECK-V8: error: instruction requires: crypto + sha256h2.32 q0, q1, q2 +@ CHECK-V7: error: instruction requires: crypto armv8 +@ CHECK-V8: error: instruction requires: crypto + sha256su1.32 q0, q1, q2 +@ CHECK-V7: error: instruction requires: crypto armv8 +@ CHECK-V8: error: instruction requires: crypto + diff --git a/test/MC/ARM/directive-arch_extension-fp.s b/test/MC/ARM/directive-arch_extension-fp.s new file mode 100644 index 000000000000..0327dd74337e --- /dev/null +++ b/test/MC/ARM/directive-arch_extension-fp.s @@ -0,0 +1,344 @@ +@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-V7 +@ RUN: not llvm-mc -triple armv8-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-V8 +@ RUN: not llvm-mc -triple thumbv7-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-V7 +@ RUN: not llvm-mc -triple thumbv8-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-V8 + + .syntax unified + + .arch_extension fp +@ CHECK-V7: error: architectural extension 'fp' is not allowed for the current base architecture +@ CHECK-V7-NEXT: .arch_extension fp +@ CHECK-V7-NEXT: ^ + + .type fp,%function +fp: + vmrs r0, mvfr2 +@ CHECK-V7: error: instruction requires: FPARMv8 + + vselgt.f32 s0, s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vselge.f32 s0, s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vseleq.f32 s0, s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vselvs.f32 s0, s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vmaxnm.f32 s0, s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vminnm.f32 s0, s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + + vselgt.f64 d0, d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vselge.f64 d0, d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vseleq.f64 d0, d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vselvs.f64 d0, d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vmaxnm.f64 d0, d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vminnm.f64 d0, d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + + vcvtb.f64.f16 d0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtb.f16.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtt.f64.f16 d0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtt.f16.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + + vcvta.s32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvta.u32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvta.s32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvta.u32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtn.s32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtn.u32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtn.s32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtn.u32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtp.s32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtp.u32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtp.s32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtp.u32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtm.s32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtm.u32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtm.s32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtm.u32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + + vrintz.f32 s0, s1 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintz.f64 d0, d1 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintz.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintz.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintr.f32 s0, s1 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintr.f64 d0, d1 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintr.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintr.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintx.f32 s0, s1 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintx.f64 d0, d1 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintx.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintx.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + + vrinta.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrinta.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrinta.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrinta.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintn.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintn.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintn.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintn.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintp.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintp.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintp.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintp.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintm.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintm.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintm.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintm.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + + .arch_extension nofp +@ CHECK-V7: error: architectural extension 'fp' is not allowed for the current base architecture +@ CHECK-V7-NEXT: .arch_extension nofp +@ CHECK-V7-NEXT: ^ + + .type nofp,%function +nofp: + vmrs r0, mvfr2 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + + vselgt.f32 s0, s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vselge.f32 s0, s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vseleq.f32 s0, s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vselvs.f32 s0, s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vmaxnm.f32 s0, s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vminnm.f32 s0, s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + + vselgt.f64 d0, d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vselge.f64 d0, d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vseleq.f64 d0, d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vselvs.f64 d0, d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vmaxnm.f64 d0, d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vminnm.f64 d0, d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + + vcvtb.f64.f16 d0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vcvtb.f16.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vcvtt.f64.f16 d0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vcvtt.f16.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + + vcvta.s32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vcvta.u32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vcvta.s32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vcvta.u32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vcvtn.s32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vcvtn.u32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vcvtn.s32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vcvtn.u32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vcvtp.s32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vcvtp.u32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vcvtp.s32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vcvtp.u32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vcvtm.s32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vcvtm.u32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vcvtm.s32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vcvtm.u32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + + vrintz.f32 s0, s1 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrintz.f64 d0, d1 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vrintz.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrintz.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vrintr.f32 s0, s1 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrintr.f64 d0, d1 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vrintr.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrintr.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vrintx.f32 s0, s1 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrintx.f64 d0, d1 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vrintx.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrintx.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + + vrinta.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrinta.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vrinta.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrinta.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vrintn.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrintn.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vrintn.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrintn.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vrintp.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrintp.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vrintp.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrintp.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vrintm.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrintm.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vrintm.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrintm.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + diff --git a/test/MC/ARM/directive-arch_extension-idiv.s b/test/MC/ARM/directive-arch_extension-idiv.s new file mode 100644 index 000000000000..c63bbfbb4cab --- /dev/null +++ b/test/MC/ARM/directive-arch_extension-idiv.s @@ -0,0 +1,53 @@ +@ RUN: not llvm-mc -triple armv6-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ARMv6 -check-prefix CHECK-V6 +@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ARMv7 -check-prefix CHECK-V7 +@ RUN: not llvm-mc -triple armv7m-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ARMv7M -check-prefix CHECK-V7M +@ RUN: not llvm-mc -triple thumbv6-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-THUMBv6 -check-prefix CHECK-V6 +@ RUN: not llvm-mc -triple thumbv7-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-THUMBv7 -check-prefix CHECK-V7 +@ RUN: not llvm-mc -triple thumbv7m-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-THUMBv7M -check-prefix CHECK-V7M + + .syntax unified + + .arch_extension idiv +@ CHECK-V6: error: architectural extension 'idiv' is not allowed for the current base architecture +@ CHECK-V6-NEXT: .arch_extension idiv +@ CHECK-V6-NEXT: ^ +@ CHECK-V7M: error: architectural extension 'idiv' is not allowed for the current base architecture +@ CHECK-V7M-NEXT: .arch_extension idiv +@ CHECK-V7M-NEXT: ^ + + .type idiv,%function +idiv: + udiv r0, r1, r2 +@ CHECK-ARMv6: error: instruction requires: divide in ARM +@ CHECK-THUMBv6: error: instruction requires: divide in ARM arm-mode + sdiv r0, r1, r2 +@ CHECK-ARMv6: error: instruction requires: divide in ARM +@ CHECK-THUMBv6: error: instruction requires: divide in ARM arm-mode + + .arch_extension noidiv +@ CHECK-V6: error: architectural extension 'idiv' is not allowed for the current base architecture +@ CHECK-V6-NEXT: .arch_extension noidiv +@ CHECK-V6-NEXT: ^ +@ CHECK-V7M: error: architectural extension 'idiv' is not allowed for the current base architecture +@ CHECK-V7M-NEXT: .arch_extension noidiv +@ CHECK-V7M-NEXT: ^ + + .type noidiv,%function +noidiv: + udiv r0, r1, r2 +@ CHECK-ARMv6: error: instruction requires: divide in ARM +@ CHECK-THUMBv6: error: instruction requires: divide in ARM arm-mode +@ CHECK-ARMv7: error: instruction requires: divide in ARM arm-mode +@ CHECK-THUMBv7: error: instruction requires: divide in THUMB + sdiv r0, r1, r2 +@ CHECK-ARMv6: error: instruction requires: divide in ARM +@ CHECK-THUMBv6: error: instruction requires: divide in ARM arm-mode +@ CHECK-ARMv7: error: instruction requires: divide in ARM arm-mode +@ CHECK-THUMBv7: error: instruction requires: divide in THUMB + diff --git a/test/MC/ARM/directive-arch_extension-mp.s b/test/MC/ARM/directive-arch_extension-mp.s new file mode 100644 index 000000000000..9046c2153155 --- /dev/null +++ b/test/MC/ARM/directive-arch_extension-mp.s @@ -0,0 +1,38 @@ +@ RUN: not llvm-mc -triple armv6-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ARMv6 -check-prefix CHECK-V6 +@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ARMv7 -check-prefix CHECK-V7 +@ RUN: not llvm-mc -triple armv7m-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ARMv7M -check-prefix CHECK-V7M +@ RUN: not llvm-mc -triple thumbv6-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-THUMBv6 -check-prefix CHECK-V6 +@ RUN: not llvm-mc -triple thumbv7-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-THUMBv7 -check-prefix CHECK-V7 +@ RUN: not llvm-mc -triple thumbv7m-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-THUMBv7M -check-prefix CHECK-V7M + + .syntax unified + + .arch_extension mp +@ CHECK-V6: error: architectural extension 'mp' is not allowed for the current base architecture +@ CHECK-V6-NEXT: .arch_extension mp +@ CHECK-V6-NEXT: ^ + + .type mp,%function +mp: + pldw [r0] +@ CHECK-V6: error: instruction requires: mp-extensions armv7 +@ CHECK-V7M: error: instruction requires: mp-extensions + + .arch_extension nomp +@ CHECK-V6: error: architectural extension 'mp' is not allowed for the current base architecture +@ CHECK-V6-NEXT: .arch_extension nomp +@ CHECK-V6-NEXT: ^ + + .type nomp,%function +nomp: + pldw [r0] +@ CHECK-V6: error: instruction requires: mp-extensions armv7 +@ CHECK-V7: error: instruction requires: mp-extensions +@ CHECK-V7M: error: instruction requires: mp-extensions + diff --git a/test/MC/ARM/directive-arch_extension-sec.s b/test/MC/ARM/directive-arch_extension-sec.s new file mode 100644 index 000000000000..55ead8506ab1 --- /dev/null +++ b/test/MC/ARM/directive-arch_extension-sec.s @@ -0,0 +1,31 @@ +@ RUN: not llvm-mc -triple armv6-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ARMv6 -check-prefix CHECK-V6 +@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ARMv7 -check-prefix CHECK-V7 +@ RUN: not llvm-mc -triple thumbv6-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-THUMBv6 -check-prefix CHECK-V6 +@ RUN: not llvm-mc -triple thumbv7-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-THUMBv7 -check-prefix CHECK-V7 + + .syntax unified + + .arch_extension sec +@ CHECK-V6: error: architectural extension 'sec' is not allowed for the current base architecture +@ CHECK-V6-NEXT: .arch_extension sec +@ CHECK-V6-NEXT: ^ + + .type sec,%function +sec: + smc #0 +@ CHECK-V6: error: instruction requires: TrustZone + + .arch_extension nosec +@ CHECK-V6: error: architectural extension 'sec' is not allowed for the current base architecture +@ CHECK-V6-NEXT: .arch_extension nosec +@ CHECK-V6-NEXT: ^ + + .type nosec,%function +nosec: + smc #0 +@ CHECK-V7: error: instruction requires: TrustZone + diff --git a/test/MC/ARM/directive-arch_extension-simd.s b/test/MC/ARM/directive-arch_extension-simd.s new file mode 100644 index 000000000000..c9dbf21541c1 --- /dev/null +++ b/test/MC/ARM/directive-arch_extension-simd.s @@ -0,0 +1,275 @@ +@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-V7 +@ RUN: not llvm-mc -triple armv8-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-V8 +@ RUN: not llvm-mc -triple thumbv7-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-V7 +@ RUN: not llvm-mc -triple thumbv8-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-V8 + + .syntax unified + + .arch_extension simd +@ CHECK-V7: error: architectural extension 'simd' is not allowed for the current base architecture +@ CHECK-V7-NEXT: .arch_extension simd +@ CHECK-V7-NEXT: ^ + + .type simd,%function +simd: + vmaxnm.f32 s0, s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vminnm.f32 s0, s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + + vmaxnm.f64 d0, d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vminnm.f64 d0, d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + + vcvta.s32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvta.u32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvta.s32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvta.u32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtn.s32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtn.u32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtn.s32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtn.u32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtp.s32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtp.u32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtp.s32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtp.u32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtm.s32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtm.u32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtm.s32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vcvtm.u32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + + vrintz.f32 s0, s1 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintz.f64 d0, d1 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintz.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintz.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintr.f32 s0, s1 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintr.f64 d0, d1 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintr.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintr.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintx.f32 s0, s1 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintx.f64 d0, d1 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintx.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintx.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + + vrinta.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrinta.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrinta.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrinta.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintn.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintn.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintn.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintn.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintp.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintp.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintp.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintp.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintm.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintm.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintm.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 + vrintm.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 + + .arch_extension nosimd +@ CHECK-V7: error: architectural extension 'simd' is not allowed for the current base architecture +@ CHECK-V7-NEXT: .arch_extension nosimd +@ CHECK-V7-NEXT: ^ + + .type nosimd,%function +nosimd: + vmaxnm.f32 s0, s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vminnm.f32 s0, s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + + vmaxnm.f64 d0, d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vminnm.f64 d0, d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + + vcvta.s32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vcvta.u32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vcvta.s32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vcvta.u32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vcvtn.s32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vcvtn.u32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vcvtn.s32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vcvtn.u32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vcvtp.s32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vcvtp.u32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vcvtp.s32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vcvtp.u32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vcvtm.s32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vcvtm.u32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vcvtm.s32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vcvtm.u32.f64 s0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + + vrintz.f32 s0, s1 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrintz.f64 d0, d1 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vrintz.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrintz.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vrintr.f32 s0, s1 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrintr.f64 d0, d1 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vrintr.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrintr.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vrintx.f32 s0, s1 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrintx.f64 d0, d1 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vrintx.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrintx.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + + vrinta.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrinta.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vrinta.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrinta.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vrintn.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrintn.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vrintn.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrintn.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vrintp.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrintp.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vrintp.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrintp.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vrintm.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrintm.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + vrintm.f32.f32 s0, s0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: FPARMv8 + vrintm.f64.f64 d0, d0 +@ CHECK-V7: error: instruction requires: FPARMv8 +@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 + diff --git a/test/MC/ARM/directive-eabi_attribute-2.s b/test/MC/ARM/directive-eabi_attribute-2.s new file mode 100644 index 000000000000..8f00ac807802 --- /dev/null +++ b/test/MC/ARM/directive-eabi_attribute-2.s @@ -0,0 +1,98 @@ +@ RUN: llvm-mc -triple armv7-elf -filetype asm -o - %s | FileCheck %s + + .syntax unified + .thumb + + .eabi_attribute Tag_CPU_raw_name, "Cortex-A9" +@ CHECK: .eabi_attribute 4, "Cortex-A9" + .eabi_attribute Tag_CPU_name, "cortex-a9" +@ CHECK: .cpu cortex-a9 + .eabi_attribute Tag_CPU_arch, 10 +@ CHECK: .eabi_attribute 6, 10 + .eabi_attribute Tag_CPU_arch_profile, 'A' +@ CHECK: .eabi_attribute 7, 65 + .eabi_attribute Tag_ARM_ISA_use, 0 +@ CHECK: .eabi_attribute 8, 0 + .eabi_attribute Tag_THUMB_ISA_use, 2 +@ CHECK: .eabi_attribute 9, 2 + .eabi_attribute Tag_FP_arch, 3 +@ CHECK: .eabi_attribute 10, 3 + .eabi_attribute Tag_WMMX_arch, 0 +@ CHECK: .eabi_attribute 11, 0 + .eabi_attribute Tag_Advanced_SIMD_arch, 1 +@ CHECK: .eabi_attribute 12, 1 + .eabi_attribute Tag_PCS_config, 2 +@ CHECK: .eabi_attribute 13, 2 + .eabi_attribute Tag_ABI_PCS_R9_use, 0 +@ CHECK: .eabi_attribute 14, 0 + .eabi_attribute Tag_ABI_PCS_RW_data, 0 +@ CHECK: .eabi_attribute 15, 0 + .eabi_attribute Tag_ABI_PCS_RO_data, 0 +@ CHECK: .eabi_attribute 16, 0 + .eabi_attribute Tag_ABI_PCS_GOT_use, 0 +@ CHECK: .eabi_attribute 17, 0 + .eabi_attribute Tag_ABI_PCS_wchar_t, 4 +@ CHECK: .eabi_attribute 18, 4 + .eabi_attribute Tag_ABI_FP_rounding, 1 +@ CHECK: .eabi_attribute 19, 1 + .eabi_attribute Tag_ABI_FP_denormal, 2 +@ CHECK: .eabi_attribute 20, 2 + .eabi_attribute Tag_ABI_FP_exceptions, 1 +@ CHECK: .eabi_attribute 21, 1 + .eabi_attribute Tag_ABI_FP_user_exceptions, 1 +@ CHECK: .eabi_attribute 22, 1 + .eabi_attribute Tag_ABI_FP_number_model, 3 +@ CHECK: .eabi_attribute 23, 3 + .eabi_attribute Tag_ABI_align_needed, 1 +@ CHECK: .eabi_attribute 24, 1 + .eabi_attribute Tag_ABI_align_preserved, 2 +@ CHECK: .eabi_attribute 25, 2 + .eabi_attribute Tag_ABI_enum_size, 3 +@ CHECK: .eabi_attribute 26, 3 + .eabi_attribute Tag_ABI_HardFP_use, 0 +@ CHECK: .eabi_attribute 27, 0 + .eabi_attribute Tag_ABI_VFP_args, 1 +@ CHECK: .eabi_attribute 28, 1 + .eabi_attribute Tag_ABI_WMMX_args, 0 +@ CHECK: .eabi_attribute 29, 0 + .eabi_attribute Tag_ABI_FP_optimization_goals, 1 +@ CHECK: .eabi_attribute 31, 1 + .eabi_attribute Tag_compatibility, 1 +@ CHECK: .eabi_attribute 32, 1 + .eabi_attribute Tag_compatibility, 1, "aeabi" +@ CHECK: .eabi_attribute 32, 1, "aeabi" + .eabi_attribute Tag_CPU_unaligned_access, 0 +@ CHECK: .eabi_attribute 34, 0 + .eabi_attribute Tag_FP_HP_extension, 0 +@ CHECK: .eabi_attribute 36, 0 + .eabi_attribute Tag_ABI_FP_16bit_format, 0 +@ CHECK: .eabi_attribute 38, 0 + .eabi_attribute Tag_MPextension_use, 0 +@ CHECK: .eabi_attribute 42, 0 + .eabi_attribute Tag_DIV_use, 0 +@ CHECK: .eabi_attribute 44, 0 + .eabi_attribute Tag_nodefaults, 0 +@ CHECK: .eabi_attribute 64, 0 + .eabi_attribute Tag_also_compatible_with, "gnu" +@ CHECK: .eabi_attribute 65, "gnu" + .eabi_attribute Tag_T2EE_use, 0 +@ CHECK: .eabi_attribute 66, 0 + .eabi_attribute Tag_conformance, "2.09" +@ CHECK: .eabi_attribute 67, "2.09" + .eabi_attribute Tag_Virtualization_use, 0 +@ CHECK: .eabi_attribute 68, 0 + +@ ===--- Compatibility Checks ---=== + + .eabi_attribute Tag_ABI_align8_needed, 1 +@ CHECK: .eabi_attribute 24, 1 + .eabi_attribute Tag_ABI_align8_preserved, 2 +@ CHECK: .eabi_attribute 25, 2 + +@ ===--- GNU AS Compatibility Checks ---=== + + .eabi_attribute 2 * 2 + 1, "cortex-a9" +@ CHECK: .cpu cortex-a9 + .eabi_attribute 2 * 2 + 2, 5 * 2 +@ CHECK: .eabi_attribute 6, 10 + diff --git a/test/MC/ARM/directive-eabi_attribute-diagnostics.s b/test/MC/ARM/directive-eabi_attribute-diagnostics.s new file mode 100644 index 000000000000..d1ae352b25f4 --- /dev/null +++ b/test/MC/ARM/directive-eabi_attribute-diagnostics.s @@ -0,0 +1,36 @@ +@ RUN: not llvm-mc -triple armv7-elf -filetype asm -o /dev/null %s 2>&1 \ +@ RUN: | FileCheck %s + + .syntax unified + .thumb + + .eabi_attribute Tag_unknown_name, 0 +@ CHECK: error: attribute name not recognised: Tag_unknown_name +@ CHECK: .eabi_attribute Tag_unknown_name +@ CHECK: ^ + + .eabi_attribute [non_constant_expression], 0 +@ CHECK: error: expected numeric constant +@ CHECK: .eabi_attribute [non_constant_expression], 0 +@ CHECK: ^ + + .eabi_attribute 42, "forty two" +@ CHECK: error: expected numeric constant +@ CHECK: .eabi_attribute 42, "forty two" +@ CHECK: ^ + + .eabi_attribute 43, 43 +@ CHECK: error: bad string constant +@ CHECK: .eabi_attribute 43, 43 +@ CHECK: ^ + + .eabi_attribute 0 +@ CHECK: error: comma expected +@ CHECK: .eabi_attribute 0 +@ CHECK: ^ + + .eabi_attribute Tag_MPextension_use_old, 0 +@ CHECK: error: attribute name not recognised: Tag_MPextension_use_old +@ CHECK: .eabi_attribute Tag_MPextension_use_old, 0 +@ CHECK: ^ + diff --git a/test/MC/ARM/directive-eabi_attribute-overwrite.s b/test/MC/ARM/directive-eabi_attribute-overwrite.s new file mode 100644 index 000000000000..6fdded3d8312 --- /dev/null +++ b/test/MC/ARM/directive-eabi_attribute-overwrite.s @@ -0,0 +1,17 @@ +@ RUN: llvm-mc -triple armv7-eabi -filetype obj -o - %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .thumb + + .eabi_attribute Tag_compatibility, 1 + .eabi_attribute Tag_compatibility, 1, "aeabi" + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: Value: 1, AEABI +@ CHECK-ATTR: TagName: compatibility +@ CHECK-ATTR: Description: AEABI Conformant +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-even.s b/test/MC/ARM/directive-even.s new file mode 100644 index 000000000000..b92c9f95f5d4 --- /dev/null +++ b/test/MC/ARM/directive-even.s @@ -0,0 +1,70 @@ +@ RUN: llvm-mc -triple armv7-eabi -filetype obj -o - %s | llvm-readobj -s -sd \ +@ RUN: | FileCheck %s + + .syntax unified + + .text + + .even + + .global aligned_function + .type aligned_function,%function +aligned_function: + bkpt + + .space 5 + + .even + + .global unaligned_function + .type unaligned_function,%function +unaligned_function: + bkpt + +@ CHECK: Section { +@ CHECK: Name: .text +@ CHECK: SectionData ( +@ CHECK: 0000: 700020E1 00000000 00007000 20E1 +@ CHECK: ) +@ CHECK: } + + .data + + .space 15 + + .even + + .global classifiable + .type classifiable,%object +classifiable: + .byte 0xf1 + .byte 0x51 + .byte 0xa5 + .byte 0xc1 + .byte 0x00 + .byte 0x00 + .byte 0x1e + .byte 0xab + + .even + + .global declassified + .type declassified,%object +declassified: + .byte 0x51 + .byte 0xa5 + .byte 0xc1 + .byte 0xde + .byte 0x00 + .byte 0x00 + .byte 0xed + .byte 0xf1 + +@ CHECK: Section { +@ CHECK: Name: .data +@ CHECK: SectionData ( +@ CHECK: 0000: 00000000 00000000 00000000 00000000 +@ CHECK: 0010: F151A5C1 00001EAB 51A5C1DE 0000EDF1 +@ CHECK: ) +@ CHECK: } + diff --git a/test/MC/ARM/directive-fpu-multiple.s b/test/MC/ARM/directive-fpu-multiple.s index 6a93f246822f..de2baaf27165 100644 --- a/test/MC/ARM/directive-fpu-multiple.s +++ b/test/MC/ARM/directive-fpu-multiple.s @@ -3,24 +3,16 @@ @ The later .fpu directive should overwrite the earlier one. @ See also: directive-fpu-multiple2.s. -@ RUN: llvm-mc < %s -triple arm-unknown-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s | llvm-readobj -arm-attributes \ +@ RUN: | FileCheck %s -check-prefix CHECK-ATTR .fpu neon .fpu vfpv4 -@ CHECK: Name: .ARM.attributes -@ CHECK-NEXT: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-NEXT: Flags [ (0x0) -@ CHECK-NEXT: ] -@ CHECK-NEXT: Address: 0x0 -@ CHECK-NEXT: Offset: 0x34 -@ CHECK-NEXT: Size: 18 -@ CHECK-NEXT: Link: 0 -@ CHECK-NEXT: Info: 0 -@ CHECK-NEXT: AddressAlignment: 1 -@ CHECK-NEXT: EntrySize: 0 -@ CHECK-NEXT: SectionData ( -@ CHECK-NEXT: 0000: 41110000 00616561 62690001 07000000 -@ CHECK-NEXT: 0010: 0A05 -@ CHECK-NEXT: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: FP_arch +@ CHECK-ATTR: Description: VFPv4 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-fpu-softvfp.s b/test/MC/ARM/directive-fpu-softvfp.s new file mode 100644 index 000000000000..f10845fcb341 --- /dev/null +++ b/test/MC/ARM/directive-fpu-softvfp.s @@ -0,0 +1,8 @@ +@ RUN: llvm-mc < %s -triple armv7-unknown-linux-gnueabi -filetype=obj -o /dev/null + +@ Check softvfp as the FPU name. + +@ Expected result: The integrated-as should be able to assemble this file +@ without problems. + + .fpu softvfp diff --git a/test/MC/ARM/directive-literals.s b/test/MC/ARM/directive-literals.s new file mode 100644 index 000000000000..eb09867d8aa7 --- /dev/null +++ b/test/MC/ARM/directive-literals.s @@ -0,0 +1,26 @@ +@ RUN: llvm-mc -triple arm %s | FileCheck %s + + .data + +short: + .short 0 + .short 0xdefe + +@ CHECK-LABEL: short +@ CHECK-NEXT: .short 0 +@ CHECK-NEXT: .short 57086 + +hword: + .hword 0 + .hword 0xdefe + +@ CHECK-LABEL: hword +@ CHECK-NEXT: .short 0 +@ CHECK-NEXT: .short 57086 + +word: + .word 3 + +@ CHECK-LABEL: word +@ CHECK-NEXT: .long 3 + diff --git a/test/MC/ARM/directive-object_arch-2.s b/test/MC/ARM/directive-object_arch-2.s new file mode 100644 index 000000000000..3aca434a1e4c --- /dev/null +++ b/test/MC/ARM/directive-object_arch-2.s @@ -0,0 +1,22 @@ +@ RUN: llvm-mc -triple armv7-eabi -filetype obj -o - %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s + + .syntax unified + + .object_arch armv4 + .arch armv7 + +@ CHECK: FileAttributes { +@ CHECK: Attribute { +@ CHECK: Tag: 5 +@ CHECK: TagName: CPU_name +@ CHECK: Value: 7 +@ CHECK: } +@ CHECK: Attribute { +@ CHECK: Tag: 6 +@ CHEKC: Value: 1 +@ CHECK: TagName: CPU_arch +@ CHECK: Description: ARM v4 +@ CHECK: } +@ CHECK: } + diff --git a/test/MC/ARM/directive-object_arch-3.s b/test/MC/ARM/directive-object_arch-3.s new file mode 100644 index 000000000000..5dd26197ab16 --- /dev/null +++ b/test/MC/ARM/directive-object_arch-3.s @@ -0,0 +1,11 @@ +@ RUN: llvm-mc -triple armv7-eabi -filetype asm -o - %s | FileCheck %s + + .syntax unified + + .arch armv7 + .object_arch armv4 + +@ CHECK: .text +@ CHECK: .arch armv7 +@ CHECK: .object_arch armv4 + diff --git a/test/MC/ARM/directive-object_arch-diagnostics.s b/test/MC/ARM/directive-object_arch-diagnostics.s new file mode 100644 index 000000000000..91b15c8d2d83 --- /dev/null +++ b/test/MC/ARM/directive-object_arch-diagnostics.s @@ -0,0 +1,23 @@ +@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null %s 2>&1 \ +@ RUN: | FileCheck %s + + .syntax unified + + .object_arch i686 + +@ CHECK: error: unknown architecture 'i686' +@ CHECK: .object_arch i686 +@ CHECK: ^ + + .object_arch armv4! + +@ CHECK: error: unexpected token +@ CHECK: .object_arch armv4! +@ CHECK: ^ + + .object_arch, invalid + +@ CHECK: error: unexpected token +@ CHECK: .object_arch, invalid +@ CHECK: ^ + diff --git a/test/MC/ARM/directive-object_arch.s b/test/MC/ARM/directive-object_arch.s new file mode 100644 index 000000000000..0707077630e0 --- /dev/null +++ b/test/MC/ARM/directive-object_arch.s @@ -0,0 +1,22 @@ +@ RUN: llvm-mc -triple armv7-eabi -filetype obj -o - %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s + + .syntax unified + + .arch armv7 + .object_arch armv4 + +@ CHECK: FileAttributes { +@ CHECK: Attribute { +@ CHECK: Tag: 5 +@ CHECK: TagName: CPU_name +@ CHECK: Value: 7 +@ CHECK: } +@ CHECK: Attribute { +@ CHECK: Tag: 6 +@ CHEKC: Value: 1 +@ CHECK: TagName: CPU_arch +@ CHECK: Description: ARM v4 +@ CHECK: } +@ CHECK: } + diff --git a/test/MC/ARM/directive-tlsdescseq-diagnostics.s b/test/MC/ARM/directive-tlsdescseq-diagnostics.s new file mode 100644 index 000000000000..0d33b5894fea --- /dev/null +++ b/test/MC/ARM/directive-tlsdescseq-diagnostics.s @@ -0,0 +1,35 @@ +@ RUN: not llvm-mc -triple armv7-linux-gnu -filetype asm -o /dev/null %s 2>&1 \ +@ RUN: | FileCheck %s + + .type missing_variable,%function +missing_variable: +.tlsdescseq + +@ CHECK: error: expected variable after '.tlsdescseq' directive +@ CHECK: .tlsdescseq +@ CHECK: ^ + + .type bad_expression,%function +bad_expression: +.tlsdescseq variable(tlsdesc) + +@ CHECK: error: unexpected token +@ CHECK: .tlsdescseq variable(tlsdesc) +@ CHECK: ^ + + .type trailing_garbage,%function +trailing_garbage: +.tlsdescseq variable, + +@ CHECK: error: unexpected token +@ CHECK: .tlsdescseq variable, +@ CHECK: ^ + + .type invalid_use,%function +invalid_use: + blx invalid(tlsdescseq) + +@ CHECK: error: invalid variant 'tlsdescseq' +@ CHECK: blx invalid(tlsdescseq) +@ CHECK: ^ + diff --git a/test/MC/ARM/directive-tlsdescseq.s b/test/MC/ARM/directive-tlsdescseq.s new file mode 100644 index 000000000000..12db0589d7ad --- /dev/null +++ b/test/MC/ARM/directive-tlsdescseq.s @@ -0,0 +1,33 @@ +@ RUN: llvm-mc -triple armv7-linux-gnu -filetype obj -o - %s | llvm-readobj -r \ +@ RUN: | FileCheck %s +@ RUN: llvm-mc -triple armv7-linux-gnu -filetype asm -o - %s \ +@ RUN: | FileCheck -check-prefix CHECK-ASM %s + + .type tlsdescseq,%function +tlsdescseq: + ldr r1, [pc, #8] +1: +.tlsdescseq variable + add r2, pc, r1 +.tlsdescseq variable + ldr r3, [r1, #4] +.tlsdescseq variable + blx r3 +2: + .word variable(tlsdesc) + (. - 1b) + +@ CHECK: Relocations [ +@ CHECK: 0x4 R_ARM_TLS_DESCSEQ variable 0x0 +@ CHECK: 0x8 R_ARM_TLS_DESCSEQ variable 0x0 +@ CHECK: 0xC R_ARM_TLS_DESCSEQ variable 0x0 +@ CHECK: 0x10 R_ARM_TLS_GOTDESC variable 0x0 +@ CHECK: ] + +@ CHECK-ASM: ldr r1, [pc, #8] +@ CHECK-ASM: .tlsdescseq variable +@ CHECK-ASM: add r2, pc, r1 +@ CHECK-ASM: .tlsdescseq variable +@ CHECK-ASM: ldr r3, [r1, #4] +@ CHECK-ASM: .tlsdescseq variable +@ CHECK-ASM: blx r3 + diff --git a/test/MC/ARM/directive-word-diagnostics.s b/test/MC/ARM/directive-word-diagnostics.s new file mode 100644 index 000000000000..e68595b77878 --- /dev/null +++ b/test/MC/ARM/directive-word-diagnostics.s @@ -0,0 +1,12 @@ +@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s + + .cpu armv7 + + .type double_diagnostics,%function +double_diagnostics: + .word invalid(invalid) + 32 + +@ CHECK: error: invalid variant 'invalid' +@ CHECK-NOT: error: unexpected token at start of statement + diff --git a/test/MC/ARM/dot-req-case-insensitive.s b/test/MC/ARM/dot-req-case-insensitive.s new file mode 100644 index 000000000000..c1ca5667fcb5 --- /dev/null +++ b/test/MC/ARM/dot-req-case-insensitive.s @@ -0,0 +1,20 @@ +@ RUN: llvm-mc -triple=arm < %s | FileCheck %s + .syntax unified +_foo: + + OBJECT .req r2 + mov r4, OBJECT + mov r4, oBjEcT + .unreq oBJECT + +_foo2: + OBJECT .req r5 + mov r4, OBJECT + .unreq OBJECT + +@ CHECK-LABEL: _foo: +@ CHECK: mov r4, r2 +@ CHECK: mov r4, r2 + +@ CHECK-LABEL: _foo2: +@ CHECK: mov r4, r5 diff --git a/test/MC/ARM/dwarf-asm-multiple-sections.s b/test/MC/ARM/dwarf-asm-multiple-sections.s new file mode 100644 index 000000000000..ed1b89eff3cd --- /dev/null +++ b/test/MC/ARM/dwarf-asm-multiple-sections.s @@ -0,0 +1,79 @@ +// RUN: llvm-mc < %s -triple=armv7-linux-gnueabi -filetype=obj -o %t -g -fdebug-compilation-dir=/tmp +// RUN: llvm-dwarfdump %t | FileCheck -check-prefix DWARF %s +// RUN: llvm-objdump -r %t | FileCheck -check-prefix RELOC %s +// RUN: not llvm-mc < %s -triple=armv7-linux-gnueabi -filetype=obj -o %t -g -dwarf-version 2 2>&1 | FileCheck -check-prefix VERSION %s +// RUN: not llvm-mc < %s -triple=armv7-linux-gnueabi -filetype=obj -o %t -g -dwarf-version 1 2>&1 | FileCheck -check-prefix DWARF1 %s +// RUN: not llvm-mc < %s -triple=armv7-linux-gnueabi -filetype=obj -o %t -g -dwarf-version 5 2>&1 | FileCheck -check-prefix DWARF5 %s + .section .text, "ax" +a: + mov r0, r0 + + .section foo, "ax" +b: + mov r1, r1 + +// DWARF: .debug_abbrev contents: +// DWARF: Abbrev table for offset: 0x00000000 +// DWARF: [1] DW_TAG_compile_unit DW_CHILDREN_yes +// DWARF: DW_AT_stmt_list DW_FORM_data4 +// DWARF: DW_AT_ranges DW_FORM_data4 +// DWARF: DW_AT_name DW_FORM_string +// DWARF: DW_AT_comp_dir DW_FORM_string +// DWARF: DW_AT_producer DW_FORM_string +// DWARF: DW_AT_language DW_FORM_data2 + +// DWARF: .debug_info contents: +// DWARF: 0x{{[0-9a-f]+}}: DW_TAG_compile_unit [1] +// CHECK-NOT-DWARF: DW_TAG_ +// DWARF: DW_AT_ranges [DW_FORM_data4] (0x00000000) + +// DWARF: 0x{{[0-9a-f]+}}: DW_TAG_label [2] * +// DWARF-NEXT: DW_AT_name [DW_FORM_string] ("a") + +// DWARF: 0x{{[0-9a-f]+}}: DW_TAG_label [2] * +// DWARF-NEXT: DW_AT_name [DW_FORM_string] ("b") + + +// DWARF: .debug_aranges contents: +// DWARF-NEXT: Address Range Header: length = 0x00000024, version = 0x0002, cu_offset = 0x00000000, addr_size = 0x04, seg_size = 0x00 +// DWARF-NEXT: [0x00000000 - 0x00000004) +// DWARF-NEXT: [0x00000000 - 0x00000004) + + +// DWARF: .debug_line contents: +// DWARF: 0x0000000000000000 9 0 1 0 0 is_stmt +// DWARF-NEXT: 0x0000000000000004 9 0 1 0 0 is_stmt end_sequence +// DWARF-NEXT: 0x0000000000000000 13 0 1 0 0 is_stmt +// DWARF-NEXT: 0x0000000000000004 13 0 1 0 0 is_stmt end_sequence + + +// DWARF: .debug_ranges contents: +// DWARF: 00000000 ffffffff 00000000 +// DWARF: 00000000 00000000 00000004 +// DWARF: 00000000 ffffffff 00000000 +// DWARF: 00000000 00000000 00000004 +// DWARF: 00000000 <End of list> + + + +// RELOC: RELOCATION RECORDS FOR [.rel.debug_info]: +// RELOC-NEXT: 00000006 R_ARM_ABS32 .debug_abbrev +// RELOC-NEXT: 0000000c R_ARM_ABS32 .debug_line +// RELOC-NEXT: 00000010 R_ARM_ABS32 .debug_ranges +// RELOC-NEXT: R_ARM_ABS32 .text +// RELOC-NEXT: R_ARM_ABS32 foo + +// RELOC: RELOCATION RECORDS FOR [.rel.debug_ranges]: +// RELOC-NEXT: 00000004 R_ARM_ABS32 .text +// RELOC-NEXT: 00000014 R_ARM_ABS32 foo + +// RELOC: RELOCATION RECORDS FOR [.rel.debug_aranges]: +// RELOC-NEXT: 00000006 R_ARM_ABS32 .debug_info +// RELOC-NEXT: 00000010 R_ARM_ABS32 .text +// RELOC-NEXT: 00000018 R_ARM_ABS32 foo + + +// VERSION: {{.*}} error: DWARF2 only supports one section per compilation unit + +// DWARF1: Dwarf version 1 is not supported. +// DWARF5: Dwarf version 5 is not supported. diff --git a/test/MC/ARM/dwarf-asm-no-code.s b/test/MC/ARM/dwarf-asm-no-code.s new file mode 100644 index 000000000000..7d06a4190091 --- /dev/null +++ b/test/MC/ARM/dwarf-asm-no-code.s @@ -0,0 +1,27 @@ +// RUN: llvm-mc < %s -triple=armv7-linux-gnueabi -filetype=obj -o %t -g -fdebug-compilation-dir=/tmp +// RUN: llvm-dwarfdump %t | FileCheck -check-prefix DWARF %s +// RUN: llvm-objdump -r %t | FileCheck -check-prefix RELOC %s + +// If there is no code in an assembly file, no debug info is produced + +.section .data, "aw" +a: +.long 42 + +// DWARF: .debug_abbrev contents: +// DWARF-NEXT: < EMPTY > + +// DWARF: .debug_info contents: + +// DWARF: .debug_aranges contents: + +// DWARF: .debug_line contents: + +// DWARF: .debug_ranges contents: + + +// RELOC-NOT: RELOCATION RECORDS FOR [.rel.debug_info]: + +// RELOC-NOT: RELOCATION RECORDS FOR [.rel.debug_ranges]: + +// RELOC-NOT: RELOCATION RECORDS FOR [.rel.debug_aranges]: diff --git a/test/MC/ARM/dwarf-asm-nonstandard-section.s b/test/MC/ARM/dwarf-asm-nonstandard-section.s new file mode 100644 index 000000000000..497a39ad1162 --- /dev/null +++ b/test/MC/ARM/dwarf-asm-nonstandard-section.s @@ -0,0 +1,57 @@ +// RUN: llvm-mc < %s -triple=armv7-linux-gnueabi -filetype=obj -o %t -g -fdebug-compilation-dir=/tmp +// RUN: llvm-dwarfdump %t | FileCheck -check-prefix DWARF %s +// RUN: llvm-objdump -r %t | FileCheck -check-prefix RELOC %s + + .section foo, "ax" +b: + mov r1, r1 + +// DWARF: .debug_abbrev contents: +// DWARF: Abbrev table for offset: 0x00000000 +// DWARF: [1] DW_TAG_compile_unit DW_CHILDREN_yes +// DWARF: DW_AT_stmt_list DW_FORM_data4 +// DWARF: DW_AT_low_pc DW_FORM_addr +// DWARF: DW_AT_high_pc DW_FORM_addr +// DWARF: DW_AT_name DW_FORM_string +// DWARF: DW_AT_comp_dir DW_FORM_string +// DWARF: DW_AT_producer DW_FORM_string +// DWARF: DW_AT_language DW_FORM_data2 + +// DWARF: .debug_info contents: +// DWARF: 0x{{[0-9a-f]+}}: DW_TAG_compile_unit [1] +// DWARF-NOT: DW_TAG_ +// DWARF: DW_AT_low_pc [DW_FORM_addr] (0x0000000000000000) +// DWARF: DW_AT_high_pc [DW_FORM_addr] (0x0000000000000004) + +// DWARF: 0x{{[0-9a-f]+}}: DW_TAG_label [2] * +// DWARF-NEXT: DW_AT_name [DW_FORM_string] ("b") + + +// DWARF: .debug_aranges contents: +// DWARF-NEXT: Address Range Header: length = 0x0000001c, version = 0x0002, cu_offset = 0x00000000, addr_size = 0x04, seg_size = 0x00 +// DWARF-NEXT: [0x00000000 - 0x00000004) + + +// DWARF: .debug_line contents: +// DWARF: 0x0000000000000000 7 0 1 0 0 is_stmt +// DWARF-NEXT: 0x0000000000000004 7 0 1 0 0 is_stmt end_sequence + + +// DWARF: .debug_ranges contents: +// DWARF-NOT: {{0-9a-f}} +// DWARF: .debug_pubnames contents: + + + +// RELOC: RELOCATION RECORDS FOR [.rel.debug_info]: +// RELOC-NEXT: 00000006 R_ARM_ABS32 .debug_abbrev +// RELOC-NEXT: 0000000c R_ARM_ABS32 .debug_line +// RELOC-NEXT: R_ARM_ABS32 foo +// RELOC-NEXT: R_ARM_ABS32 foo +// RELOC-NEXT: R_ARM_ABS32 foo + +// RELOC-NOT: RELOCATION RECORDS FOR [.rel.debug_ranges]: + +// RELOC: RELOCATION RECORDS FOR [.rel.debug_aranges]: +// RELOC-NEXT: 00000006 R_ARM_ABS32 .debug_info +// RELOC-NEXT: 00000010 R_ARM_ABS32 foo diff --git a/test/MC/ARM/dwarf-asm-single-section.s b/test/MC/ARM/dwarf-asm-single-section.s new file mode 100644 index 000000000000..c57e6498a38a --- /dev/null +++ b/test/MC/ARM/dwarf-asm-single-section.s @@ -0,0 +1,56 @@ +// RUN: llvm-mc < %s -triple=armv7-linux-gnueabi -filetype=obj -o %t -g -fdebug-compilation-dir=/tmp +// RUN: llvm-dwarfdump %t | FileCheck -check-prefix DWARF %s +// RUN: llvm-objdump -r %t | FileCheck -check-prefix RELOC %s + + .section .text, "ax" +a: + mov r0, r0 + + +// DWARF: .debug_abbrev contents: +// DWARF: Abbrev table for offset: 0x00000000 +// DWARF: [1] DW_TAG_compile_unit DW_CHILDREN_yes +// DWARF: DW_AT_stmt_list DW_FORM_data4 +// DWARF: DW_AT_low_pc DW_FORM_addr +// DWARF: DW_AT_high_pc DW_FORM_addr +// DWARF: DW_AT_name DW_FORM_string +// DWARF: DW_AT_comp_dir DW_FORM_string +// DWARF: DW_AT_producer DW_FORM_string +// DWARF: DW_AT_language DW_FORM_data2 + +// DWARF: .debug_info contents: +// DWARF: 0x{{[0-9a-f]+}}: DW_TAG_compile_unit [1] +// CHECK-NOT-DWARF: DW_TAG_ +// DWARF: DW_AT_low_pc [DW_FORM_addr] (0x0000000000000000) +// DWARF: DW_AT_high_pc [DW_FORM_addr] (0x0000000000000004) + +// DWARF: 0x{{[0-9a-f]+}}: DW_TAG_label [2] * +// DWARF-NEXT: DW_AT_name [DW_FORM_string] ("a") + + +// DWARF: .debug_aranges contents: +// DWARF-NEXT: Address Range Header: length = 0x0000001c, version = 0x0002, cu_offset = 0x00000000, addr_size = 0x04, seg_size = 0x00 +// DWARF-NEXT: [0x00000000 - 0x00000004) + +// DWARF: .debug_line contents: +// DWARF: 0x0000000000000000 7 0 1 0 0 is_stmt +// DWARF-NEXT: 0x0000000000000004 7 0 1 0 0 is_stmt end_sequence + + +// DWARF: .debug_ranges contents: +// DWARF-NOT: {{0-9a-f}} +// DWARF: .debug_pubnames contents: + + +// RELOC: RELOCATION RECORDS FOR [.rel.debug_info]: +// RELOC-NEXT: 00000006 R_ARM_ABS32 .debug_abbrev +// RELOC-NEXT: 0000000c R_ARM_ABS32 .debug_line +// RELOC-NEXT: R_ARM_ABS32 .text +// RELOC-NEXT: R_ARM_ABS32 .text +// RELOC-NEXT: R_ARM_ABS32 .text + +// RELOC-NOT: RELOCATION RECORDS FOR [.rel.debug_ranges]: + +// RELOC: RELOCATION RECORDS FOR [.rel.debug_aranges]: +// RELOC-NEXT: 00000006 R_ARM_ABS32 .debug_info +// RELOC-NEXT: 00000010 R_ARM_ABS32 .text diff --git a/test/MC/ARM/dwarf-cfi-initial-state.s b/test/MC/ARM/dwarf-cfi-initial-state.s new file mode 100644 index 000000000000..0d1c08af7282 --- /dev/null +++ b/test/MC/ARM/dwarf-cfi-initial-state.s @@ -0,0 +1,17 @@ +# RUN: llvm-mc < %s -triple=armv7-linux-gnueabi -filetype=obj -o - \ +# RUN: | llvm-dwarfdump - | FileCheck %s + +_proc: +.cfi_sections .debug_frame +.cfi_startproc +bx lr +.cfi_endproc + +# CHECK: .debug_frame contents: +# CHECK: CIE +# CHECK-NOT: DW_CFA +# When llvm-dwarfdump prints the full info for the DW_CFA_def_cfa +# field, we can check that here too. +# CHECK: DW_CFA_def_cfa: +# CHECK-NOT: DW_CFA +# CHECK: FDE diff --git a/test/MC/ARM/eh-directive-cantunwind-diagnostics.s b/test/MC/ARM/eh-directive-cantunwind-diagnostics.s index 640cc3005fcb..9eca16498e14 100644 --- a/test/MC/ARM/eh-directive-cantunwind-diagnostics.s +++ b/test/MC/ARM/eh-directive-cantunwind-diagnostics.s @@ -24,7 +24,7 @@ func1: @ CHECK: error: .personality can't be used with .cantunwind directive @ CHECK: .personality __gxx_personality_v0 @ CHECK: ^ -@ CHECK: error: .cantunwind was specified here +@ CHECK: note: .cantunwind was specified here @ CHECK: .cantunwind @ CHECK: ^ .fnend @@ -44,7 +44,7 @@ func2: @ CHECK: error: .handlerdata can't be used with .cantunwind directive @ CHECK: .handlerdata @ CHECK: ^ -@ CHECK: error: .cantunwind was specified here +@ CHECK: note: .cantunwind was specified here @ CHECK: .cantunwind @ CHECK: ^ .fnend @@ -64,7 +64,7 @@ func3: @ CHECK: error: .cantunwind can't be used with .personality directive @ CHECK: .cantunwind @ CHECK: ^ -@ CHECK: error: .personality was specified here +@ CHECK: note: .personality was specified here @ CHECK: .personality __gxx_personality_v0 @ CHECK: ^ .fnend @@ -84,7 +84,7 @@ func4: @ CHECK: error: .cantunwind can't be used with .handlerdata directive @ CHECK: .cantunwind @ CHECK: ^ -@ CHECK: error: .handlerdata was specified here +@ CHECK: note: .handlerdata was specified here @ CHECK: .handlerdata @ CHECK: ^ .fnend diff --git a/test/MC/ARM/eh-directive-fnstart-diagnostics.s b/test/MC/ARM/eh-directive-fnstart-diagnostics.s index 75ddd9faebc1..11364dee39b0 100644 --- a/test/MC/ARM/eh-directive-fnstart-diagnostics.s +++ b/test/MC/ARM/eh-directive-fnstart-diagnostics.s @@ -24,7 +24,7 @@ func1: @ CHECK: error: .fnstart starts before the end of previous one @ CHECK: .fnstart @ CHECK: ^ -@ CHECK: error: previous .fnstart starts here +@ CHECK: note: .fnstart was specified here @ CHECK: .fnstart @ CHECK: ^ func2: diff --git a/test/MC/ARM/eh-directive-movsp-diagnostics.s b/test/MC/ARM/eh-directive-movsp-diagnostics.s new file mode 100644 index 000000000000..519e7d742f37 --- /dev/null +++ b/test/MC/ARM/eh-directive-movsp-diagnostics.s @@ -0,0 +1,102 @@ +@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s + + .syntax unified + .thumb + + .global false_start + .type false_start,%function + .thumb_func +false_start: + .movsp r7 + +@ CHECK: error: .fnstart must precede .movsp directive +@ CHECK: .movsp r7 +@ CHECK: ^ + + .global beyond_saving + .type beyond_saving,%function + .thumb_func +beyond_saving: + .fnstart + .setfp r11, sp, #8 + add r11, sp, #8 + .movsp r7 + mov r7, r11 + .fnend + +@ CHECK: error: unexpected .movsp directive +@ CHECK: .movsp r7 +@ CHECK: ^ + + + .global sp_invalid + .type sp_invalid,%function + .thumb_func +sp_invalid: + .fnstart + .movsp r13 + mov sp, sp + .fnend + +@ CHECK: error: sp and pc are not permitted in .movsp directive +@ CHECK: .movsp r13 +@ CHECK: ^ + + + .global pc_invalid + .type pc_invalid,%function + .thumb_func +pc_invalid: + .fnstart + .movsp r15 + mov sp, pc + .fnend + +@ CHECK: error: sp and pc are not permitted in .movsp directive +@ CHECK: .movsp r15 +@ CHECK: ^ + + + .global constant_required + .type constant_required,%function + .thumb_func +constant_required: + .fnstart + .movsp r11, + mov sp, r11 + .fnend + +@ CHECK: error: expected #constant +@ CHECK: .movsp r11, +@ CHECK: ^ + + + .global constant_constant + .type constant_constant,%function + .thumb_func +constant_constant: + .fnstart + .movsp r11, #constant + mov sp, r11 + .fnend + +@ CHECK: error: offset must be an immediate constant +@ CHECK: .movsp r11, #constant +@ CHECK: ^ + + + .arm + + .global register_required + .type register_required,%function +register_required: + .fnstart + .movsp #42 + mov sp, #42 + .fnend + +@ CHECK: error: register expected +@ CHECK: .movsp #42 +@ CHECK: ^ + diff --git a/test/MC/ARM/eh-directive-movsp.s b/test/MC/ARM/eh-directive-movsp.s new file mode 100644 index 000000000000..620f5b769d4c --- /dev/null +++ b/test/MC/ARM/eh-directive-movsp.s @@ -0,0 +1,44 @@ +@ RUN: llvm-mc -triple armv7-eabi -filetype obj -o - %s | llvm-readobj -s -sd \ +@ RUN: | FileCheck %s + + .syntax unified + .thumb + + .section .duplicate + + .global duplicate + .type duplicate,%function +duplicate: + .fnstart + .setfp sp, sp, #8 + add sp, sp, #8 + .movsp r11 + mov r11, sp + .fnend + +@ CHECK: Section { +@ CHECK: Name: .ARM.exidx.duplicate +@ CHECK: SectionData ( +@ CHECK: 0000: 00000000 B09B9B80 +@ CHECK: ) +@ CHECK: } + + + .section .squash + + .global squash + .type squash,%function +squash: + .fnstart + .movsp ip + mov ip, sp + .save {fp, ip, lr} + stmfd sp!, {fp, ip, lr} + .fnend + +@ CHECK: Section { +@ CHECK: Name: .ARM.exidx.squash +@ CHECK: SectionData ( +@ CHECK: 0000: 00000000 9C808580 +@ CHECK: ) +@ CHECK: } diff --git a/test/MC/ARM/eh-directive-personalityindex-diagnostics.s b/test/MC/ARM/eh-directive-personalityindex-diagnostics.s new file mode 100644 index 000000000000..2dc2c8045a65 --- /dev/null +++ b/test/MC/ARM/eh-directive-personalityindex-diagnostics.s @@ -0,0 +1,122 @@ +@ RUN: not llvm-mc -triple armv7-linux-eabi -filetype asm -o /dev/null %s 2>&1 \ +@ RUN: | FileCheck %s + + .syntax unified + .thumb + + .global function + .type function,%function + .thumb_func +function: + .personalityindex 0 + +@ CHECK: error: .fnstart must precede .personalityindex directive +@ CHECK: .personalityindex 0 +@ CHECK: ^ + + .global ununwindable + .type ununwindable,%function + .thumb_func +ununwindable: + .fnstart + .cantunwind + .personalityindex 0 + .fnend + +@ CHECK: error: .personalityindex cannot be used with .cantunwind +@ CHECK: .personalityindex 0 +@ CHECK: ^ +@ CHECK: note: .cantunwind was specified here +@ CHECK: .cantunwind +@ CHECK: ^ + + .global nodata + .type nodata,%function + .thumb_func +nodata: + .fnstart + .handlerdata + .personalityindex 0 + .fnend + +@ CHECK: error: .personalityindex must precede .handlerdata directive +@ CHECK: .personalityindex 0 +@ CHECK: ^ +@ CHECK: note: .handlerdata was specified here +@ CHECK: .handlerdata +@ CHECK: ^ + + .global multiple_personality + .type multiple_personality,%function + .thumb_func +multiple_personality: + .fnstart + .personality __aeabi_personality_pr0 + .personalityindex 0 + .fnend + +@ CHECK: error: multiple personality directives +@ CHECK: .personalityindex 0 +@ CHECK: ^ +@ CHECK: note: .personality was specified here +@ CHECK: .personality __aeabi_personality_pr0 +@ CHECK: ^ +@ CHECK: note: .personalityindex was specified here +@ CHECK: .personalityindex 0 +@ CHECK: ^ + + .global multiple_personality_indicies + .type multiple_personality_indicies,%function + .thumb_func +multiple_personality_indicies: + .fnstart + .personalityindex 0 + .personalityindex 1 + .fnend + +@ CHECK: error: multiple personality directives +@ CHECK: .personalityindex 1 +@ CHECK: ^ +@ CHECK: note: .personalityindex was specified here +@ CHECK: .personalityindex 0 +@ CHECK: ^ +@ CHECK: note: .personalityindex was specified here +@ CHECK: .personalityindex 1 +@ CHECK: ^ + + .global invalid_expression + .type invalid_expression,%function + .thumb_func +invalid_expression: + .fnstart + .personalityindex <expression> + .fnend + +@ CHECK: error: unknown token in expression +@ CHECK: .personalityindex <expression> +@ CHECK: ^ + + .global nonconstant_expression + .type nonconstant_expression,%function + .thumb_func +nonconstant_expression: + .fnstart + .personalityindex nonconstant_expression + .fnend + +@ CHECK: error: index must be a constant number +@ CHECK: .personalityindex nonconstant_expression +@ CHECK: ^ + + .global bad_index + .type bad_index,%function + .thumb_func +bad_index: + .fnstart + .personalityindex 42 + .fnend + +@ CHECK: error: personality routine index should be in range [0-3] +@ CHECK: .personalityindex 42 +@ CHECK: ^ + diff --git a/test/MC/ARM/eh-directive-personalityindex.s b/test/MC/ARM/eh-directive-personalityindex.s new file mode 100644 index 000000000000..551722750933 --- /dev/null +++ b/test/MC/ARM/eh-directive-personalityindex.s @@ -0,0 +1,202 @@ +@ RUN: llvm-mc -triple armv7-linux-eabi -filetype obj -o - %s \ +@ RUN: | llvm-readobj -s -sd -sr | FileCheck %s + + .syntax unified + .thumb + + + .section .pr0 + + .global pr0 + .type pr0,%function + .thumb_func +pr0: + .fnstart + .personalityindex 0 + bx lr + .fnend + +@ CHECK: Section { +@ CHECK: Name: .ARM.exidx.pr0 +@ CHECK: SectionData ( +@ CHECK: 0000: 00000000 B0B0B080 +@ CHECK: ) +@ CHECK: } + +@ CHECK: Section { +@ CHECK: Name: .rel.ARM.exidx.pr0 +@ CHECK: Relocations [ +@ CHECK: 0x0 R_ARM_PREL31 .pr0 0x0 +@ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 0x0 +@ CHECK: ] +@ CHECK: } + + .section .pr0.nontrivial + + .global pr0_nontrivial + .type pr0_nontrivial,%function + .thumb_func +pr0_nontrivial: + .fnstart + .personalityindex 0 + .pad #0x10 + sub sp, sp, #0x10 + add sp, sp, #0x10 + bx lr + .fnend + +@ CHECK: Section { +@ CHECK: Name: .ARM.exidx.pr0.nontrivial +@ CHECK: SectionData ( +@ CHECK: 0000: 00000000 B0B00380 +@ CHECK: ) +@ CHECK: } + +@ CHECK: Section { +@ CHECK: Name: .rel.ARM.exidx.pr0.nontrivial +@ CHECK: Relocations [ +@ CHECK: 0x0 R_ARM_PREL31 .pr0.nontrivial 0x0 +@ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 0x0 +@ CHECK: ] +@ CHECK: } + + .section .pr1 + + .global pr1 + .type pr1,%function + .thumb_func +pr1: + .fnstart + .personalityindex 1 + bx lr + .fnend + +@ CHECK: Section { +@ CHECK: Name: .ARM.extab.pr1 +@ CHECK: SectionData ( +@ CHECK: 0000: B0B00081 00000000 +@ CHECK: ) +@ CHECK: } + +@ CHECK: Section { +@ CHECK: Name: .ARM.exidx.pr1 +@ CHECK: SectionData ( +@ CHECK: 0000: 00000000 00000000 +@ CHECK: ) +@ CHECK: } + +@ CHECK: Section { +@ CHECK: Name: .rel.ARM.exidx.pr1 +@ CHECK: Relocations [ +@ CHECK: 0x0 R_ARM_PREL31 .pr1 0x0 +@ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr1 0x0 +@ CHECK: 0x4 R_ARM_PREL31 .ARM.extab.pr1 0x0 +@ CHECK: ] +@ CHECK: } + + .section .pr1.nontrivial + + .global pr1_nontrivial + .type pr1_nontrivial,%function + .thumb_func +pr1_nontrivial: + .fnstart + .personalityindex 1 + .pad #0x10 + sub sp, sp, #0x10 + add sp, sp, #0x10 + bx lr + .fnend + +@ CHECK: Section { +@ CHECK: Name: .ARM.extab.pr1.nontrivial +@ CHECK: SectionData ( +@ CHECK: 0000: B0030081 00000000 +@ CHECK: ) +@ CHECK: } + +@ CHECK: Section { +@ CHECK: Name: .ARM.exidx.pr1.nontrivial +@ CHECK: SectionData ( +@ CHECK: 0000: 00000000 00000000 +@ CHECK: ) +@ CHECK: } + +@ CHECK: Section { +@ CHECK: Name: .rel.ARM.exidx.pr1.nontrivial +@ CHECK: Relocations [ +@ CHECK: 0x0 R_ARM_PREL31 .pr1.nontrivial 0x0 +@ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr1 0x0 +@ CHECK: 0x4 R_ARM_PREL31 .ARM.extab.pr1.nontrivial 0x0 +@ CHECK: ] +@ CHECK: } + + .section .pr2 + + .global pr2 + .type pr2,%function + .thumb_func +pr2: + .fnstart + .personalityindex 2 + bx lr + .fnend + +@ CHECK: Section { +@ CHECK: Name: .ARM.extab.pr2 +@ CHECK: SectionData ( +@ CHECK: 0000: B0B00082 00000000 +@ CHECK: ) +@ CHECK: } + +@ CHECK: Section { +@ CHECK: Name: .ARM.exidx.pr2 +@ CHECK: SectionData ( +@ CHECK: 0000: 00000000 00000000 +@ CHECK: ) +@ CHECK: } + +@ CHECK: Section { +@ CHECK: Name: .rel.ARM.exidx.pr2 +@ CHECK: Relocations [ +@ CHECK: 0x0 R_ARM_PREL31 .pr2 0x0 +@ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr2 0x0 +@ CHECK: 0x4 R_ARM_PREL31 .ARM.extab.pr2 0x0 +@ CHECK: ] +@ CHECK: } + + .section .pr2.nontrivial + .type pr2_nontrivial,%function + .thumb_func +pr2_nontrivial: + .fnstart + .personalityindex 2 + .pad #0x10 + sub sp, sp, #0x10 + add sp, sp, #0x10 + bx lr + .fnend + +@ CHECK: Section { +@ CHECK: Name: .ARM.extab.pr2.nontrivial +@ CHECK: SectionData ( +@ CHECK: 0000: B0030082 00000000 +@ CHECK: ) +@ CHECK: } + +@ CHECK: Section { +@ CHECK: Name: .ARM.exidx.pr2.nontrivial +@ CHECK: SectionData ( +@ CHECK: 0000: 00000000 00000000 +@ CHECK: ) +@ CHECK: } + +@ CHECK: Section { +@ CHECK: Name: .rel.ARM.exidx.pr2.nontrivial +@ CHECK: Relocations [ +@ CHECK: 0x0 R_ARM_PREL31 .pr2.nontrivial 0x0 +@ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr2 0x0 +@ CHECK: 0x4 R_ARM_PREL31 .ARM.extab.pr2.nontrivial 0x0 +@ CHECK: ] +@ CHECK: } + diff --git a/test/MC/ARM/eh-directive-save-diagnoatics.s b/test/MC/ARM/eh-directive-save-diagnostics.s index 0e6d7404a3af..0e6d7404a3af 100644 --- a/test/MC/ARM/eh-directive-save-diagnoatics.s +++ b/test/MC/ARM/eh-directive-save-diagnostics.s diff --git a/test/MC/ARM/eh-directive-setfp.s b/test/MC/ARM/eh-directive-setfp.s index dfa79e622d2e..ce7fe10b43c4 100644 --- a/test/MC/ARM/eh-directive-setfp.s +++ b/test/MC/ARM/eh-directive-setfp.s @@ -9,7 +9,7 @@ @ then libunwind will reconstruct the stack pointer from the frame pointer. @ The reconstruction code is implemented by two different unwind opcode: @ (i) the unwind opcode to copy stack offset from the other register, and -@ (ii) the unwind opcode to add or substract the stack offset. +@ (ii) the unwind opcode to add or subtract the stack offset. @ @ This file includes several cases separated by different range of -offset @ diff --git a/test/MC/ARM/eh-directive-unwind_raw-diagnostics.s b/test/MC/ARM/eh-directive-unwind_raw-diagnostics.s new file mode 100644 index 000000000000..72a208ed83d1 --- /dev/null +++ b/test/MC/ARM/eh-directive-unwind_raw-diagnostics.s @@ -0,0 +1,73 @@ +@ RUN: not llvm-mc -triple armv7-linux-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s + + .syntax unified + + .type require_fnstart,%function +require_fnstart: + .unwind_raw 0, 0 + +@ CHECK: error: .fnstart must precede .unwind_raw directive +@ CHECK: .unwind_raw 0, 0 +@ CHECK: ^ + + .type check_arguments,%function +check_arguments: + .fnstart + .unwind_raw + .fnend + +@ CHECK: error: expected expression +@ CHECK: .unwind_raw +@ CHECK: ^ + + .type check_stack_offset,%function +check_stack_offset: + .fnstart + .unwind_raw ., 0 + .fnend + +@ CHECK: error: offset must be a constant +@ CHECK: .unwind_raw ., 0 +@ CHECK: ^ + + .type comma_check,%function +comma_check: + .fnstart + .unwind_raw 0 + .fnend + +@ CHECK: error: expected comma +@ CHECK: .unwind_raw 0 +@ CHECK: ^ + + .type require_opcode,%function +require_opcode: + .fnstart + .unwind_raw 0, + .fnend + +@ CHECK: error: expected opcode expression +@ CHECK: .unwind_raw 0, +@ CHECK: ^ + + .type require_opcode_constant,%function +require_opcode_constant: + .fnstart + .unwind_raw 0, . + .fnend + +@ CHECK: error: opcode value must be a constant +@ CHECK: .unwind_raw 0, . +@ CHECK: ^ + + .type check_opcode_range,%function +check_opcode_range: + .fnstart + .unwind_raw 0, 0x100 + .fnend + +@ CHECK: error: invalid opcode +@ CHECK: .unwind_raw 0, 0x100 +@ CHECK: ^ + diff --git a/test/MC/ARM/eh-directive-unwind_raw.s b/test/MC/ARM/eh-directive-unwind_raw.s new file mode 100644 index 000000000000..c617aa37c497 --- /dev/null +++ b/test/MC/ARM/eh-directive-unwind_raw.s @@ -0,0 +1,110 @@ +@ RUN: llvm-mc -triple armv7-linux-eabi -filetype obj -o - %s | llvm-readobj -u \ +@ RUN: | FileCheck %s + + .syntax unified + + .type save,%function + .thumb_func +save: + .fnstart + .unwind_raw 4, 0xb1, 0x01 + push {r0} + pop {r0} + bx lr + .fnend + + .type empty,%function + .thumb_func +empty: + .fnstart + .unwind_raw 0, 0xb0 + bx lr + .fnend + + .type extended,%function + .thumb_func +extended: + .fnstart + .unwind_raw 12, 0x9b, 0x40, 0x84, 0x80, 0xb0, 0xb0 + @ .save {fp, lr} + stmfd sp!, {fp, lr} + @ .setfp fp, sp, #4 + add fp, sp, #4 + @ .pad #8 + sub sp, sp, #8 + add sp, sp, #8 + sub fp, sp, #4 + ldmfd sp!, {fp, lr} + bx lr + .fnend + + .type refuse,%function + .thumb_func +refuse: + .fnstart + .unwind_raw 0, 0x80, 0x00 + bx lr + .fnend + + .type stack_adjust,%function + .thumb_func +stack_adjust: + .fnstart + .setfp fp, sp, #32 + .unwind_raw 24, 0xc2 + .fnend + +@ CHECK: UnwindInformation { +@ CHECK: UnwindIndexTable { +@ CHECK: SectionName: .ARM.exidx +@ CHECK: Entries [ +@ CHECK: Entry { +@ CHECK: Model: Compact (Inline) +@ CHECK: PersonalityIndex: 0 +@ CHECK: Opcodes [ +@ CHECK: 0xB1 0x01 ; pop {r0} +@ CHECK: 0xB0 ; finish +@ CHECK: ] +@ CHECK: } +@ CHECK: Entry { +@ CHECK: Model: Compact (Inline) +@ CHECK: PersonalityIndex: 0 +@ CHECK: Opcodes [ +@ CHECK: 0xB0 ; finish +@ CHECK: 0xB0 ; finish +@ CHECK: 0xB0 ; finish +@ CHECK: ] +@ CHECK: } +@ CHECK: Entry { +@ CHECK: ExceptionHandlingTable: .ARM.extab +@ CHECK: Model: Compact +@ CHECK: PersonalityIndex: 1 +@ CHECK: Opcodes [ +@ CHECK: 0x9B ; vsp = r11 +@ CHECK: 0x40 ; vsp = vsp - 4 +@ CHECK: 0x84 0x80 ; pop {fp, lr} +@ CHECK: 0xB0 ; finish +@ CHECK: 0xB0 ; finish +@ CHECK: ] +@ CHECK: } +@ CHECK: Entry { +@ CHECK: Model: Compact (Inline) +@ CHECK: PersonalityIndex: 0 +@ CHECK: Opcodes [ +@ CHECK: 0x80 0x00 ; refuse to unwind +@ CHECK: 0xB0 ; finish +@ CHECK: ] +@ CHECK: } +@ CHECK: Entry { +@ CHECK: Model: Compact (Inline) +@ CHECK: PersonalityIndex: 0 +@ CHECK: Opcodes [ +@ CHECK: 0x9B ; vsp = r11 +@ CHECK: 0x4D ; vsp = vsp - 56 +@ CHECK: 0xC2 ; pop {wR10, wR11, wR12} +@ CHECK: ] +@ CHECK: } +@ CHECK: ] +@ CHECK: } +@ CHECK: } + diff --git a/test/MC/ARM/elf-jump24-fixup.s b/test/MC/ARM/elf-jump24-fixup.s index 75a4b869dc60..affdcda8d74e 100644 --- a/test/MC/ARM/elf-jump24-fixup.s +++ b/test/MC/ARM/elf-jump24-fixup.s @@ -6,4 +6,4 @@ foo: b.w bar -@ CHECK: {{[0-9]+}} R_ARM_THM_JUMP24 bar +@ CHECK: {{[0-9a-f]+}} R_ARM_THM_JUMP24 bar diff --git a/test/MC/ARM/elf-thumbfunc-reloc.ll b/test/MC/ARM/elf-thumbfunc-reloc.ll index 9fd360e1a013..f502739a2afd 100644 --- a/test/MC/ARM/elf-thumbfunc-reloc.ll +++ b/test/MC/ARM/elf-thumbfunc-reloc.ll @@ -3,7 +3,7 @@ ; RUN: FileCheck %s ; FIXME: This file needs to be in .s form! -; We wanna test relocatable thumb function call, +; We want to test relocatable thumb function call, ; but ARMAsmParser cannot handle "bl foo(PLT)" yet target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:32-n32" @@ -32,6 +32,10 @@ entry: ; CHECK-NEXT: Section (2) .rel.text { ; CHECK-NEXT: 0x8 R_ARM_THM_CALL foo 0x0 ; CHECK-NEXT: } +; CHECK-NEXT: Section (7) .rel.ARM.exidx { +; CHECK-NEXT: 0x0 R_ARM_PREL31 .text 0x0 +; CHECK-NEXT: 0x8 R_ARM_PREL31 .text 0x0 +; CHECK-NEXT: } ; CHECK-NEXT: ] ; make sure foo is thumb function: bit 0 = 1 diff --git a/test/MC/ARM/elf-thumbfunc-reloc.s b/test/MC/ARM/elf-thumbfunc-reloc.s index 614702012f0c..ea7d507a7e83 100644 --- a/test/MC/ARM/elf-thumbfunc-reloc.s +++ b/test/MC/ARM/elf-thumbfunc-reloc.s @@ -5,7 +5,6 @@ .syntax unified .text - .globl f .align 2 .type f,%function .code 16 @@ -16,9 +15,21 @@ f: bl g pop {r7, pc} + .section .data.rel.local,"aw",%progbits +ptr: + .long f + + @@ make sure an R_ARM_THM_CALL relocation is generated for the call to g @CHECK: Relocations [ @CHECK-NEXT: Section (2) .rel.text { @CHECK-NEXT: 0x4 R_ARM_THM_CALL g 0x0 @CHECK-NEXT: } + + +@@ make sure the relocation is with f. That is one way to make sure it includes +@@ the thumb bit. +@CHECK-NEXT: Section (6) .rel.data.rel.local { +@CHECK-NEXT: 0x0 R_ARM_ABS32 f 0x0 +@CHECK-NEXT: } @CHECK-NEXT: ] diff --git a/test/MC/ARM/elf-thumbfunc.s b/test/MC/ARM/elf-thumbfunc.s index 0ea11821b96b..af061b50bc3d 100644 --- a/test/MC/ARM/elf-thumbfunc.s +++ b/test/MC/ARM/elf-thumbfunc.s @@ -11,7 +11,17 @@ foo: bx lr -@@ make sure foo is thumb function: bit 0 = 1 (st_value) + .global bar +bar = foo + +@@ make sure foo and bar are thumb function: bit 0 = 1 (st_value) +@CHECK: Symbol { +@CHECK: Name: bar +@CHECK-NEXT: Value: 0x1 +@CHECK-NEXT: Size: 0 +@CHECK-NEXT: Binding: Global +@CHECK-NEXT: Type: Function + @CHECK: Symbol { @CHECK: Name: foo @CHECK-NEXT: Value: 0x1 diff --git a/test/MC/ARM/fconst.s b/test/MC/ARM/fconst.s new file mode 100644 index 000000000000..e2c1b3918ff9 --- /dev/null +++ b/test/MC/ARM/fconst.s @@ -0,0 +1,22 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s + +@ fconstd/fconsts aliases + fconsts s4, #0x0 + fconsts s4, #0x70 + fconstd d3, #0x0 + fconstd d3, #0x70 + + fconstsne s5, #0x1 + fconstsgt s5, #0x20 + fconstdlt d2, #0x3 + fconstdge d2, #0x40 + +@ CHECK: vmov.f32 s4, #2.000000e+00 @ encoding: [0x00,0x2a,0xb0,0xee] +@ CHECK: vmov.f32 s4, #1.000000e+00 @ encoding: [0x00,0x2a,0xb7,0xee] +@ CHECK: vmov.f64 d3, #2.000000e+00 @ encoding: [0x00,0x3b,0xb0,0xee] +@ CHECK: vmov.f64 d3, #1.000000e+00 @ encoding: [0x00,0x3b,0xb7,0xee] + +@ CHECK: vmovne.f32 s5, #2.125000e+00 @ encoding: [0x01,0x2a,0xf0,0x1e] +@ CHECK: vmovgt.f32 s5, #8.000000e+00 @ encoding: [0x00,0x2a,0xf2,0xce] +@ CHECK: vmovlt.f64 d2, #2.375000e+00 @ encoding: [0x03,0x2b,0xb0,0xbe] +@ CHECK: vmovge.f64 d2, #1.250000e-01 @ encoding: [0x00,0x2b,0xb4,0xae] diff --git a/test/MC/ARM/fixup-cpu-mode.s b/test/MC/ARM/fixup-cpu-mode.s new file mode 100644 index 000000000000..17f29f94d2d6 --- /dev/null +++ b/test/MC/ARM/fixup-cpu-mode.s @@ -0,0 +1,9 @@ +// RUN: llvm-mc -filetype=obj -triple thumbv7-linux-gnu %s -o %t +// RUN: llvm-objdump -triple thumbv7-linux-gnu -d %t | FileCheck %s + +//PR18303 +.code 16 +.global edata +b edata // CHECK: b.w +.code 32 + diff --git a/test/MC/ARM/fp-const-errors.s b/test/MC/ARM/fp-const-errors.s new file mode 100644 index 000000000000..2a68ddbe727e --- /dev/null +++ b/test/MC/ARM/fp-const-errors.s @@ -0,0 +1,22 @@ +@ RUN: not llvm-mc -mcpu=cortex-a8 -triple armv7-none-linux-gnueabi < %s 2>&1 | FileCheck %s + +@ Test for floating point constants that are out of the 8-bit encoded value range +vmov.f32 s2, #32.0 +@ CHECK: error: invalid operand for instruction + +vmov.f64 d2, #32.0 +@ CHECK: error: invalid operand for instruction + +@ Test that vmov.f instructions do not accept an 8-bit encoded float as an operand +vmov.f32 s1, #0x70 +@ CHECK: error: invalid floating point immediate + +vmov.f64 d2, #0x70 +@ CHECK: error: invalid floating point immediate + +@ Test that fconst instructions do not accept a float constant as an operand +fconsts s1, #1.0 +@ CHECK: error: invalid floating point immediate + +fconstd d2, #1.0 +@ CHECK: error: invalid floating point immediate diff --git a/test/MC/ARM/gas-compl-copr-reg.s b/test/MC/ARM/gas-compl-copr-reg.s new file mode 100644 index 000000000000..ab0b02395831 --- /dev/null +++ b/test/MC/ARM/gas-compl-copr-reg.s @@ -0,0 +1,14 @@ +@ RUN: llvm-mc -triple=armv7-linux-gnueabi -show-encoding < %s | FileCheck %s + +@ CHECK: ldc p12, c4, [r0, #4] @ encoding: [0x01,0x4c,0x90,0xed] +@ CHECK: stc p14, c6, [r2, #-224] @ encoding: [0x38,0x6e,0x02,0xed] + + ldc p12, cr4, [r0, #4] + stc p14, cr6, [r2, #-224] +@ RUN: llvm-mc -triple=armv7-linux-gnueabi -show-encoding < %s | FileCheck %s
+
+@ CHECK: ldc p12, c4, [r0, #4] @ encoding: [0x01,0x4c,0x90,0xed]
+@ CHECK: stc p14, c6, [r2, #-224] @ encoding: [0x38,0x6e,0x02,0xed]
+
+ ldc p12, cr4, [r0, #4]
+ stc p14, cr6, [r2, #-224]
diff --git a/test/MC/ARM/inst-arm-suffixes.s b/test/MC/ARM/inst-arm-suffixes.s new file mode 100644 index 000000000000..a80ef47a6074 --- /dev/null +++ b/test/MC/ARM/inst-arm-suffixes.s @@ -0,0 +1,15 @@ +@ RUN: not llvm-mc %s -triple armv7-linux-gnueabi -filetype asm -o - 2>&1 \ +@ RUN: | FileCheck -check-prefix CHECK-ERROR %s + + .syntax unified + .arm + + .align 2 + .global suffixes_invalid_in_arm + .type suffixes_invalid_in_arm,%function +suffixes_invalid_in_arm: + .inst.n 2 +@ CHECK-ERROR: width suffixes are invalid in ARM mode + .inst.w 4 +@ CHECK-ERROR: width suffixes are invalid in ARM mode + diff --git a/test/MC/ARM/inst-constant-required.s b/test/MC/ARM/inst-constant-required.s new file mode 100644 index 000000000000..d4863dd2cd77 --- /dev/null +++ b/test/MC/ARM/inst-constant-required.s @@ -0,0 +1,15 @@ +@ RUN: not llvm-mc %s -triple=armv7-linux-gnueabi -filetype asm -o - 2>&1 \ +@ RUN: | FileCheck -check-prefix CHECK-ERROR %s + + .syntax unified + .arm + + .align 2 + .global constant_expression_required + .type constant_expression_required,%function +constant_expression_required: +.Label: + movs r0, r0 + .inst .Label +@ CHECK-ERROR: expected constant expression + diff --git a/test/MC/ARM/inst-directive-emit.s b/test/MC/ARM/inst-directive-emit.s new file mode 100644 index 000000000000..13b7edfa1f3a --- /dev/null +++ b/test/MC/ARM/inst-directive-emit.s @@ -0,0 +1,20 @@ +@ RUN: llvm-mc %s -triple armv7-linux-gnueabi -filetype asm -o - | FileCheck %s + + .syntax unified + .thumb + + .align 2 + .global emit_asm + .type emit_asm,%function +emit_asm: + .inst.w 0xf2400000, 0xf2c00000 + +@ CHECK: .text +@ CHECK: .code 16 +@ CHECK: .align 2 +@ CHECK: .globl emit_asm +@ CHECK: .type emit_asm,%function +@ CHECK: emit_asm: +@ CHECK: inst.w 0xF2400000 +@ CHECK: inst.w 0xF2C00000 + diff --git a/test/MC/ARM/inst-directive.s b/test/MC/ARM/inst-directive.s new file mode 100644 index 000000000000..a3fd8c23f44d --- /dev/null +++ b/test/MC/ARM/inst-directive.s @@ -0,0 +1,81 @@ +@ RUN: llvm-mc %s -triple=armv7-linux-gnueabi -filetype=obj -o - \ +@ RUN: | llvm-readobj -s -sd | FileCheck %s + + .syntax unified + +@------------------------------------------------------------------------------- +@ arm_inst +@------------------------------------------------------------------------------- + .arm + + .section .inst.arm_inst + + .align 2 + .global arm_inst + .type arm_inst,%function +arm_inst: + .inst 0xdefe + +@ CHECK: Section { +@ CHECK: Name: .inst.arm_inst +@ CHECK: SectionData ( +@ CHECK-NEXT: 0000: FEDE0000 +@ CHECK-NEXT: ) + +@------------------------------------------------------------------------------- +@ thumb_inst_n +@------------------------------------------------------------------------------- + .thumb + + .section .inst.thumb_inst_n + + .align 2 + .global thumb_inst_n + .type thumb_inst_n,%function +thumb_inst_n: + .inst.n 0xdefe + +@ CHECK: Section { +@ CHECK: Name: .inst.thumb_inst_n +@ CHECK: SectionData ( +@ CHECK-NEXT: 0000: FEDE +@ CHECK-NEXT: ) + +@------------------------------------------------------------------------------- +@ thumb_inst_w +@------------------------------------------------------------------------------- + .thumb + + .section .inst.thumb_inst_w + + .align 2 + .global thumb_inst_w + .type thumb_inst_w,%function +thumb_inst_w: + .inst.w 0x00000000 + +@ CHECK: Section { +@ CHECK: Name: .inst.thumb_inst_w +@ CHECK: SectionData ( +@ CHECK-NEXT: 0000: 00000000 +@ CHECK-NEXT: ) + +@------------------------------------------------------------------------------- +@ thumb_inst_w +@------------------------------------------------------------------------------- + .thumb + + .section .inst.thumb_inst_inst + + .align 2 + .global thumb_inst_inst + .type thumb_inst_inst,%function +thumb_inst_inst: + .inst.w 0xf2400000, 0xf2c00000 + +@ CHECK: Section { +@ CHECK: Name: .inst.thumb_inst_inst +@ CHECK: SectionData ( +@ CHECK-NEXT: 0000: 40F20000 C0F20000 +@ CHECK-NEXT: ) + diff --git a/test/MC/ARM/inst-overflow.s b/test/MC/ARM/inst-overflow.s new file mode 100644 index 000000000000..133d53f74307 --- /dev/null +++ b/test/MC/ARM/inst-overflow.s @@ -0,0 +1,14 @@ +@ RUN: not llvm-mc %s -triple armv7-linux-gnueabi -filetype asm -o - 2>&1 \ +@ RUN: | FileCheck -check-prefix CHECK-ERROR %s + + .syntax unified + .arm + + .align 2 + .global constant_overflow + .type constant_overflow,%function +constant_overflow: + .inst 1 << 32 +@ CHECK-ERROR: inst operand is too big + + diff --git a/test/MC/ARM/inst-thumb-overflow-2.s b/test/MC/ARM/inst-thumb-overflow-2.s new file mode 100644 index 000000000000..1b3d642cf666 --- /dev/null +++ b/test/MC/ARM/inst-thumb-overflow-2.s @@ -0,0 +1,13 @@ +@ RUN: not llvm-mc %s -triple armv7-linux-gnueabi -filetype asm -o - 2>&1 \ +@ RUN: | FileCheck -check-prefix CHECK-ERRORS %s + + .syntax unified + .thumb + + .align 2 + .global constant_overflow + .type constant_overflow,%function +constant_overflow: + .inst.w 1 << 32 +@ CHECK-ERRORS: inst.w operand is too big + diff --git a/test/MC/ARM/inst-thumb-overflow.s b/test/MC/ARM/inst-thumb-overflow.s new file mode 100644 index 000000000000..34626f97ff03 --- /dev/null +++ b/test/MC/ARM/inst-thumb-overflow.s @@ -0,0 +1,13 @@ +@ RUN: not llvm-mc %s -triple armv7-linux-gnueabi -filetype asm -o - 2>&1 \ +@ RUN: | FileCheck -check-prefix CHECK-ERROR %s + + .syntax unified + .thumb + + .align 2 + .global constant_overflow + .type constant_overflow,%function +constant_overflow: + .inst.n 1 << 31 +@ CHECK-ERROR: inst.n operand is too big, use inst.w instead + diff --git a/test/MC/ARM/inst-thumb-suffixes.s b/test/MC/ARM/inst-thumb-suffixes.s new file mode 100644 index 000000000000..40def3c3b89e --- /dev/null +++ b/test/MC/ARM/inst-thumb-suffixes.s @@ -0,0 +1,13 @@ +@ RUN: not llvm-mc %s -triple armv7-linux-gnueabi -filetype asm -o - 2>&1 \ +@ RUN: | FileCheck -check-prefix CHECK-ERROR %s + + .syntax unified + .thumb + + .align 2 + .global suffixes_required_in_thumb + .type suffixes_required_in_thumb,%function +suffixes_required_in_thumb: + .inst 0x0000 +@ CHECK-ERROR: cannot determine Thumb instruction size, use inst.n/inst.w instead + diff --git a/test/MC/ARM/invalid-vector-index.s b/test/MC/ARM/invalid-vector-index.s new file mode 100644 index 000000000000..b58e1bdcc30d --- /dev/null +++ b/test/MC/ARM/invalid-vector-index.s @@ -0,0 +1,5 @@ +@ RUN: not llvm-mc -triple=armv7-apple-darwin < %s 2>&1 | FileCheck %s + +ldrd r6, r7 [r2, #15] + +@ CHECK: error: immediate value expected for vector index diff --git a/test/MC/ARM/ldr-pseudo-darwin.s b/test/MC/ARM/ldr-pseudo-darwin.s new file mode 100644 index 000000000000..f04f533cfae7 --- /dev/null +++ b/test/MC/ARM/ldr-pseudo-darwin.s @@ -0,0 +1,247 @@ +@ This test has a partner (ldr-pseudo.s) that contains matching +@ tests for the ldr-pseudo on linux targets. We need separate files +@ because the syntax for switching sections and temporary labels differs +@ between darwin and linux. Any tests added here should have a matching +@ test added there. + +@RUN: llvm-mc -triple armv7-apple-darwin %s | FileCheck %s +@RUN: llvm-mc -triple thumbv5-apple-darwin %s | FileCheck %s +@RUN: llvm-mc -triple thumbv7-apple-darwin %s | FileCheck %s + +@ +@ Check that large constants are converted to ldr from constant pool +@ +@ simple test +.section __TEXT,b,regular,pure_instructions +@ CHECK-LABEL: f3: +f3: + ldr r0, =0x10001 +@ CHECK: ldr r0, Ltmp0 + +@ loading multiple constants +.section __TEXT,c,regular,pure_instructions +@ CHECK-LABEL: f4: +f4: + ldr r0, =0x10002 +@ CHECK: ldr r0, Ltmp1 + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + ldr r0, =0x10003 +@ CHECK: ldr r0, Ltmp2 + adds r0, r0, #1 + adds r0, r0, #1 + +@ TODO: the same constants should have the same constant pool location +.section __TEXT,d,regular,pure_instructions +@ CHECK-LABEL: f5: +f5: + ldr r0, =0x10004 +@ CHECK: ldr r0, Ltmp3 + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + ldr r0, =0x10004 +@ CHECK: ldr r0, Ltmp4 + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + +@ a section defined in multiple pieces should be merged and use a single constant pool +.section __TEXT,e,regular,pure_instructions +@ CHECK-LABEL: f6: +f6: + ldr r0, =0x10006 +@ CHECK: ldr r0, Ltmp5 + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + +.section __TEXT,f,regular,pure_instructions +@ CHECK-LABEL: f7: +f7: + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + +.section __TEXT,e,regular,pure_instructions +@ CHECK-LABEL: f8: +f8: + adds r0, r0, #1 + ldr r0, =0x10007 +@ CHECK: ldr r0, Ltmp6 + adds r0, r0, #1 + adds r0, r0, #1 + +@ +@ Check that symbols can be loaded using ldr pseudo +@ + +@ load an undefined symbol +.section __TEXT,g,regular,pure_instructions +@ CHECK-LABEL: f9: +f9: + ldr r0, =foo +@ CHECK: ldr r0, Ltmp7 + +@ load a symbol from another section +.section __TEXT,h,regular,pure_instructions +@ CHECK-LABEL: f10: +f10: + ldr r0, =f5 +@ CHECK: ldr r0, Ltmp8 + +@ load a symbol from the same section +.section __TEXT,i,regular,pure_instructions +@ CHECK-LABEL: f11: +f11: + ldr r0, =f12 +@ CHECK: ldr r0, Ltmp9 + +@ CHECK-LABEL: f12: +f12: + adds r0, r0, #1 + adds r0, r0, #1 + +.section __TEXT,j,regular,pure_instructions +@ mix of symbols and constants +@ CHECK-LABEL: f13: +f13: + adds r0, r0, #1 + adds r0, r0, #1 + ldr r0, =0x101 +@ CHECK: ldr r0, Ltmp10 + adds r0, r0, #1 + adds r0, r0, #1 + ldr r0, =bar +@ CHECK: ldr r0, Ltmp11 + adds r0, r0, #1 + adds r0, r0, #1 +@ +@ Check for correct usage in other contexts +@ + +@ usage in macro +.macro useit_in_a_macro + ldr r0, =0x10008 + ldr r0, =baz +.endm +.section __TEXT,k,regular,pure_instructions +@ CHECK-LABEL: f14: +f14: + useit_in_a_macro +@ CHECK: ldr r0, Ltmp12 +@ CHECK: ldr r0, Ltmp13 + +@ usage with expressions +.section __TEXT,l,regular,pure_instructions +@ CHECK-LABEL: f15: +f15: + ldr r0, =0x10001+8 +@ CHECK: ldr r0, Ltmp14 + adds r0, r0, #1 + ldr r0, =bar+4 +@ CHECK: ldr r0, Ltmp15 + adds r0, r0, #1 + +@ +@ Constant Pools +@ +@ CHECK: .section __TEXT,b,regular,pure_instructions +@ CHECK: .data_region +@ CHECK: .align 2 +@ CHECK-LABEL: Ltmp0: +@ CHECK: .long 65537 +@ CHECK: .end_data_region + +@ CHECK: .section __TEXT,c,regular,pure_instructions +@ CHECK: .data_region +@ CHECK: .align 2 +@ CHECK-LABEL: Ltmp1: +@ CHECK: .long 65538 +@ CHECK: .align 2 +@ CHECK-LABEL: Ltmp2: +@ CHECK: .long 65539 +@ CHECK: .end_data_region + +@ CHECK: .section __TEXT,d,regular,pure_instructions +@ CHECK: .data_region +@ CHECK: .align 2 +@ CHECK-LABEL: Ltmp3: +@ CHECK: .long 65540 +@ CHECK: .align 2 +@ CHECK-LABEL: Ltmp4: +@ CHECK: .long 65540 +@ CHECK: .end_data_region + +@ CHECK: .section __TEXT,e,regular,pure_instructions +@ CHECK: .data_region +@ CHECK: .align 2 +@ CHECK-LABEL: Ltmp5: +@ CHECK: .long 65542 +@ CHECK: .align 2 +@ CHECK-LABEL: Ltmp6: +@ CHECK: .long 65543 +@ CHECK: .end_data_region + +@ Should not switch to section because it has no constant pool +@ CHECK-NOT: .section __TEXT,f,regular,pure_instructions + +@ CHECK: .section __TEXT,g,regular,pure_instructions +@ CHECK: .data_region +@ CHECK: .align 2 +@ CHECK-LABEL: Ltmp7: +@ CHECK: .long foo +@ CHECK: .end_data_region + +@ CHECK: .section __TEXT,h,regular,pure_instructions +@ CHECK: .data_region +@ CHECK: .align 2 +@ CHECK-LABEL: Ltmp8: +@ CHECK: .long f5 +@ CHECK: .end_data_region + +@ CHECK: .section __TEXT,i,regular,pure_instructions +@ CHECK: .data_region +@ CHECK: .align 2 +@ CHECK-LABEL: Ltmp9: +@ CHECK: .long f12 +@ CHECK: .end_data_region + +@ CHECK: .section __TEXT,j,regular,pure_instructions +@ CHECK: .data_region +@ CHECK: .align 2 +@ CHECK-LABEL: Ltmp10: +@ CHECK: .long 257 +@ CHECK: .align 2 +@ CHECK-LABEL: Ltmp11: +@ CHECK: .long bar +@ CHECK: .end_data_region + +@ CHECK: .section __TEXT,k,regular,pure_instructions +@ CHECK: .data_region +@ CHECK: .align 2 +@ CHECK-LABEL: Ltmp12: +@ CHECK: .long 65544 +@ CHECK: .align 2 +@ CHECK-LABEL: Ltmp13: +@ CHECK: .long baz +@ CHECK: .end_data_region + +@ CHECK: .section __TEXT,l,regular,pure_instructions +@ CHECK: .data_region +@ CHECK: .align 2 +@ CHECK-LABEL: Ltmp14: +@ CHECK: .long 65545 +@ CHECK: .align 2 +@ CHECK-LABEL: Ltmp15: +@ CHECK: .long bar+4 +@ CHECK: .end_data_region diff --git a/test/MC/ARM/ldr-pseudo-obj-errors.s b/test/MC/ARM/ldr-pseudo-obj-errors.s new file mode 100644 index 000000000000..dce88f058f83 --- /dev/null +++ b/test/MC/ARM/ldr-pseudo-obj-errors.s @@ -0,0 +1,17 @@ +@RUN: not llvm-mc -triple=armv7-unknown-linux-gnueabi -filetype=obj %s -o %t1 2> %t2 +@RUN: cat %t2 | FileCheck %s +@RUN: not llvm-mc -triple=armv7-darwin-apple -filetype=obj %s -o %t1_darwin 2> %t2_darwin +@RUN: cat %t2_darwin | FileCheck %s + +@These tests look for errors that should be reported for invalid object layout +@with the ldr pseudo. They are tested separately from parse errors because they +@only trigger when the file has successfully parsed and the object file is about +@to be written out. + +.text +foo: + ldr r0, =0x101 + .space 8000 +@ CHECK: error: out of range pc-relative fixup value +@ CHECK: ldr r0, =0x101 +@ CHECK: ^ diff --git a/test/MC/ARM/ldr-pseudo-parse-errors.s b/test/MC/ARM/ldr-pseudo-parse-errors.s new file mode 100644 index 000000000000..2e6114d6fe08 --- /dev/null +++ b/test/MC/ARM/ldr-pseudo-parse-errors.s @@ -0,0 +1,10 @@ +@RUN: not llvm-mc -triple=armv7-unknown-linux-gnueabi < %s 2>&1 | FileCheck %s +@RUN: not llvm-mc -triple=armv7-apple-darwin < %s 2>&1 | FileCheck %s + +.text +bar: + mov r0, =0x101 +@ CHECK: error: unexpected token in operand +@ CHECK: mov r0, =0x101 +@ CHECK: ^ + diff --git a/test/MC/ARM/ldr-pseudo.s b/test/MC/ARM/ldr-pseudo.s new file mode 100644 index 000000000000..df0d88a9a56e --- /dev/null +++ b/test/MC/ARM/ldr-pseudo.s @@ -0,0 +1,221 @@ +@ This test has a partner (ldr-pseudo-darwin.s) that contains matching +@ tests for the ldr-pseudo on darwin targets. We need separate files +@ because the syntax for switching sections and temporary labels differs +@ between darwin and linux. Any tests added here should have a matching +@ test added there. + +@RUN: llvm-mc -triple armv7-unknown-linux-gnueabi %s | FileCheck %s +@RUN: llvm-mc -triple thumbv5-unknown-linux-gnueabi %s | FileCheck %s +@RUN: llvm-mc -triple thumbv7-unknown-linux-gnueabi %s | FileCheck %s + +@ +@ Check that large constants are converted to ldr from constant pool +@ +@ simple test +.section b,"ax",%progbits +@ CHECK-LABEL: f3: +f3: + ldr r0, =0x10001 +@ CHECK: ldr r0, .Ltmp[[TMP0:[0-9]+]] + +@ loading multiple constants +.section c,"ax",%progbits +@ CHECK-LABEL: f4: +f4: + ldr r0, =0x10002 +@ CHECK: ldr r0, .Ltmp[[TMP1:[0-9]+]] + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + ldr r0, =0x10003 +@ CHECK: ldr r0, .Ltmp[[TMP2:[0-9]+]] + adds r0, r0, #1 + adds r0, r0, #1 + +@ TODO: the same constants should have the same constant pool location +.section d,"ax",%progbits +@ CHECK-LABEL: f5: +f5: + ldr r0, =0x10004 +@ CHECK: ldr r0, .Ltmp[[TMP3:[0-9]+]] + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + ldr r0, =0x10004 +@ CHECK: ldr r0, .Ltmp[[TMP4:[0-9]+]] + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + +@ a section defined in multiple pieces should be merged and use a single constant pool +.section e,"ax",%progbits +@ CHECK-LABEL: f6: +f6: + ldr r0, =0x10006 +@ CHECK: ldr r0, .Ltmp[[TMP5:[0-9]+]] + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + +.section f, "ax", %progbits +@ CHECK-LABEL: f7: +f7: + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + +.section e, "ax", %progbits +@ CHECK-LABEL: f8: +f8: + adds r0, r0, #1 + ldr r0, =0x10007 +@ CHECK: ldr r0, .Ltmp[[TMP6:[0-9]+]] + adds r0, r0, #1 + adds r0, r0, #1 + +@ +@ Check that symbols can be loaded using ldr pseudo +@ + +@ load an undefined symbol +.section g,"ax",%progbits +@ CHECK-LABEL: f9: +f9: + ldr r0, =foo +@ CHECK: ldr r0, .Ltmp[[TMP7:[0-9]+]] + +@ load a symbol from another section +.section h,"ax",%progbits +@ CHECK-LABEL: f10: +f10: + ldr r0, =f5 +@ CHECK: ldr r0, .Ltmp[[TMP8:[0-9]+]] + +@ load a symbol from the same section +.section i,"ax",%progbits +@ CHECK-LABEL: f11: +f11: + ldr r0, =f12 +@ CHECK: ldr r0, .Ltmp[[TMP9:[0-9]+]] + +@ CHECK-LABEL: f12: +f12: + adds r0, r0, #1 + adds r0, r0, #1 + +.section j,"ax",%progbits +@ mix of symbols and constants +@ CHECK-LABEL: f13: +f13: + adds r0, r0, #1 + adds r0, r0, #1 + ldr r0, =0x101 +@ CHECK: ldr r0, .Ltmp[[TMP10:[0-9]+]] + adds r0, r0, #1 + adds r0, r0, #1 + ldr r0, =bar +@ CHECK: ldr r0, .Ltmp[[TMP11:[0-9]+]] + adds r0, r0, #1 + adds r0, r0, #1 +@ +@ Check for correct usage in other contexts +@ + +@ usage in macro +.macro useit_in_a_macro + ldr r0, =0x10008 + ldr r0, =baz +.endm +.section k,"ax",%progbits +@ CHECK-LABEL: f14: +f14: + useit_in_a_macro +@ CHECK: ldr r0, .Ltmp[[TMP12:[0-9]+]] +@ CHECK: ldr r0, .Ltmp[[TMP13:[0-9]+]] + +@ usage with expressions +.section l, "ax", %progbits +@ CHECK-LABEL: f15: +f15: + ldr r0, =0x10001+8 +@ CHECK: ldr r0, .Ltmp[[TMP14:[0-9]+]] + adds r0, r0, #1 + ldr r0, =bar+4 +@ CHECK: ldr r0, .Ltmp[[TMP15:[0-9]+]] + adds r0, r0, #1 + +@ +@ Constant Pools +@ +@ CHECK: .section b,"ax",%progbits +@ CHECK: .align 2 +@ CHECK: .Ltmp[[TMP0]] +@ CHECK: .long 65537 + +@ CHECK: .section c,"ax",%progbits +@ CHECK: .align 2 +@ CHECK: .Ltmp[[TMP1]] +@ CHECK: .long 65538 +@ CHECK: .Ltmp[[TMP2]] +@ CHECK: .long 65539 + +@ CHECK: .section d,"ax",%progbits +@ CHECK: .align 2 +@ CHECK: .Ltmp[[TMP3]] +@ CHECK: .long 65540 +@ CHECK: .Ltmp[[TMP4]] +@ CHECK: .long 65540 + +@ CHECK: .section e,"ax",%progbits +@ CHECK: .align 2 +@ CHECK: .Ltmp[[TMP5]] +@ CHECK: .long 65542 +@ CHECK: .Ltmp[[TMP6]] +@ CHECK: .long 65543 + +@ Should not switch to section because it has no constant pool +@ CHECK-NOT: .section f,"ax",%progbits + +@ CHECK: .section g,"ax",%progbits +@ CHECK: .align 2 +@ CHECK: .Ltmp[[TMP7]] +@ CHECK: .long foo + +@ CHECK: .section h,"ax",%progbits +@ CHECK: .align 2 +@ CHECK: .Ltmp[[TMP8]] +@ CHECK: .long f5 + +@ CHECK: .section i,"ax",%progbits +@ CHECK: .align 2 +@ CHECK: .Ltmp[[TMP9]] +@ CHECK: .long f12 + +@ CHECK: .section j,"ax",%progbits +@ CHECK: .align 2 +@ CHECK: .Ltmp[[TMP10]] +@ CHECK: .long 257 +@ CHECK: .Ltmp[[TMP11]] +@ CHECK: .long bar + +@ CHECK: .section k,"ax",%progbits +@ CHECK: .align 2 +@ CHECK: .Ltmp[[TMP12]] +@ CHECK: .long 65544 +@ CHECK: .Ltmp[[TMP13]] +@ CHECK: .long baz + +@ CHECK: .section l,"ax",%progbits +@ CHECK: .align 2 +@ CHECK: .Ltmp[[TMP14]] +@ CHECK: .long 65545 +@ CHECK: .Ltmp[[TMP15]] +@ CHECK: .long bar+4 diff --git a/test/MC/ARM/ldrd-strd-gnu-arm-bad-imm.s b/test/MC/ARM/ldrd-strd-gnu-arm-bad-imm.s new file mode 100644 index 000000000000..fbe459c4168e --- /dev/null +++ b/test/MC/ARM/ldrd-strd-gnu-arm-bad-imm.s @@ -0,0 +1,9 @@ +@ RUN: not llvm-mc -triple=armv7-linux-gnueabi %s 2>&1 | FileCheck %s +.text +@ CHECK: error: instruction requires: thumb2 +@ CHECK: ldrd r0, [r0, #512] + ldrd r0, [r0, #512] + +@ CHECK: error: instruction requires: thumb2 +@ CHECK: strd r0, [r0, #512] + strd r0, [r0, #512] diff --git a/test/MC/ARM/ldrd-strd-gnu-arm.s b/test/MC/ARM/ldrd-strd-gnu-arm.s new file mode 100644 index 000000000000..57d21c7a1464 --- /dev/null +++ b/test/MC/ARM/ldrd-strd-gnu-arm.s @@ -0,0 +1,20 @@ +@ PR18921 +@ RUN: llvm-mc -triple=armv7-linux-gnueabi -show-encoding < %s | FileCheck %s +.text + +@ CHECK-NOT: .code 16 + + +@ CHECK: ldrd r0, r1, [r10, #32]! @ encoding: [0xd0,0x02,0xea,0xe1] +@ CHECK: ldrd r0, r1, [r10], #32 @ encoding: [0xd0,0x02,0xca,0xe0] +@ CHECK: ldrd r0, r1, [r10, #32] @ encoding: [0xd0,0x02,0xca,0xe1] + ldrd r0, [r10, #32]! + ldrd r0, [r10], #32 + ldrd r0, [r10, #32] + +@ CHECK: strd r0, r1, [r10, #32]! @ encoding: [0xf0,0x02,0xea,0xe1] +@ CHECK: strd r0, r1, [r10], #32 @ encoding: [0xf0,0x02,0xca,0xe0] +@ CHECK: strd r0, r1, [r10, #32] @ encoding: [0xf0,0x02,0xca,0xe1] + strd r0, [r10, #32]! + strd r0, [r10], #32 + strd r0, [r10, #32] diff --git a/test/MC/ARM/ldrd-strd-gnu-sp.s b/test/MC/ARM/ldrd-strd-gnu-sp.s new file mode 100644 index 000000000000..21efae985255 --- /dev/null +++ b/test/MC/ARM/ldrd-strd-gnu-sp.s @@ -0,0 +1,9 @@ +// PR19320 +// RUN: llvm-mc -triple=armv7-linux-gnueabi -show-encoding < %s | FileCheck %s +.text + +// CHECK: ldrd r12, sp, [r0, #32] @ encoding: [0xd0,0xc2,0xc0,0xe1] + ldrd r12, [r0, #32] + +// CHECK: strd r12, sp, [r0, #32] @ encoding: [0xf0,0xc2,0xc0,0xe1] + strd r12, [r0, #32] diff --git a/test/MC/ARM/ldrd-strd-gnu-thumb-bad-regs.s b/test/MC/ARM/ldrd-strd-gnu-thumb-bad-regs.s new file mode 100644 index 000000000000..9d81a27f0ca5 --- /dev/null +++ b/test/MC/ARM/ldrd-strd-gnu-thumb-bad-regs.s @@ -0,0 +1,10 @@ +@ RUN: not llvm-mc -triple=armv7-linux-gnueabi %s 2>&1 | FileCheck %s +.text +.thumb +@ CHECK: error: invalid operand for instruction +@ CHECK: ldrd r12, [r0, #512] + ldrd r12, [r0, #512] + +@ CHECK: error: invalid operand for instruction +@ CHECK: strd r12, [r0, #512] + strd r12, [r0, #512] diff --git a/test/MC/ARM/ldrd-strd-gnu-thumb.s b/test/MC/ARM/ldrd-strd-gnu-thumb.s new file mode 100644 index 000000000000..67d2aa7f548d --- /dev/null +++ b/test/MC/ARM/ldrd-strd-gnu-thumb.s @@ -0,0 +1,20 @@ +@ PR18921 +@ RUN: llvm-mc -triple=armv7-linux-gnueabi -show-encoding < %s | FileCheck %s +.text +.thumb + +@ CHECK: .code 16 + +@ CHECK: ldrd r0, r1, [r10, #512]! @ encoding: [0xfa,0xe9,0x80,0x01] +@ CHECK: ldrd r0, r1, [r10], #512 @ encoding: [0xfa,0xe8,0x80,0x01] +@ CHECK: ldrd r0, r1, [r10, #512] @ encoding: [0xda,0xe9,0x80,0x01] + ldrd r0, [r10, #512]! + ldrd r0, [r10], #512 + ldrd r0, [r10, #512] + +@ CHECK: strd r0, r1, [r10, #512]! @ encoding: [0xea,0xe9,0x80,0x01] +@ CHECK: strd r0, r1, [r10], #512 @ encoding: [0xea,0xe8,0x80,0x01] +@ CHECK: strd r0, r1, [r10, #512] @ encoding: [0xca,0xe9,0x80,0x01] + strd r0, [r10, #512]! + strd r0, [r10], #512 + strd r0, [r10, #512] diff --git a/test/MC/ARM/lit.local.cfg b/test/MC/ARM/lit.local.cfg index 8a3ba96497e7..98c6700c209d 100644 --- a/test/MC/ARM/lit.local.cfg +++ b/test/MC/ARM/lit.local.cfg @@ -1,4 +1,3 @@ -targets = set(config.root.targets_to_build.split()) -if not 'ARM' in targets: +if not 'ARM' in config.root.targets: config.unsupported = True diff --git a/test/MC/ARM/ltorg-darwin.s b/test/MC/ARM/ltorg-darwin.s new file mode 100644 index 000000000000..3402f4053cb4 --- /dev/null +++ b/test/MC/ARM/ltorg-darwin.s @@ -0,0 +1,151 @@ +@ This test has a partner (ltorg.s) that contains matching +@ tests for the .ltorg on linux targets. We need separate files +@ because the syntax for switching sections and temporary labels differs +@ between darwin and linux. Any tests added here should have a matching +@ test added there. + +@RUN: llvm-mc -triple armv7-apple-darwin %s | FileCheck %s +@RUN: llvm-mc -triple thumbv5-apple-darwin %s | FileCheck %s +@RUN: llvm-mc -triple thumbv7-apple-darwin %s | FileCheck %s + +@ check that ltorg dumps the constant pool at the current location +.section __TEXT,a,regular,pure_instructions +@ CHECK-LABEL: f2: +f2: + ldr r0, =0x10001 +@ CHECK: ldr r0, Ltmp0 + adds r0, r0, #1 + adds r0, r0, #1 + b f3 +.ltorg +@ constant pool +@ CHECK: .data_region +@ CHECK: .align 2 +@ CHECK-LABEL: Ltmp0: +@ CHECK: .long 65537 +@ CHECK: .end_data_region + +@ CHECK-LABEL: f3: +f3: + adds r0, r0, #1 + adds r0, r0, #1 + +@ check that ltorg clears the constant pool after dumping it +.section __TEXT,b,regular,pure_instructions +@ CHECK-LABEL: f4: +f4: + ldr r0, =0x10002 +@ CHECK: ldr r0, Ltmp1 + adds r0, r0, #1 + adds r0, r0, #1 + b f5 +.ltorg +@ constant pool +@ CHECK: .data_region +@ CHECK: .align 2 +@ CHECK-LABEL: Ltmp1: +@ CHECK: .long 65538 +@ CHECK: .end_data_region + +@ CHECK-LABEL: f5: +f5: + adds r0, r0, #1 + adds r0, r0, #1 + ldr r0, =0x10003 +@ CHECK: ldr r0, Ltmp2 + adds r0, r0, #1 + b f6 +.ltorg +@ constant pool +@ CHECK: .data_region +@ CHECK: .align 2 +@ CHECK-LABEL: Ltmp2: +@ CHECK: .long 65539 +@ CHECK: .end_data_region + +@ CHECK-LABEL: f6: +f6: + adds r0, r0, #1 + adds r0, r0, #1 + +@ check that ltorg does not issue an error if there is no constant pool +.section __TEXT,c,regular,pure_instructions +@ CHECK-LABEL: f7: +f7: + adds r0, r0, #1 + b f8 + .ltorg +f8: + adds r0, r0, #1 + +@ check that ltorg works for labels +.section __TEXT,d,regular,pure_instructions +@ CHECK-LABEL: f9: +f9: + adds r0, r0, #1 + adds r0, r0, #1 + ldr r0, =bar +@ CHECK: ldr r0, Ltmp3 + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + b f10 +.ltorg +@ constant pool +@ CHECK: .data_region +@ CHECK: .align 2 +@ CHECK-LABEL: Ltmp3: +@ CHECK: .long bar +@ CHECK: .end_data_region + +@ CHECK-LABEL: f10: +f10: + adds r0, r0, #1 + adds r0, r0, #1 + +@ check that use of ltorg does not prevent dumping non-empty constant pools at end of section +.section __TEXT,e,regular,pure_instructions +@ CHECK-LABEL: f11: +f11: + adds r0, r0, #1 + adds r0, r0, #1 + ldr r0, =0x10004 +@ CHECK: ldr r0, Ltmp4 + b f12 + .ltorg +@ constant pool +@ CHECK: .data_region +@ CHECK: .align 2 +@ CHECK-LABEL: Ltmp4: +@ CHECK: .long 65540 +@ CHECK: .end_data_region + +@ CHECK-LABEL: f12: +f12: + adds r0, r0, #1 + ldr r0, =0x10005 +@ CHECK: ldr r0, Ltmp5 + +.section __TEXT,f,regular,pure_instructions +@ CHECK-LABEL: f13 +f13: + adds r0, r0, #1 + adds r0, r0, #1 + +@ should not have a constant pool at end of section with empty constant pools +@ CHECK-NOT: .section __TEXT,a,regular,pure_instructions +@ CHECK-NOT: .section __TEXT,b,regular,pure_instructions +@ CHECK-NOT: .section __TEXT,c,regular,pure_instructions +@ CHECK-NOT: .section __TEXT,d,regular,pure_instructions + +@ should have a non-empty constant pool at end of this section +@ CHECK: .section __TEXT,e,regular,pure_instructions +@ constant pool +@ CHECK: .data_region +@ CHECK: .align 2 +@ CHECK-LABEL: Ltmp5: +@ CHECK: .long 65541 +@ CHECK: .end_data_region + +@ should not have a constant pool at end of section with empty constant pools +@ CHECK-NOT: .section __TEXT,f,regular,pure_instructions diff --git a/test/MC/ARM/ltorg.s b/test/MC/ARM/ltorg.s new file mode 100644 index 000000000000..e28862cb2a47 --- /dev/null +++ b/test/MC/ARM/ltorg.s @@ -0,0 +1,138 @@ +@ This test has a partner (ltorg-darwin.s) that contains matching +@ tests for the .ltorg on darwin targets. We need separate files +@ because the syntax for switching sections and temporary labels differs +@ between darwin and linux. Any tests added here should have a matching +@ test added there. + +@RUN: llvm-mc -triple armv7-unknown-linux-gnueabi %s | FileCheck %s +@RUN: llvm-mc -triple thumbv5-unknown-linux-gnueabi %s | FileCheck %s +@RUN: llvm-mc -triple thumbv7-unknown-linux-gnueabi %s | FileCheck %s + +@ check that ltorg dumps the constant pool at the current location +.section a,"ax",%progbits +@ CHECK-LABEL: f2: +f2: + ldr r0, =0x10001 +@ CHECK: ldr r0, .Ltmp[[TMP0:[0-9+]]] + adds r0, r0, #1 + adds r0, r0, #1 + b f3 +.ltorg +@ constant pool +@ CHECK: .align 2 +@ CHECK: .Ltmp[[TMP0]] +@ CHECK: .long 65537 + +@ CHECK-LABEL: f3: +f3: + adds r0, r0, #1 + adds r0, r0, #1 + +@ check that ltorg clears the constant pool after dumping it +.section b,"ax",%progbits +@ CHECK-LABEL: f4: +f4: + ldr r0, =0x10002 +@ CHECK: ldr r0, .Ltmp[[TMP1:[0-9+]]] + adds r0, r0, #1 + adds r0, r0, #1 + b f5 +.ltorg +@ constant pool +@ CHECK: .align 2 +@ CHECK: .Ltmp[[TMP1]] +@ CHECK: .long 65538 + +@ CHECK-LABEL: f5: +f5: + adds r0, r0, #1 + adds r0, r0, #1 + ldr r0, =0x10003 +@ CHECK: ldr r0, .Ltmp[[TMP2:[0-9+]]] + adds r0, r0, #1 + b f6 +.ltorg +@ constant pool +@ CHECK: .align 2 +@ CHECK: .Ltmp[[TMP2]] +@ CHECK: .long 65539 + +@ CHECK-LABEL: f6: +f6: + adds r0, r0, #1 + adds r0, r0, #1 + +@ check that ltorg does not issue an error if there is no constant pool +.section c,"ax",%progbits +@ CHECK-LABEL: f7: +f7: + adds r0, r0, #1 + b f8 + .ltorg +f8: + adds r0, r0, #1 + +@ check that ltorg works for labels +.section d,"ax",%progbits +@ CHECK-LABEL: f9: +f9: + adds r0, r0, #1 + adds r0, r0, #1 + ldr r0, =bar +@ CHECK: ldr r0, .Ltmp[[TMP3:[0-9+]]] + adds r0, r0, #1 + adds r0, r0, #1 + adds r0, r0, #1 + b f10 +.ltorg +@ constant pool +@ CHECK: .align 2 +@ CHECK: .Ltmp[[TMP3]] +@ CHECK: .long bar + +@ CHECK-LABEL: f10: +f10: + adds r0, r0, #1 + adds r0, r0, #1 + +@ check that use of ltorg does not prevent dumping non-empty constant pools at end of section +.section e,"ax",%progbits +@ CHECK-LABEL: f11: +f11: + adds r0, r0, #1 + adds r0, r0, #1 + ldr r0, =0x10004 +@ CHECK: ldr r0, .Ltmp[[TMP4:[0-9+]]] + b f12 + .ltorg +@ constant pool +@ CHECK: .align 2 +@ CHECK: .Ltmp[[TMP4]] +@ CHECK: .long 65540 +@ CHECK-LABEL: f12: +f12: + adds r0, r0, #1 + ldr r0, =0x10005 +@ CHECK: ldr r0, .Ltmp[[TMP5:[0-9+]]] + +.section f,"ax",%progbits +@ CHECK-LABEL: f13 +f13: + adds r0, r0, #1 + adds r0, r0, #1 + +@ should not have a constant pool at end of section with empty constant pools +@ CHECK-NOT: .section a,"ax",%progbits +@ CHECK-NOT: .section b,"ax",%progbits +@ CHECK-NOT: .section c,"ax",%progbits +@ CHECK-NOT: .section d,"ax",%progbits + +@ should have a non-empty constant pool at end of this section +@ CHECK: .section e,"ax",%progbits +@ constant pool +@ CHECK: .align 2 +@ CHECK: .Ltmp[[TMP5]] +@ CHECK: .long 65541 + +@ should not have a constant pool at end of section with empty constant pools +@ CHECK-NOT: .section f,"ax",%progbits diff --git a/test/MC/ARM/macho-relocs-with-addend.s b/test/MC/ARM/macho-relocs-with-addend.s new file mode 100644 index 000000000000..fee930eee1b3 --- /dev/null +++ b/test/MC/ARM/macho-relocs-with-addend.s @@ -0,0 +1,34 @@ +@ RUN: llvm-mc -triple thumbv7-apple-ios7.0 -filetype=obj -o - %s | \ +@ RUN: llvm-readobj -r - | FileCheck %s + + @ MachO relocations that end up expressed as internal + @ (scattered) still need to have the type set correctly. + + .text + .thumb_func + .thumb + .globl _with_thumb +_with_thumb: + bl _dest+10 + blx _dest+20 + + .globl _with_arm + .arm +_with_arm: + bl _dest+10 + blx _dest+20 + bne _dest+30 + b _dest+40 + + .data +_dest: + .word 42 + +@ CHECK: Relocations [ +@ CHECK-NEXT: Section __text { +@ CHECK-NEXT: 0x14 1 2 n/a ARM_RELOC_BR24 1 0x18 +@ CHECK-NEXT: 0x10 1 2 n/a ARM_RELOC_BR24 1 0x18 +@ CHECK-NEXT: 0xC 1 2 n/a ARM_RELOC_BR24 1 0x18 +@ CHECK-NEXT: 0x8 1 2 n/a ARM_RELOC_BR24 1 0x18 +@ CHECK-NEXT: 0x4 1 2 n/a ARM_THUMB_RELOC_BR22 1 0x18 +@ CHECK-NEXT: 0x0 1 2 n/a ARM_THUMB_RELOC_BR22 1 0x18 diff --git a/test/MC/ARM/mul-v4.s b/test/MC/ARM/mul-v4.s new file mode 100644 index 000000000000..e21468084ffb --- /dev/null +++ b/test/MC/ARM/mul-v4.s @@ -0,0 +1,39 @@ +@ PR17647: MUL/MLA/SMLAL/UMLAL should be avalaibe to IAS for ARMv4 and higher + +@ RUN: llvm-mc < %s -triple armv4-unknown-unknown -show-encoding | FileCheck %s --check-prefix=ARMV4 + +@ ARMV4: mul r0, r1, r2 @ encoding: [0x91,0x02,0x00,0xe0] +@ ARMV4: muls r0, r1, r2 @ encoding: [0x91,0x02,0x10,0xe0] +@ ARMV4: mulne r0, r1, r2 @ encoding: [0x91,0x02,0x00,0x10] +@ ARMV4: mulseq r0, r1, r2 @ encoding: [0x91,0x02,0x10,0x00] +mul r0, r1, r2 +muls r0, r1, r2 +mulne r0, r1, r2 +mulseq r0, r1, r2 + +@ ARMV4: mla r0, r1, r2, r3 @ encoding: [0x91,0x32,0x20,0xe0] +@ ARMV4: mlas r0, r1, r2, r3 @ encoding: [0x91,0x32,0x30,0xe0] +@ ARMV4: mlane r0, r1, r2, r3 @ encoding: [0x91,0x32,0x20,0x10] +@ ARMV4: mlaseq r0, r1, r2, r3 @ encoding: [0x91,0x32,0x30,0x00] +mla r0, r1, r2, r3 +mlas r0, r1, r2, r3 +mlane r0, r1, r2, r3 +mlaseq r0, r1, r2, r3 + +@ ARMV4: smlal r2, r3, r0, r1 @ encoding: [0x90,0x21,0xe3,0xe0] +@ ARMV4: smlals r2, r3, r0, r1 @ encoding: [0x90,0x21,0xf3,0xe0] +@ ARMV4: smlalne r2, r3, r0, r1 @ encoding: [0x90,0x21,0xe3,0x10] +@ ARMV4: smlalseq r2, r3, r0, r1 @ encoding: [0x90,0x21,0xf3,0x00] +smlal r2,r3,r0,r1 +smlals r2,r3,r0,r1 +smlalne r2,r3,r0,r1 +smlalseq r2,r3,r0,r1 + +@ ARMV4: umlal r2, r3, r0, r1 @ encoding: [0x90,0x21,0xa3,0xe0] +@ ARMV4: umlals r2, r3, r0, r1 @ encoding: [0x90,0x21,0xb3,0xe0] +@ ARMV4: umlalne r2, r3, r0, r1 @ encoding: [0x90,0x21,0xa3,0x10] +@ ARMV4: umlalseq r2, r3, r0, r1 @ encoding: [0x90,0x21,0xb3,0x00] +umlal r2,r3,r0,r1 +umlals r2,r3,r0,r1 +umlalne r2,r3,r0,r1 +umlalseq r2,r3,r0,r1 diff --git a/test/MC/ARM/neon-vld-encoding.s b/test/MC/ARM/neon-vld-encoding.s index 648e91705782..b96784e4689c 100644 --- a/test/MC/ARM/neon-vld-encoding.s +++ b/test/MC/ARM/neon-vld-encoding.s @@ -367,7 +367,7 @@ @ CHECK: vld3.16 {d16[], d17[], d18[]}, [r2]! @ encoding: [0x4d,0x0e,0xe2,0xf4] @ CHECK: vld3.32 {d16[], d17[], d18[]}, [r3]! @ encoding: [0x8d,0x0e,0xe3,0xf4] @ CHECK: vld3.8 {d17[], d18[], d19[]}, [r7]! @ encoding: [0x2d,0x1e,0xe7,0xf4] -@ CHECK: vld3.16 {d17[], d18[], d19[]}, [r7]! @ encoding: [0x6d,0x1e,0xe7,0xf4] +@ CHECK: vld3.16 {d17[], d19[], d21[]}, [r7]! @ encoding: [0x6d,0x1e,0xe7,0xf4] @ CHECK: vld3.32 {d16[], d18[], d20[]}, [r8]! @ encoding: [0xad,0x0e,0xe8,0xf4] @ CHECK: vld3.8 {d16[], d17[], d18[]}, [r1], r8 @ encoding: [0x08,0x0e,0xe1,0xf4] @ CHECK: vld3.16 {d16[], d17[], d18[]}, [r2], r7 @ encoding: [0x47,0x0e,0xe2,0xf4] @@ -403,7 +403,7 @@ @ CHECK: vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1:32]! @ encoding: [0x3d,0x03,0xe1,0xf4] @ CHECK: vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r2:64]! @ encoding: [0x5d,0x07,0xe2,0xf4] @ CHECK: vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r3:128]! @ encoding: [0xad,0x0b,0xe3,0xf4] -@ CHECK: vld4.16 {d17[1], d18[1], d19[1], d20[1]}, [r7]! @ encoding: [0x6d,0x17,0xe7,0xf4] +@ CHECK: vld4.16 {d17[1], d19[1], d21[1], d23[1]}, [r7]! @ encoding: [0x6d,0x17,0xe7,0xf4] @ CHECK: vld4.32 {d16[1], d18[1], d20[1], d22[1]}, [r8]! @ encoding: [0xcd,0x0b,0xe8,0xf4] @ CHECK: vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1:32], r8 @ encoding: [0x38,0x03,0xe1,0xf4] @ CHECK: vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r2], r7 @ encoding: [0x47,0x07,0xe2,0xf4] diff --git a/test/MC/ARM/neon-vld-vst-align.s b/test/MC/ARM/neon-vld-vst-align.s new file mode 100644 index 000000000000..c3628ced909e --- /dev/null +++ b/test/MC/ARM/neon-vld-vst-align.s @@ -0,0 +1,8354 @@ +@ RUN: not llvm-mc -triple=thumbv7-apple-darwin -show-encoding < %s > %t 2> %t.err +@ RUN: FileCheck < %t %s +@ RUN: FileCheck --check-prefix=CHECK-ERRORS < %t.err %s + + vld1.8 {d0}, [r4] + vld1.8 {d0}, [r4:16] + vld1.8 {d0}, [r4:32] + vld1.8 {d0}, [r4:64] + vld1.8 {d0}, [r4:128] + vld1.8 {d0}, [r4:256] + +@ CHECK: vld1.8 {d0}, [r4] @ encoding: [0x24,0xf9,0x0f,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.8 {d0}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.8 {d0}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld1.8 {d0}, [r4:64] @ encoding: [0x24,0xf9,0x1f,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.8 {d0}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.8 {d0}, [r4:256] +@ CHECK-ERRORS: ^ + + vld1.8 {d0}, [r4]! + vld1.8 {d0}, [r4:16]! + vld1.8 {d0}, [r4:32]! + vld1.8 {d0}, [r4:64]! + vld1.8 {d0}, [r4:128]! + vld1.8 {d0}, [r4:256]! + +@ CHECK: vld1.8 {d0}, [r4]! @ encoding: [0x24,0xf9,0x0d,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.8 {d0}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.8 {d0}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld1.8 {d0}, [r4:64]! @ encoding: [0x24,0xf9,0x1d,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.8 {d0}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.8 {d0}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld1.8 {d0}, [r4], r6 + vld1.8 {d0}, [r4:16], r6 + vld1.8 {d0}, [r4:32], r6 + vld1.8 {d0}, [r4:64], r6 + vld1.8 {d0}, [r4:128], r6 + vld1.8 {d0}, [r4:256], r6 + +@ CHECK: vld1.8 {d0}, [r4], r6 @ encoding: [0x24,0xf9,0x06,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.8 {d0}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.8 {d0}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld1.8 {d0}, [r4:64], r6 @ encoding: [0x24,0xf9,0x16,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.8 {d0}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.8 {d0}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld1.8 {d0, d1}, [r4] + vld1.8 {d0, d1}, [r4:16] + vld1.8 {d0, d1}, [r4:32] + vld1.8 {d0, d1}, [r4:64] + vld1.8 {d0, d1}, [r4:128] + vld1.8 {d0, d1}, [r4:256] + +@ CHECK: vld1.8 {d0, d1}, [r4] @ encoding: [0x24,0xf9,0x0f,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld1.8 {d0, d1}, [r4:64] @ encoding: [0x24,0xf9,0x1f,0x0a] +@ CHECK: vld1.8 {d0, d1}, [r4:128] @ encoding: [0x24,0xf9,0x2f,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1}, [r4:256] +@ CHECK-ERRORS: ^ + + vld1.8 {d0, d1}, [r4]! + vld1.8 {d0, d1}, [r4:16]! + vld1.8 {d0, d1}, [r4:32]! + vld1.8 {d0, d1}, [r4:64]! + vld1.8 {d0, d1}, [r4:128]! + vld1.8 {d0, d1}, [r4:256]! + +@ CHECK: vld1.8 {d0, d1}, [r4]! @ encoding: [0x24,0xf9,0x0d,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld1.8 {d0, d1}, [r4:64]! @ encoding: [0x24,0xf9,0x1d,0x0a] +@ CHECK: vld1.8 {d0, d1}, [r4:128]! @ encoding: [0x24,0xf9,0x2d,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld1.8 {d0, d1}, [r4], r6 + vld1.8 {d0, d1}, [r4:16], r6 + vld1.8 {d0, d1}, [r4:32], r6 + vld1.8 {d0, d1}, [r4:64], r6 + vld1.8 {d0, d1}, [r4:128], r6 + vld1.8 {d0, d1}, [r4:256], r6 + +@ CHECK: vld1.8 {d0, d1}, [r4], r6 @ encoding: [0x24,0xf9,0x06,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld1.8 {d0, d1}, [r4:64], r6 @ encoding: [0x24,0xf9,0x16,0x0a] +@ CHECK: vld1.8 {d0, d1}, [r4:128], r6 @ encoding: [0x24,0xf9,0x26,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld1.8 {d0, d1, d2}, [r4] + vld1.8 {d0, d1, d2}, [r4:16] + vld1.8 {d0, d1, d2}, [r4:32] + vld1.8 {d0, d1, d2}, [r4:64] + vld1.8 {d0, d1, d2}, [r4:128] + vld1.8 {d0, d1, d2}, [r4:256] + +@ CHECK: vld1.8 {d0, d1, d2}, [r4] @ encoding: [0x24,0xf9,0x0f,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1, d2}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1, d2}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld1.8 {d0, d1, d2}, [r4:64] @ encoding: [0x24,0xf9,0x1f,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1, d2}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1, d2}, [r4:256] +@ CHECK-ERRORS: ^ + + vld1.8 {d0, d1, d2}, [r4]! + vld1.8 {d0, d1, d2}, [r4:16]! + vld1.8 {d0, d1, d2}, [r4:32]! + vld1.8 {d0, d1, d2}, [r4:64]! + vld1.8 {d0, d1, d2}, [r4:128]! + vld1.8 {d0, d1, d2}, [r4:256]! + +@ CHECK: vld1.8 {d0, d1, d2}, [r4]! @ encoding: [0x24,0xf9,0x0d,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1, d2}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1, d2}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld1.8 {d0, d1, d2}, [r4:64]! @ encoding: [0x24,0xf9,0x1d,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1, d2}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1, d2}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld1.8 {d0, d1, d2}, [r4], r6 + vld1.8 {d0, d1, d2}, [r4:16], r6 + vld1.8 {d0, d1, d2}, [r4:32], r6 + vld1.8 {d0, d1, d2}, [r4:64], r6 + vld1.8 {d0, d1, d2}, [r4:128], r6 + vld1.8 {d0, d1, d2}, [r4:256], r6 + +@ CHECK: vld1.8 {d0, d1, d2}, [r4], r6 @ encoding: [0x24,0xf9,0x06,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1, d2}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1, d2}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld1.8 {d0, d1, d2}, [r4:64], r6 @ encoding: [0x24,0xf9,0x16,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1, d2}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1, d2}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld1.8 {d0, d1, d2, d3}, [r4] + vld1.8 {d0, d1, d2, d3}, [r4:16] + vld1.8 {d0, d1, d2, d3}, [r4:32] + vld1.8 {d0, d1, d2, d3}, [r4:64] + vld1.8 {d0, d1, d2, d3}, [r4:128] + vld1.8 {d0, d1, d2, d3}, [r4:256] + +@ CHECK: vld1.8 {d0, d1, d2, d3}, [r4] @ encoding: [0x24,0xf9,0x0f,0x02] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1, d2, d3}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1, d2, d3}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld1.8 {d0, d1, d2, d3}, [r4:64] @ encoding: [0x24,0xf9,0x1f,0x02] +@ CHECK: vld1.8 {d0, d1, d2, d3}, [r4:128] @ encoding: [0x24,0xf9,0x2f,0x02] +@ CHECK: vld1.8 {d0, d1, d2, d3}, [r4:256] @ encoding: [0x24,0xf9,0x3f,0x02] + + vld1.8 {d0, d1, d2, d3}, [r4]! + vld1.8 {d0, d1, d2, d3}, [r4:16]! + vld1.8 {d0, d1, d2, d3}, [r4:32]! + vld1.8 {d0, d1, d2, d3}, [r4:64]! + vld1.8 {d0, d1, d2, d3}, [r4:128]! + vld1.8 {d0, d1, d2, d3}, [r4:256]! + +@ CHECK: vld1.8 {d0, d1, d2, d3}, [r4]! @ encoding: [0x24,0xf9,0x0d,0x02] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1, d2, d3}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1, d2, d3}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld1.8 {d0, d1, d2, d3}, [r4:64]! @ encoding: [0x24,0xf9,0x1d,0x02] +@ CHECK: vld1.8 {d0, d1, d2, d3}, [r4:128]! @ encoding: [0x24,0xf9,0x2d,0x02] +@ CHECK: vld1.8 {d0, d1, d2, d3}, [r4:256]! @ encoding: [0x24,0xf9,0x3d,0x02] + + vld1.8 {d0, d1, d2, d3}, [r4], r6 + vld1.8 {d0, d1, d2, d3}, [r4:16], r6 + vld1.8 {d0, d1, d2, d3}, [r4:32], r6 + vld1.8 {d0, d1, d2, d3}, [r4:64], r6 + vld1.8 {d0, d1, d2, d3}, [r4:128], r6 + vld1.8 {d0, d1, d2, d3}, [r4:256], r6 + +@ CHECK: vld1.8 {d0, d1, d2, d3}, [r4], r6 @ encoding: [0x24,0xf9,0x06,0x02] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1, d2, d3}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld1.8 {d0, d1, d2, d3}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld1.8 {d0, d1, d2, d3}, [r4:64], r6 @ encoding: [0x24,0xf9,0x16,0x02] +@ CHECK: vld1.8 {d0, d1, d2, d3}, [r4:128], r6 @ encoding: [0x24,0xf9,0x26,0x02] +@ CHECK: vld1.8 {d0, d1, d2, d3}, [r4:256], r6 @ encoding: [0x24,0xf9,0x36,0x02] + + vld1.8 {d0[2]}, [r4] + vld1.8 {d0[2]}, [r4:16] + vld1.8 {d0[2]}, [r4:32] + vld1.8 {d0[2]}, [r4:64] + vld1.8 {d0[2]}, [r4:128] + vld1.8 {d0[2]}, [r4:256] + +@ CHECK: vld1.8 {d0[2]}, [r4] @ encoding: [0xa4,0xf9,0x4f,0x00] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[2]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[2]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[2]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[2]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[2]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld1.8 {d0[2]}, [r4]! + vld1.8 {d0[2]}, [r4:16]! + vld1.8 {d0[2]}, [r4:32]! + vld1.8 {d0[2]}, [r4:64]! + vld1.8 {d0[2]}, [r4:128]! + vld1.8 {d0[2]}, [r4:256]! + +@ CHECK: vld1.8 {d0[2]}, [r4]! @ encoding: [0xa4,0xf9,0x4d,0x00] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[2]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[2]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[2]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[2]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[2]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld1.8 {d0[2]}, [r4], r6 + vld1.8 {d0[2]}, [r4:16], r6 + vld1.8 {d0[2]}, [r4:32], r6 + vld1.8 {d0[2]}, [r4:64], r6 + vld1.8 {d0[2]}, [r4:128], r6 + vld1.8 {d0[2]}, [r4:256], r6 + +@ CHECK: vld1.8 {d0[2]}, [r4], r6 @ encoding: [0xa4,0xf9,0x46,0x00] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[2]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[2]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[2]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[2]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[2]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld1.8 {d0[]}, [r4] + vld1.8 {d0[]}, [r4:16] + vld1.8 {d0[]}, [r4:32] + vld1.8 {d0[]}, [r4:64] + vld1.8 {d0[]}, [r4:128] + vld1.8 {d0[]}, [r4:256] + +@ CHECK: vld1.8 {d0[]}, [r4] @ encoding: [0xa4,0xf9,0x0f,0x0c] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld1.8 {d0[]}, [r4]! + vld1.8 {d0[]}, [r4:16]! + vld1.8 {d0[]}, [r4:32]! + vld1.8 {d0[]}, [r4:64]! + vld1.8 {d0[]}, [r4:128]! + vld1.8 {d0[]}, [r4:256]! + +@ CHECK: vld1.8 {d0[]}, [r4]! @ encoding: [0xa4,0xf9,0x0d,0x0c] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld1.8 {d0[]}, [r4], r6 + vld1.8 {d0[]}, [r4:16], r6 + vld1.8 {d0[]}, [r4:32], r6 + vld1.8 {d0[]}, [r4:64], r6 + vld1.8 {d0[]}, [r4:128], r6 + vld1.8 {d0[]}, [r4:256], r6 + +@ CHECK: vld1.8 {d0[]}, [r4], r6 @ encoding: [0xa4,0xf9,0x06,0x0c] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld1.8 {d0[], d1[]}, [r4] + vld1.8 {d0[], d1[]}, [r4:16] + vld1.8 {d0[], d1[]}, [r4:32] + vld1.8 {d0[], d1[]}, [r4:64] + vld1.8 {d0[], d1[]}, [r4:128] + vld1.8 {d0[], d1[]}, [r4:256] + +@ CHECK: vld1.8 {d0[], d1[]}, [r4] @ encoding: [0xa4,0xf9,0x2f,0x0c] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[], d1[]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[], d1[]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[], d1[]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[], d1[]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[], d1[]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld1.8 {d0[], d1[]}, [r4]! + vld1.8 {d0[], d1[]}, [r4:16]! + vld1.8 {d0[], d1[]}, [r4:32]! + vld1.8 {d0[], d1[]}, [r4:64]! + vld1.8 {d0[], d1[]}, [r4:128]! + vld1.8 {d0[], d1[]}, [r4:256]! + +@ CHECK: vld1.8 {d0[], d1[]}, [r4]! @ encoding: [0xa4,0xf9,0x2d,0x0c] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[], d1[]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[], d1[]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[], d1[]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[], d1[]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[], d1[]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld1.8 {d0[], d1[]}, [r4], r6 + vld1.8 {d0[], d1[]}, [r4:16], r6 + vld1.8 {d0[], d1[]}, [r4:32], r6 + vld1.8 {d0[], d1[]}, [r4:64], r6 + vld1.8 {d0[], d1[]}, [r4:128], r6 + vld1.8 {d0[], d1[]}, [r4:256], r6 + +@ CHECK: vld1.8 {d0[], d1[]}, [r4], r6 @ encoding: [0xa4,0xf9,0x26,0x0c] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[], d1[]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[], d1[]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[], d1[]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[], d1[]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld1.8 {d0[], d1[]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld1.16 {d0}, [r4] + vld1.16 {d0}, [r4:16] + vld1.16 {d0}, [r4:32] + vld1.16 {d0}, [r4:64] + vld1.16 {d0}, [r4:128] + vld1.16 {d0}, [r4:256] + +@ CHECK: vld1.16 {d0}, [r4] @ encoding: [0x24,0xf9,0x4f,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.16 {d0}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.16 {d0}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld1.16 {d0}, [r4:64] @ encoding: [0x24,0xf9,0x5f,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.16 {d0}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.16 {d0}, [r4:256] +@ CHECK-ERRORS: ^ + + vld1.16 {d0}, [r4]! + vld1.16 {d0}, [r4:16]! + vld1.16 {d0}, [r4:32]! + vld1.16 {d0}, [r4:64]! + vld1.16 {d0}, [r4:128]! + vld1.16 {d0}, [r4:256]! + +@ CHECK: vld1.16 {d0}, [r4]! @ encoding: [0x24,0xf9,0x4d,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.16 {d0}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.16 {d0}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld1.16 {d0}, [r4:64]! @ encoding: [0x24,0xf9,0x5d,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.16 {d0}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.16 {d0}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld1.16 {d0}, [r4], r6 + vld1.16 {d0}, [r4:16], r6 + vld1.16 {d0}, [r4:32], r6 + vld1.16 {d0}, [r4:64], r6 + vld1.16 {d0}, [r4:128], r6 + vld1.16 {d0}, [r4:256], r6 + +@ CHECK: vld1.16 {d0}, [r4], r6 @ encoding: [0x24,0xf9,0x46,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.16 {d0}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.16 {d0}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld1.16 {d0}, [r4:64], r6 @ encoding: [0x24,0xf9,0x56,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.16 {d0}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.16 {d0}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld1.16 {d0, d1}, [r4] + vld1.16 {d0, d1}, [r4:16] + vld1.16 {d0, d1}, [r4:32] + vld1.16 {d0, d1}, [r4:64] + vld1.16 {d0, d1}, [r4:128] + vld1.16 {d0, d1}, [r4:256] + +@ CHECK: vld1.16 {d0, d1}, [r4] @ encoding: [0x24,0xf9,0x4f,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.16 {d0, d1}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.16 {d0, d1}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld1.16 {d0, d1}, [r4:64] @ encoding: [0x24,0xf9,0x5f,0x0a] +@ CHECK: vld1.16 {d0, d1}, [r4:128] @ encoding: [0x24,0xf9,0x6f,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.16 {d0, d1}, [r4:256] +@ CHECK-ERRORS: ^ + + vld1.16 {d0, d1}, [r4]! + vld1.16 {d0, d1}, [r4:16]! + vld1.16 {d0, d1}, [r4:32]! + vld1.16 {d0, d1}, [r4:64]! + vld1.16 {d0, d1}, [r4:128]! + vld1.16 {d0, d1}, [r4:256]! + +@ CHECK: vld1.16 {d0, d1}, [r4]! @ encoding: [0x24,0xf9,0x4d,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.16 {d0, d1}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.16 {d0, d1}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld1.16 {d0, d1}, [r4:64]! @ encoding: [0x24,0xf9,0x5d,0x0a] +@ CHECK: vld1.16 {d0, d1}, [r4:128]! @ encoding: [0x24,0xf9,0x6d,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.16 {d0, d1}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld1.16 {d0, d1}, [r4], r6 + vld1.16 {d0, d1}, [r4:16], r6 + vld1.16 {d0, d1}, [r4:32], r6 + vld1.16 {d0, d1}, [r4:64], r6 + vld1.16 {d0, d1}, [r4:128], r6 + vld1.16 {d0, d1}, [r4:256], r6 + +@ CHECK: vld1.16 {d0, d1}, [r4], r6 @ encoding: [0x24,0xf9,0x46,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.16 {d0, d1}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.16 {d0, d1}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld1.16 {d0, d1}, [r4:64], r6 @ encoding: [0x24,0xf9,0x56,0x0a] +@ CHECK: vld1.16 {d0, d1}, [r4:128], r6 @ encoding: [0x24,0xf9,0x66,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.16 {d0, d1}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld1.16 {d0, d1, d2}, [r4] + vld1.16 {d0, d1, d2}, [r4:16] + vld1.16 {d0, d1, d2}, [r4:32] + vld1.16 {d0, d1, d2}, [r4:64] + vld1.16 {d0, d1, d2}, [r4:128] + vld1.16 {d0, d1, d2}, [r4:256] + +@ CHECK: vld1.16 {d0, d1, d2}, [r4] @ encoding: [0x24,0xf9,0x4f,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.16 {d0, d1, d2}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.16 {d0, d1, d2}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld1.16 {d0, d1, d2}, [r4:64] @ encoding: [0x24,0xf9,0x5f,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.16 {d0, d1, d2}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.16 {d0, d1, d2}, [r4:256] +@ CHECK-ERRORS: ^ + + vld1.16 {d0, d1, d2}, [r4]! + vld1.16 {d0, d1, d2}, [r4:16]! + vld1.16 {d0, d1, d2}, [r4:32]! + vld1.16 {d0, d1, d2}, [r4:64]! + vld1.16 {d0, d1, d2}, [r4:128]! + vld1.16 {d0, d1, d2}, [r4:256]! + +@ CHECK: vld1.16 {d0, d1, d2}, [r4]! @ encoding: [0x24,0xf9,0x4d,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.16 {d0, d1, d2}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.16 {d0, d1, d2}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld1.16 {d0, d1, d2}, [r4:64]! @ encoding: [0x24,0xf9,0x5d,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.16 {d0, d1, d2}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.16 {d0, d1, d2}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld1.16 {d0, d1, d2}, [r4], r6 + vld1.16 {d0, d1, d2}, [r4:16], r6 + vld1.16 {d0, d1, d2}, [r4:32], r6 + vld1.16 {d0, d1, d2}, [r4:64], r6 + vld1.16 {d0, d1, d2}, [r4:128], r6 + vld1.16 {d0, d1, d2}, [r4:256], r6 + +@ CHECK: vld1.16 {d0, d1, d2}, [r4], r6 @ encoding: [0x24,0xf9,0x46,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.16 {d0, d1, d2}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.16 {d0, d1, d2}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld1.16 {d0, d1, d2}, [r4:64], r6 @ encoding: [0x24,0xf9,0x56,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.16 {d0, d1, d2}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.16 {d0, d1, d2}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld1.16 {d0, d1, d2, d3}, [r4] + vld1.16 {d0, d1, d2, d3}, [r4:16] + vld1.16 {d0, d1, d2, d3}, [r4:32] + vld1.16 {d0, d1, d2, d3}, [r4:64] + vld1.16 {d0, d1, d2, d3}, [r4:128] + vld1.16 {d0, d1, d2, d3}, [r4:256] + +@ CHECK: vld1.16 {d0, d1, d2, d3}, [r4] @ encoding: [0x24,0xf9,0x4f,0x02] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld1.16 {d0, d1, d2, d3}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld1.16 {d0, d1, d2, d3}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld1.16 {d0, d1, d2, d3}, [r4:64] @ encoding: [0x24,0xf9,0x5f,0x02] +@ CHECK: vld1.16 {d0, d1, d2, d3}, [r4:128] @ encoding: [0x24,0xf9,0x6f,0x02] +@ CHECK: vld1.16 {d0, d1, d2, d3}, [r4:256] @ encoding: [0x24,0xf9,0x7f,0x02] + + vld1.16 {d0, d1, d2, d3}, [r4]! + vld1.16 {d0, d1, d2, d3}, [r4:16]! + vld1.16 {d0, d1, d2, d3}, [r4:32]! + vld1.16 {d0, d1, d2, d3}, [r4:64]! + vld1.16 {d0, d1, d2, d3}, [r4:128]! + vld1.16 {d0, d1, d2, d3}, [r4:256]! + +@ CHECK: vld1.16 {d0, d1, d2, d3}, [r4]! @ encoding: [0x24,0xf9,0x4d,0x02] +@ CHECK-ERRORS: vld1.16 {d0, d1, d2, d3}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld1.16 {d0, d1, d2, d3}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld1.16 {d0, d1, d2, d3}, [r4:64]! @ encoding: [0x24,0xf9,0x5d,0x02] +@ CHECK: vld1.16 {d0, d1, d2, d3}, [r4:128]! @ encoding: [0x24,0xf9,0x6d,0x02] +@ CHECK: vld1.16 {d0, d1, d2, d3}, [r4:256]! @ encoding: [0x24,0xf9,0x7d,0x02] + + vld1.16 {d0, d1, d2, d3}, [r4], r6 + vld1.16 {d0, d1, d2, d3}, [r4:16], r6 + vld1.16 {d0, d1, d2, d3}, [r4:32], r6 + vld1.16 {d0, d1, d2, d3}, [r4:64], r6 + vld1.16 {d0, d1, d2, d3}, [r4:128], r6 + vld1.16 {d0, d1, d2, d3}, [r4:256], r6 + +@ CHECK: vld1.16 {d0, d1, d2, d3}, [r4], r6 @ encoding: [0x24,0xf9,0x46,0x02] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld1.16 {d0, d1, d2, d3}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld1.16 {d0, d1, d2, d3}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld1.16 {d0, d1, d2, d3}, [r4:64], r6 @ encoding: [0x24,0xf9,0x56,0x02] +@ CHECK: vld1.16 {d0, d1, d2, d3}, [r4:128], r6 @ encoding: [0x24,0xf9,0x66,0x02] +@ CHECK: vld1.16 {d0, d1, d2, d3}, [r4:256], r6 @ encoding: [0x24,0xf9,0x76,0x02] + + vld1.16 {d0[2]}, [r4] + vld1.16 {d0[2]}, [r4:16] + vld1.16 {d0[2]}, [r4:32] + vld1.16 {d0[2]}, [r4:64] + vld1.16 {d0[2]}, [r4:128] + vld1.16 {d0[2]}, [r4:256] + +@ CHECK: vld1.16 {d0[2]}, [r4] @ encoding: [0xa4,0xf9,0x8f,0x04] +@ CHECK: vld1.16 {d0[2]}, [r4:16] @ encoding: [0xa4,0xf9,0x9f,0x04] +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[2]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[2]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[2]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[2]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld1.16 {d0[2]}, [r4]! + vld1.16 {d0[2]}, [r4:16]! + vld1.16 {d0[2]}, [r4:32]! + vld1.16 {d0[2]}, [r4:64]! + vld1.16 {d0[2]}, [r4:128]! + vld1.16 {d0[2]}, [r4:256]! + +@ CHECK: vld1.16 {d0[2]}, [r4]! @ encoding: [0xa4,0xf9,0x8d,0x04] +@ CHECK: vld1.16 {d0[2]}, [r4:16]! @ encoding: [0xa4,0xf9,0x9d,0x04] +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[2]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[2]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[2]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[2]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld1.16 {d0[2]}, [r4], r6 + vld1.16 {d0[2]}, [r4:16], r6 + vld1.16 {d0[2]}, [r4:32], r6 + vld1.16 {d0[2]}, [r4:64], r6 + vld1.16 {d0[2]}, [r4:128], r6 + vld1.16 {d0[2]}, [r4:256], r6 + +@ CHECK: vld1.16 {d0[2]}, [r4], r6 @ encoding: [0xa4,0xf9,0x86,0x04] +@ CHECK: vld1.16 {d0[2]}, [r4:16], r6 @ encoding: [0xa4,0xf9,0x96,0x04] +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[2]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[2]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[2]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[2]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld1.16 {d0[]}, [r4] + vld1.16 {d0[]}, [r4:16] + vld1.16 {d0[]}, [r4:32] + vld1.16 {d0[]}, [r4:64] + vld1.16 {d0[]}, [r4:128] + vld1.16 {d0[]}, [r4:256] + +@ CHECK: vld1.16 {d0[]}, [r4] @ encoding: [0xa4,0xf9,0x4f,0x0c] +@ CHECK: vld1.16 {d0[]}, [r4:16] @ encoding: [0xa4,0xf9,0x5f,0x0c] +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld1.16 {d0[]}, [r4]! + vld1.16 {d0[]}, [r4:16]! + vld1.16 {d0[]}, [r4:32]! + vld1.16 {d0[]}, [r4:64]! + vld1.16 {d0[]}, [r4:128]! + vld1.16 {d0[]}, [r4:256]! + +@ CHECK: vld1.16 {d0[]}, [r4]! @ encoding: [0xa4,0xf9,0x4d,0x0c] +@ CHECK: vld1.16 {d0[]}, [r4:16]! @ encoding: [0xa4,0xf9,0x5d,0x0c] +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld1.16 {d0[]}, [r4], r6 + vld1.16 {d0[]}, [r4:16], r6 + vld1.16 {d0[]}, [r4:32], r6 + vld1.16 {d0[]}, [r4:64], r6 + vld1.16 {d0[]}, [r4:128], r6 + vld1.16 {d0[]}, [r4:256], r6 + +@ CHECK: vld1.16 {d0[]}, [r4], r6 @ encoding: [0xa4,0xf9,0x46,0x0c] +@ CHECK: vld1.16 {d0[]}, [r4:16], r6 @ encoding: [0xa4,0xf9,0x56,0x0c] +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld1.16 {d0[], d1[]}, [r4] + vld1.16 {d0[], d1[]}, [r4:16] + vld1.16 {d0[], d1[]}, [r4:32] + vld1.16 {d0[], d1[]}, [r4:64] + vld1.16 {d0[], d1[]}, [r4:128] + vld1.16 {d0[], d1[]}, [r4:256] + +@ CHECK: vld1.16 {d0[], d1[]}, [r4] @ encoding: [0xa4,0xf9,0x6f,0x0c] +@ CHECK: vld1.16 {d0[], d1[]}, [r4:16] @ encoding: [0xa4,0xf9,0x7f,0x0c] +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[], d1[]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[], d1[]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[], d1[]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[], d1[]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld1.16 {d0[], d1[]}, [r4]! + vld1.16 {d0[], d1[]}, [r4:16]! + vld1.16 {d0[], d1[]}, [r4:32]! + vld1.16 {d0[], d1[]}, [r4:64]! + vld1.16 {d0[], d1[]}, [r4:128]! + vld1.16 {d0[], d1[]}, [r4:256]! + +@ CHECK: vld1.16 {d0[], d1[]}, [r4]! @ encoding: [0xa4,0xf9,0x6d,0x0c] +@ CHECK: vld1.16 {d0[], d1[]}, [r4:16]! @ encoding: [0xa4,0xf9,0x7d,0x0c] +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[], d1[]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[], d1[]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[], d1[]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[], d1[]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld1.16 {d0[], d1[]}, [r4], r6 + vld1.16 {d0[], d1[]}, [r4:16], r6 + vld1.16 {d0[], d1[]}, [r4:32], r6 + vld1.16 {d0[], d1[]}, [r4:64], r6 + vld1.16 {d0[], d1[]}, [r4:128], r6 + vld1.16 {d0[], d1[]}, [r4:256], r6 + +@ CHECK: vld1.16 {d0[], d1[]}, [r4], r6 @ encoding: [0xa4,0xf9,0x66,0x0c] +@ CHECK: vld1.16 {d0[], d1[]}, [r4:16], r6 @ encoding: [0xa4,0xf9,0x76,0x0c] +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[], d1[]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[], d1[]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[], d1[]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld1.16 {d0[], d1[]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld1.32 {d0}, [r4] + vld1.32 {d0}, [r4:16] + vld1.32 {d0}, [r4:32] + vld1.32 {d0}, [r4:64] + vld1.32 {d0}, [r4:128] + vld1.32 {d0}, [r4:256] + +@ CHECK: vld1.32 {d0}, [r4] @ encoding: [0x24,0xf9,0x8f,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.32 {d0}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.32 {d0}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld1.32 {d0}, [r4:64] @ encoding: [0x24,0xf9,0x9f,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.32 {d0}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.32 {d0}, [r4:256] +@ CHECK-ERRORS: ^ + + vld1.32 {d0}, [r4]! + vld1.32 {d0}, [r4:16]! + vld1.32 {d0}, [r4:32]! + vld1.32 {d0}, [r4:64]! + vld1.32 {d0}, [r4:128]! + vld1.32 {d0}, [r4:256]! + +@ CHECK: vld1.32 {d0}, [r4]! @ encoding: [0x24,0xf9,0x8d,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.32 {d0}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.32 {d0}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld1.32 {d0}, [r4:64]! @ encoding: [0x24,0xf9,0x9d,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.32 {d0}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.32 {d0}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld1.32 {d0}, [r4], r6 + vld1.32 {d0}, [r4:16], r6 + vld1.32 {d0}, [r4:32], r6 + vld1.32 {d0}, [r4:64], r6 + vld1.32 {d0}, [r4:128], r6 + vld1.32 {d0}, [r4:256], r6 + +@ CHECK: vld1.32 {d0}, [r4], r6 @ encoding: [0x24,0xf9,0x86,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.32 {d0}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.32 {d0}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld1.32 {d0}, [r4:64], r6 @ encoding: [0x24,0xf9,0x96,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.32 {d0}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.32 {d0}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld1.32 {d0, d1}, [r4] + vld1.32 {d0, d1}, [r4:16] + vld1.32 {d0, d1}, [r4:32] + vld1.32 {d0, d1}, [r4:64] + vld1.32 {d0, d1}, [r4:128] + vld1.32 {d0, d1}, [r4:256] + +@ CHECK: vld1.32 {d0, d1}, [r4] @ encoding: [0x24,0xf9,0x8f,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld1.32 {d0, d1}, [r4:64] @ encoding: [0x24,0xf9,0x9f,0x0a] +@ CHECK: vld1.32 {d0, d1}, [r4:128] @ encoding: [0x24,0xf9,0xaf,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1}, [r4:256] +@ CHECK-ERRORS: ^ + + vld1.32 {d0, d1}, [r4]! + vld1.32 {d0, d1}, [r4:16]! + vld1.32 {d0, d1}, [r4:32]! + vld1.32 {d0, d1}, [r4:64]! + vld1.32 {d0, d1}, [r4:128]! + vld1.32 {d0, d1}, [r4:256]! + +@ CHECK: vld1.32 {d0, d1}, [r4]! @ encoding: [0x24,0xf9,0x8d,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld1.32 {d0, d1}, [r4:64]! @ encoding: [0x24,0xf9,0x9d,0x0a] +@ CHECK: vld1.32 {d0, d1}, [r4:128]! @ encoding: [0x24,0xf9,0xad,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld1.32 {d0, d1}, [r4], r6 + vld1.32 {d0, d1}, [r4:16], r6 + vld1.32 {d0, d1}, [r4:32], r6 + vld1.32 {d0, d1}, [r4:64], r6 + vld1.32 {d0, d1}, [r4:128], r6 + vld1.32 {d0, d1}, [r4:256], r6 + +@ CHECK: vld1.32 {d0, d1}, [r4], r6 @ encoding: [0x24,0xf9,0x86,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld1.32 {d0, d1}, [r4:64], r6 @ encoding: [0x24,0xf9,0x96,0x0a] +@ CHECK: vld1.32 {d0, d1}, [r4:128], r6 @ encoding: [0x24,0xf9,0xa6,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld1.32 {d0, d1, d2}, [r4] + vld1.32 {d0, d1, d2}, [r4:16] + vld1.32 {d0, d1, d2}, [r4:32] + vld1.32 {d0, d1, d2}, [r4:64] + vld1.32 {d0, d1, d2}, [r4:128] + vld1.32 {d0, d1, d2}, [r4:256] + +@ CHECK: vld1.32 {d0, d1, d2}, [r4] @ encoding: [0x24,0xf9,0x8f,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1, d2}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1, d2}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld1.32 {d0, d1, d2}, [r4:64] @ encoding: [0x24,0xf9,0x9f,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1, d2}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1, d2}, [r4:256] +@ CHECK-ERRORS: ^ + + vld1.32 {d0, d1, d2}, [r4]! + vld1.32 {d0, d1, d2}, [r4:16]! + vld1.32 {d0, d1, d2}, [r4:32]! + vld1.32 {d0, d1, d2}, [r4:64]! + vld1.32 {d0, d1, d2}, [r4:128]! + vld1.32 {d0, d1, d2}, [r4:256]! + +@ CHECK: vld1.32 {d0, d1, d2}, [r4]! @ encoding: [0x24,0xf9,0x8d,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1, d2}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1, d2}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld1.32 {d0, d1, d2}, [r4:64]! @ encoding: [0x24,0xf9,0x9d,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1, d2}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1, d2}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld1.32 {d0, d1, d2}, [r4], r6 + vld1.32 {d0, d1, d2}, [r4:16], r6 + vld1.32 {d0, d1, d2}, [r4:32], r6 + vld1.32 {d0, d1, d2}, [r4:64], r6 + vld1.32 {d0, d1, d2}, [r4:128], r6 + vld1.32 {d0, d1, d2}, [r4:256], r6 + +@ CHECK: vld1.32 {d0, d1, d2}, [r4], r6 @ encoding: [0x24,0xf9,0x86,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1, d2}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1, d2}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld1.32 {d0, d1, d2}, [r4:64], r6 @ encoding: [0x24,0xf9,0x96,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1, d2}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1, d2}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld1.32 {d0, d1, d2, d3}, [r4] + vld1.32 {d0, d1, d2, d3}, [r4:16] + vld1.32 {d0, d1, d2, d3}, [r4:32] + vld1.32 {d0, d1, d2, d3}, [r4:64] + vld1.32 {d0, d1, d2, d3}, [r4:128] + vld1.32 {d0, d1, d2, d3}, [r4:256] + +@ CHECK: vld1.32 {d0, d1, d2, d3}, [r4] @ encoding: [0x24,0xf9,0x8f,0x02] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1, d2, d3}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1, d2, d3}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld1.32 {d0, d1, d2, d3}, [r4:64] @ encoding: [0x24,0xf9,0x9f,0x02] +@ CHECK: vld1.32 {d0, d1, d2, d3}, [r4:128] @ encoding: [0x24,0xf9,0xaf,0x02] +@ CHECK: vld1.32 {d0, d1, d2, d3}, [r4:256] @ encoding: [0x24,0xf9,0xbf,0x02] + + vld1.32 {d0, d1, d2, d3}, [r4]! + vld1.32 {d0, d1, d2, d3}, [r4:16]! + vld1.32 {d0, d1, d2, d3}, [r4:32]! + vld1.32 {d0, d1, d2, d3}, [r4:64]! + vld1.32 {d0, d1, d2, d3}, [r4:128]! + vld1.32 {d0, d1, d2, d3}, [r4:256]! + +@ CHECK: vld1.32 {d0, d1, d2, d3}, [r4]! @ encoding: [0x24,0xf9,0x8d,0x02] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1, d2, d3}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1, d2, d3}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld1.32 {d0, d1, d2, d3}, [r4:64]! @ encoding: [0x24,0xf9,0x9d,0x02] +@ CHECK: vld1.32 {d0, d1, d2, d3}, [r4:128]! @ encoding: [0x24,0xf9,0xad,0x02] +@ CHECK: vld1.32 {d0, d1, d2, d3}, [r4:256]! @ encoding: [0x24,0xf9,0xbd,0x02] + + vld1.32 {d0, d1, d2, d3}, [r4], r6 + vld1.32 {d0, d1, d2, d3}, [r4:16], r6 + vld1.32 {d0, d1, d2, d3}, [r4:32], r6 + vld1.32 {d0, d1, d2, d3}, [r4:64], r6 + vld1.32 {d0, d1, d2, d3}, [r4:128], r6 + vld1.32 {d0, d1, d2, d3}, [r4:256], r6 + +@ CHECK: vld1.32 {d0, d1, d2, d3}, [r4], r6 @ encoding: [0x24,0xf9,0x86,0x02] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1, d2, d3}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld1.32 {d0, d1, d2, d3}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld1.32 {d0, d1, d2, d3}, [r4:64], r6 @ encoding: [0x24,0xf9,0x96,0x02] +@ CHECK: vld1.32 {d0, d1, d2, d3}, [r4:128], r6 @ encoding: [0x24,0xf9,0xa6,0x02] +@ CHECK: vld1.32 {d0, d1, d2, d3}, [r4:256], r6 @ encoding: [0x24,0xf9,0xb6,0x02] + + vld1.32 {d0[1]}, [r4] + vld1.32 {d0[1]}, [r4:16] + vld1.32 {d0[1]}, [r4:32] + vld1.32 {d0[1]}, [r4:64] + vld1.32 {d0[1]}, [r4:128] + vld1.32 {d0[1]}, [r4:256] + +@ CHECK: vld1.32 {d0[1]}, [r4] @ encoding: [0xa4,0xf9,0x8f,0x08] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK: vld1.32 {d0[1]}, [r4:32] @ encoding: [0xa4,0xf9,0xbf,0x08] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[1]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[1]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld1.32 {d0[1]}, [r4]! + vld1.32 {d0[1]}, [r4:16]! + vld1.32 {d0[1]}, [r4:32]! + vld1.32 {d0[1]}, [r4:64]! + vld1.32 {d0[1]}, [r4:128]! + vld1.32 {d0[1]}, [r4:256]! + +@ CHECK: vld1.32 {d0[1]}, [r4]! @ encoding: [0xa4,0xf9,0x8d,0x08] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK: vld1.32 {d0[1]}, [r4:32]! @ encoding: [0xa4,0xf9,0xbd,0x08] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[1]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[1]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld1.32 {d0[1]}, [r4], r6 + vld1.32 {d0[1]}, [r4:16], r6 + vld1.32 {d0[1]}, [r4:32], r6 + vld1.32 {d0[1]}, [r4:64], r6 + vld1.32 {d0[1]}, [r4:128], r6 + vld1.32 {d0[1]}, [r4:256], r6 + +@ CHECK: vld1.32 {d0[1]}, [r4], r6 @ encoding: [0xa4,0xf9,0x86,0x08] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld1.32 {d0[1]}, [r4:32], r6 @ encoding: [0xa4,0xf9,0xb6,0x08] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[1]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[1]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld1.32 {d0[]}, [r4] + vld1.32 {d0[]}, [r4:16] + vld1.32 {d0[]}, [r4:32] + vld1.32 {d0[]}, [r4:64] + vld1.32 {d0[]}, [r4:128] + vld1.32 {d0[]}, [r4:256] + +@ CHECK: vld1.32 {d0[]}, [r4] @ encoding: [0xa4,0xf9,0x8f,0x0c] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK: vld1.32 {d0[]}, [r4:32] @ encoding: [0xa4,0xf9,0x9f,0x0c] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld1.32 {d0[]}, [r4]! + vld1.32 {d0[]}, [r4:16]! + vld1.32 {d0[]}, [r4:32]! + vld1.32 {d0[]}, [r4:64]! + vld1.32 {d0[]}, [r4:128]! + vld1.32 {d0[]}, [r4:256]! + +@ CHECK: vld1.32 {d0[]}, [r4]! @ encoding: [0xa4,0xf9,0x8d,0x0c] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK: vld1.32 {d0[]}, [r4:32]! @ encoding: [0xa4,0xf9,0x9d,0x0c] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld1.32 {d0[]}, [r4], r6 + vld1.32 {d0[]}, [r4:16], r6 + vld1.32 {d0[]}, [r4:32], r6 + vld1.32 {d0[]}, [r4:64], r6 + vld1.32 {d0[]}, [r4:128], r6 + vld1.32 {d0[]}, [r4:256], r6 + +@ CHECK: vld1.32 {d0[]}, [r4], r6 @ encoding: [0xa4,0xf9,0x86,0x0c] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld1.32 {d0[]}, [r4:32], r6 @ encoding: [0xa4,0xf9,0x96,0x0c] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld1.32 {d0[], d1[]}, [r4] + vld1.32 {d0[], d1[]}, [r4:16] + vld1.32 {d0[], d1[]}, [r4:32] + vld1.32 {d0[], d1[]}, [r4:64] + vld1.32 {d0[], d1[]}, [r4:128] + vld1.32 {d0[], d1[]}, [r4:256] + +@ CHECK: vld1.32 {d0[], d1[]}, [r4] @ encoding: [0xa4,0xf9,0xaf,0x0c] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[], d1[]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK: vld1.32 {d0[], d1[]}, [r4:32] @ encoding: [0xa4,0xf9,0xbf,0x0c] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[], d1[]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[], d1[]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[], d1[]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld1.32 {d0[], d1[]}, [r4]! + vld1.32 {d0[], d1[]}, [r4:16]! + vld1.32 {d0[], d1[]}, [r4:32]! + vld1.32 {d0[], d1[]}, [r4:64]! + vld1.32 {d0[], d1[]}, [r4:128]! + vld1.32 {d0[], d1[]}, [r4:256]! + +@ CHECK: vld1.32 {d0[], d1[]}, [r4]! @ encoding: [0xa4,0xf9,0xad,0x0c] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[], d1[]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK: vld1.32 {d0[], d1[]}, [r4:32]! @ encoding: [0xa4,0xf9,0xbd,0x0c] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[], d1[]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[], d1[]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[], d1[]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld1.32 {d0[], d1[]}, [r4], r6 + vld1.32 {d0[], d1[]}, [r4:16], r6 + vld1.32 {d0[], d1[]}, [r4:32], r6 + vld1.32 {d0[], d1[]}, [r4:64], r6 + vld1.32 {d0[], d1[]}, [r4:128], r6 + vld1.32 {d0[], d1[]}, [r4:256], r6 + +@ CHECK: vld1.32 {d0[], d1[]}, [r4], r6 @ encoding: [0xa4,0xf9,0xa6,0x0c] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[], d1[]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld1.32 {d0[], d1[]}, [r4:32], r6 @ encoding: [0xa4,0xf9,0xb6,0x0c] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[], d1[]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[], d1[]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[], d1[]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld1.32 {d0[1]}, [r4] + vld1.32 {d0[1]}, [r4:16] + vld1.32 {d0[1]}, [r4:32] + vld1.32 {d0[1]}, [r4:64] + vld1.32 {d0[1]}, [r4:128] + vld1.32 {d0[1]}, [r4:256] + +@ CHECK: vld1.32 {d0[1]}, [r4] @ encoding: [0xa4,0xf9,0x8f,0x08] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK: vld1.32 {d0[1]}, [r4:32] @ encoding: [0xa4,0xf9,0xbf,0x08] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[1]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[1]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld1.32 {d0[1]}, [r4]! + vld1.32 {d0[1]}, [r4:16]! + vld1.32 {d0[1]}, [r4:32]! + vld1.32 {d0[1]}, [r4:64]! + vld1.32 {d0[1]}, [r4:128]! + vld1.32 {d0[1]}, [r4:256]! + +@ CHECK: vld1.32 {d0[1]}, [r4]! @ encoding: [0xa4,0xf9,0x8d,0x08] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK: vld1.32 {d0[1]}, [r4:32]! @ encoding: [0xa4,0xf9,0xbd,0x08] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[1]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[1]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld1.32 {d0[1]}, [r4], r6 + vld1.32 {d0[1]}, [r4:16], r6 + vld1.32 {d0[1]}, [r4:32], r6 + vld1.32 {d0[1]}, [r4:64], r6 + vld1.32 {d0[1]}, [r4:128], r6 + vld1.32 {d0[1]}, [r4:256], r6 + +@ CHECK: vld1.32 {d0[1]}, [r4], r6 @ encoding: [0xa4,0xf9,0x86,0x08] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld1.32 {d0[1]}, [r4:32], r6 @ encoding: [0xa4,0xf9,0xb6,0x08] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[1]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[1]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld1.32 {d0[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld1.64 {d0}, [r4] + vld1.64 {d0}, [r4:16] + vld1.64 {d0}, [r4:32] + vld1.64 {d0}, [r4:64] + vld1.64 {d0}, [r4:128] + vld1.64 {d0}, [r4:256] + +@ CHECK: vld1.64 {d0}, [r4] @ encoding: [0x24,0xf9,0xcf,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.64 {d0}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.64 {d0}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld1.64 {d0}, [r4:64] @ encoding: [0x24,0xf9,0xdf,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.64 {d0}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.64 {d0}, [r4:256] +@ CHECK-ERRORS: ^ + + vld1.64 {d0}, [r4]! + vld1.64 {d0}, [r4:16]! + vld1.64 {d0}, [r4:32]! + vld1.64 {d0}, [r4:64]! + vld1.64 {d0}, [r4:128]! + vld1.64 {d0}, [r4:256]! + +@ CHECK: vld1.64 {d0}, [r4]! @ encoding: [0x24,0xf9,0xcd,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.64 {d0}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.64 {d0}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld1.64 {d0}, [r4:64]! @ encoding: [0x24,0xf9,0xdd,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.64 {d0}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.64 {d0}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld1.64 {d0}, [r4], r6 + vld1.64 {d0}, [r4:16], r6 + vld1.64 {d0}, [r4:32], r6 + vld1.64 {d0}, [r4:64], r6 + vld1.64 {d0}, [r4:128], r6 + vld1.64 {d0}, [r4:256], r6 + +@ CHECK: vld1.64 {d0}, [r4], r6 @ encoding: [0x24,0xf9,0xc6,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.64 {d0}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.64 {d0}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld1.64 {d0}, [r4:64], r6 @ encoding: [0x24,0xf9,0xd6,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.64 {d0}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.64 {d0}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld1.64 {d0, d1}, [r4] + vld1.64 {d0, d1}, [r4:16] + vld1.64 {d0, d1}, [r4:32] + vld1.64 {d0, d1}, [r4:64] + vld1.64 {d0, d1}, [r4:128] + vld1.64 {d0, d1}, [r4:256] + +@ CHECK: vld1.64 {d0, d1}, [r4] @ encoding: [0x24,0xf9,0xcf,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld1.64 {d0, d1}, [r4:64] @ encoding: [0x24,0xf9,0xdf,0x0a] +@ CHECK: vld1.64 {d0, d1}, [r4:128] @ encoding: [0x24,0xf9,0xef,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1}, [r4:256] +@ CHECK-ERRORS: ^ + + vld1.64 {d0, d1}, [r4]! + vld1.64 {d0, d1}, [r4:16]! + vld1.64 {d0, d1}, [r4:32]! + vld1.64 {d0, d1}, [r4:64]! + vld1.64 {d0, d1}, [r4:128]! + vld1.64 {d0, d1}, [r4:256]! + +@ CHECK: vld1.64 {d0, d1}, [r4]! @ encoding: [0x24,0xf9,0xcd,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld1.64 {d0, d1}, [r4:64]! @ encoding: [0x24,0xf9,0xdd,0x0a] +@ CHECK: vld1.64 {d0, d1}, [r4:128]! @ encoding: [0x24,0xf9,0xed,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld1.64 {d0, d1}, [r4], r6 + vld1.64 {d0, d1}, [r4:16], r6 + vld1.64 {d0, d1}, [r4:32], r6 + vld1.64 {d0, d1}, [r4:64], r6 + vld1.64 {d0, d1}, [r4:128], r6 + vld1.64 {d0, d1}, [r4:256], r6 + +@ CHECK: vld1.64 {d0, d1}, [r4], r6 @ encoding: [0x24,0xf9,0xc6,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld1.64 {d0, d1}, [r4:64], r6 @ encoding: [0x24,0xf9,0xd6,0x0a] +@ CHECK: vld1.64 {d0, d1}, [r4:128], r6 @ encoding: [0x24,0xf9,0xe6,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld1.64 {d0, d1, d2}, [r4] + vld1.64 {d0, d1, d2}, [r4:16] + vld1.64 {d0, d1, d2}, [r4:32] + vld1.64 {d0, d1, d2}, [r4:64] + vld1.64 {d0, d1, d2}, [r4:128] + vld1.64 {d0, d1, d2}, [r4:256] + +@ CHECK: vld1.64 {d0, d1, d2}, [r4] @ encoding: [0x24,0xf9,0xcf,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1, d2}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1, d2}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld1.64 {d0, d1, d2}, [r4:64] @ encoding: [0x24,0xf9,0xdf,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1, d2}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1, d2}, [r4:256] +@ CHECK-ERRORS: ^ + + vld1.64 {d0, d1, d2}, [r4]! + vld1.64 {d0, d1, d2}, [r4:16]! + vld1.64 {d0, d1, d2}, [r4:32]! + vld1.64 {d0, d1, d2}, [r4:64]! + vld1.64 {d0, d1, d2}, [r4:128]! + vld1.64 {d0, d1, d2}, [r4:256]! + +@ CHECK: vld1.64 {d0, d1, d2}, [r4]! @ encoding: [0x24,0xf9,0xcd,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1, d2}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1, d2}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld1.64 {d0, d1, d2}, [r4:64]! @ encoding: [0x24,0xf9,0xdd,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1, d2}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1, d2}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld1.64 {d0, d1, d2}, [r4], r6 + vld1.64 {d0, d1, d2}, [r4:16], r6 + vld1.64 {d0, d1, d2}, [r4:32], r6 + vld1.64 {d0, d1, d2}, [r4:64], r6 + vld1.64 {d0, d1, d2}, [r4:128], r6 + vld1.64 {d0, d1, d2}, [r4:256], r6 + +@ CHECK: vld1.64 {d0, d1, d2}, [r4], r6 @ encoding: [0x24,0xf9,0xc6,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1, d2}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1, d2}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld1.64 {d0, d1, d2}, [r4:64], r6 @ encoding: [0x24,0xf9,0xd6,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1, d2}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1, d2}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld1.64 {d0, d1, d2, d3}, [r4] + vld1.64 {d0, d1, d2, d3}, [r4:16] + vld1.64 {d0, d1, d2, d3}, [r4:32] + vld1.64 {d0, d1, d2, d3}, [r4:64] + vld1.64 {d0, d1, d2, d3}, [r4:128] + vld1.64 {d0, d1, d2, d3}, [r4:256] + +@ CHECK: vld1.64 {d0, d1, d2, d3}, [r4] @ encoding: [0x24,0xf9,0xcf,0x02] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1, d2, d3}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1, d2, d3}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld1.64 {d0, d1, d2, d3}, [r4:64] @ encoding: [0x24,0xf9,0xdf,0x02] +@ CHECK: vld1.64 {d0, d1, d2, d3}, [r4:128] @ encoding: [0x24,0xf9,0xef,0x02] +@ CHECK: vld1.64 {d0, d1, d2, d3}, [r4:256] @ encoding: [0x24,0xf9,0xff,0x02] + + vld1.64 {d0, d1, d2, d3}, [r4]! + vld1.64 {d0, d1, d2, d3}, [r4:16]! + vld1.64 {d0, d1, d2, d3}, [r4:32]! + vld1.64 {d0, d1, d2, d3}, [r4:64]! + vld1.64 {d0, d1, d2, d3}, [r4:128]! + vld1.64 {d0, d1, d2, d3}, [r4:256]! + +@ CHECK: vld1.64 {d0, d1, d2, d3}, [r4]! @ encoding: [0x24,0xf9,0xcd,0x02] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1, d2, d3}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1, d2, d3}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld1.64 {d0, d1, d2, d3}, [r4:64]! @ encoding: [0x24,0xf9,0xdd,0x02] +@ CHECK: vld1.64 {d0, d1, d2, d3}, [r4:128]! @ encoding: [0x24,0xf9,0xed,0x02] +@ CHECK: vld1.64 {d0, d1, d2, d3}, [r4:256]! @ encoding: [0x24,0xf9,0xfd,0x02] + + vld1.64 {d0, d1, d2, d3}, [r4], r6 + vld1.64 {d0, d1, d2, d3}, [r4:16], r6 + vld1.64 {d0, d1, d2, d3}, [r4:32], r6 + vld1.64 {d0, d1, d2, d3}, [r4:64], r6 + vld1.64 {d0, d1, d2, d3}, [r4:128], r6 + vld1.64 {d0, d1, d2, d3}, [r4:256], r6 + +@ CHECK: vld1.64 {d0, d1, d2, d3}, [r4], r6 @ encoding: [0x24,0xf9,0xc6,0x02] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1, d2, d3}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld1.64 {d0, d1, d2, d3}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld1.64 {d0, d1, d2, d3}, [r4:64], r6 @ encoding: [0x24,0xf9,0xd6,0x02] +@ CHECK: vld1.64 {d0, d1, d2, d3}, [r4:128], r6 @ encoding: [0x24,0xf9,0xe6,0x02] +@ CHECK: vld1.64 {d0, d1, d2, d3}, [r4:256], r6 @ encoding: [0x24,0xf9,0xf6,0x02] + + vld2.8 {d0, d1}, [r4] + vld2.8 {d0, d1}, [r4:16] + vld2.8 {d0, d1}, [r4:32] + vld2.8 {d0, d1}, [r4:64] + vld2.8 {d0, d1}, [r4:128] + vld2.8 {d0, d1}, [r4:256] + +@ CHECK: vld2.8 {d0, d1}, [r4] @ encoding: [0x24,0xf9,0x0f,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.8 {d0, d1}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.8 {d0, d1}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld2.8 {d0, d1}, [r4:64] @ encoding: [0x24,0xf9,0x1f,0x08] +@ CHECK: vld2.8 {d0, d1}, [r4:128] @ encoding: [0x24,0xf9,0x2f,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.8 {d0, d1}, [r4:256] +@ CHECK-ERRORS: ^ + + vld2.8 {d0, d1}, [r4]! + vld2.8 {d0, d1}, [r4:16]! + vld2.8 {d0, d1}, [r4:32]! + vld2.8 {d0, d1}, [r4:64]! + vld2.8 {d0, d1}, [r4:128]! + vld2.8 {d0, d1}, [r4:256]! + +@ CHECK: vld2.8 {d0, d1}, [r4]! @ encoding: [0x24,0xf9,0x0d,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.8 {d0, d1}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.8 {d0, d1}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld2.8 {d0, d1}, [r4:64]! @ encoding: [0x24,0xf9,0x1d,0x08] +@ CHECK: vld2.8 {d0, d1}, [r4:128]! @ encoding: [0x24,0xf9,0x2d,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.8 {d0, d1}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld2.8 {d0, d1}, [r4], r6 + vld2.8 {d0, d1}, [r4:16], r6 + vld2.8 {d0, d1}, [r4:32], r6 + vld2.8 {d0, d1}, [r4:64], r6 + vld2.8 {d0, d1}, [r4:128], r6 + vld2.8 {d0, d1}, [r4:256], r6 + +@ CHECK: vld2.8 {d0, d1}, [r4], r6 @ encoding: [0x24,0xf9,0x06,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.8 {d0, d1}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.8 {d0, d1}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld2.8 {d0, d1}, [r4:64], r6 @ encoding: [0x24,0xf9,0x16,0x08] +@ CHECK: vld2.8 {d0, d1}, [r4:128], r6 @ encoding: [0x24,0xf9,0x26,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.8 {d0, d1}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld2.8 {d0, d2}, [r4] + vld2.8 {d0, d2}, [r4:16] + vld2.8 {d0, d2}, [r4:32] + vld2.8 {d0, d2}, [r4:64] + vld2.8 {d0, d2}, [r4:128] + vld2.8 {d0, d2}, [r4:256] + +@ CHECK: vld2.8 {d0, d2}, [r4] @ encoding: [0x24,0xf9,0x0f,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.8 {d0, d2}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.8 {d0, d2}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld2.8 {d0, d2}, [r4:64] @ encoding: [0x24,0xf9,0x1f,0x09] +@ CHECK: vld2.8 {d0, d2}, [r4:128] @ encoding: [0x24,0xf9,0x2f,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.8 {d0, d2}, [r4:256] +@ CHECK-ERRORS: ^ + + vld2.8 {d0, d2}, [r4]! + vld2.8 {d0, d2}, [r4:16]! + vld2.8 {d0, d2}, [r4:32]! + vld2.8 {d0, d2}, [r4:64]! + vld2.8 {d0, d2}, [r4:128]! + vld2.8 {d0, d2}, [r4:256]! + +@ CHECK: vld2.8 {d0, d2}, [r4]! @ encoding: [0x24,0xf9,0x0d,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.8 {d0, d2}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.8 {d0, d2}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld2.8 {d0, d2}, [r4:64]! @ encoding: [0x24,0xf9,0x1d,0x09] +@ CHECK: vld2.8 {d0, d2}, [r4:128]! @ encoding: [0x24,0xf9,0x2d,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.8 {d0, d2}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld2.8 {d0, d2}, [r4], r6 + vld2.8 {d0, d2}, [r4:16], r6 + vld2.8 {d0, d2}, [r4:32], r6 + vld2.8 {d0, d2}, [r4:64], r6 + vld2.8 {d0, d2}, [r4:128], r6 + vld2.8 {d0, d2}, [r4:256], r6 + +@ CHECK: vld2.8 {d0, d2}, [r4], r6 @ encoding: [0x24,0xf9,0x06,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.8 {d0, d2}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.8 {d0, d2}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld2.8 {d0, d2}, [r4:64], r6 @ encoding: [0x24,0xf9,0x16,0x09] +@ CHECK: vld2.8 {d0, d2}, [r4:128], r6 @ encoding: [0x24,0xf9,0x26,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.8 {d0, d2}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld2.8 {d0, d1, d2, d3}, [r4] + vld2.8 {d0, d1, d2, d3}, [r4:16] + vld2.8 {d0, d1, d2, d3}, [r4:32] + vld2.8 {d0, d1, d2, d3}, [r4:64] + vld2.8 {d0, d1, d2, d3}, [r4:128] + vld2.8 {d0, d1, d2, d3}, [r4:256] + +@ CHECK: vld2.8 {d0, d1, d2, d3}, [r4] @ encoding: [0x24,0xf9,0x0f,0x03] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld2.8 {d0, d1, d2, d3}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld2.8 {d0, d1, d2, d3}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld2.8 {d0, d1, d2, d3}, [r4:64] @ encoding: [0x24,0xf9,0x1f,0x03] +@ CHECK: vld2.8 {d0, d1, d2, d3}, [r4:128] @ encoding: [0x24,0xf9,0x2f,0x03] +@ CHECK: vld2.8 {d0, d1, d2, d3}, [r4:256] @ encoding: [0x24,0xf9,0x3f,0x03] + + vld2.8 {d0, d1, d2, d3}, [r4]! + vld2.8 {d0, d1, d2, d3}, [r4:16]! + vld2.8 {d0, d1, d2, d3}, [r4:32]! + vld2.8 {d0, d1, d2, d3}, [r4:64]! + vld2.8 {d0, d1, d2, d3}, [r4:128]! + vld2.8 {d0, d1, d2, d3}, [r4:256]! + +@ CHECK: vld2.8 {d0, d1, d2, d3}, [r4]! @ encoding: [0x24,0xf9,0x0d,0x03] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld2.8 {d0, d1, d2, d3}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld2.8 {d0, d1, d2, d3}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld2.8 {d0, d1, d2, d3}, [r4:64]! @ encoding: [0x24,0xf9,0x1d,0x03] +@ CHECK: vld2.8 {d0, d1, d2, d3}, [r4:128]! @ encoding: [0x24,0xf9,0x2d,0x03] +@ CHECK: vld2.8 {d0, d1, d2, d3}, [r4:256]! @ encoding: [0x24,0xf9,0x3d,0x03] + + vld2.8 {d0, d1, d2, d3}, [r4], r6 + vld2.8 {d0, d1, d2, d3}, [r4:16], r6 + vld2.8 {d0, d1, d2, d3}, [r4:32], r6 + vld2.8 {d0, d1, d2, d3}, [r4:64], r6 + vld2.8 {d0, d1, d2, d3}, [r4:128], r6 + vld2.8 {d0, d1, d2, d3}, [r4:256], r6 + +@ CHECK: vld2.8 {d0, d1, d2, d3}, [r4], r6 @ encoding: [0x24,0xf9,0x06,0x03] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld2.8 {d0, d1, d2, d3}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld2.8 {d0, d1, d2, d3}, [r4:32], r6 +@ CHECK: vld2.8 {d0, d1, d2, d3}, [r4:64], r6 @ encoding: [0x24,0xf9,0x16,0x03] +@ CHECK: vld2.8 {d0, d1, d2, d3}, [r4:128], r6 @ encoding: [0x24,0xf9,0x26,0x03] +@ CHECK: vld2.8 {d0, d1, d2, d3}, [r4:256], r6 @ encoding: [0x24,0xf9,0x36,0x03] + + vld2.8 {d0[2], d1[2]}, [r4] + vld2.8 {d0[2], d1[2]}, [r4:16] + vld2.8 {d0[2], d1[2]}, [r4:32] + vld2.8 {d0[2], d1[2]}, [r4:64] + vld2.8 {d0[2], d1[2]}, [r4:128] + vld2.8 {d0[2], d1[2]}, [r4:256] + +@ CHECK: vld2.8 {d0[2], d1[2]}, [r4] @ encoding: [0xa4,0xf9,0x4f,0x01] +@ CHECK: vld2.8 {d0[2], d1[2]}, [r4:16] @ encoding: [0xa4,0xf9,0x5f,0x01] +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[2], d1[2]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[2], d1[2]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[2], d1[2]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[2], d1[2]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld2.8 {d0[2], d1[2]}, [r4]! + vld2.8 {d0[2], d1[2]}, [r4:16]! + vld2.8 {d0[2], d1[2]}, [r4:32]! + vld2.8 {d0[2], d1[2]}, [r4:64]! + vld2.8 {d0[2], d1[2]}, [r4:128]! + vld2.8 {d0[2], d1[2]}, [r4:256]! + +@ CHECK: vld2.8 {d0[2], d1[2]}, [r4]! @ encoding: [0xa4,0xf9,0x4d,0x01] +@ CHECK: vld2.8 {d0[2], d1[2]}, [r4:16]! @ encoding: [0xa4,0xf9,0x5d,0x01] +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[2], d1[2]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[2], d1[2]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[2], d1[2]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[2], d1[2]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld2.8 {d0[2], d1[2]}, [r4], r6 + vld2.8 {d0[2], d1[2]}, [r4:16], r6 + vld2.8 {d0[2], d1[2]}, [r4:32], r6 + vld2.8 {d0[2], d1[2]}, [r4:64], r6 + vld2.8 {d0[2], d1[2]}, [r4:128], r6 + vld2.8 {d0[2], d1[2]}, [r4:256], r6 + +@ CHECK: vld2.8 {d0[2], d1[2]}, [r4], r6 @ encoding: [0xa4,0xf9,0x46,0x01] +@ CHECK: vld2.8 {d0[2], d1[2]}, [r4:16], r6 @ encoding: [0xa4,0xf9,0x56,0x01] +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[2], d1[2]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[2], d1[2]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[2], d1[2]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[2], d1[2]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld2.8 {d0[], d1[]}, [r4] + vld2.8 {d0[], d1[]}, [r4:16] + vld2.8 {d0[], d1[]}, [r4:32] + vld2.8 {d0[], d1[]}, [r4:64] + vld2.8 {d0[], d1[]}, [r4:128] + vld2.8 {d0[], d1[]}, [r4:256] + +@ CHECK: vld2.8 {d0[], d1[]}, [r4] @ encoding: [0xa4,0xf9,0x0f,0x0d] +@ CHECK: vld2.8 {d0[], d1[]}, [r4:16] @ encoding: [0xa4,0xf9,0x1f,0x0d] +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[], d1[]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[], d1[]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[], d1[]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[], d1[]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld2.8 {d0[], d1[]}, [r4]! + vld2.8 {d0[], d1[]}, [r4:16]! + vld2.8 {d0[], d1[]}, [r4:32]! + vld2.8 {d0[], d1[]}, [r4:64]! + vld2.8 {d0[], d1[]}, [r4:128]! + vld2.8 {d0[], d1[]}, [r4:256]! + +@ CHECK: vld2.8 {d0[], d1[]}, [r4]! @ encoding: [0xa4,0xf9,0x0d,0x0d] +@ CHECK: vld2.8 {d0[], d1[]}, [r4:16]! @ encoding: [0xa4,0xf9,0x1d,0x0d] +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[], d1[]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[], d1[]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[], d1[]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[], d1[]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld2.8 {d0[], d1[]}, [r4], r6 + vld2.8 {d0[], d1[]}, [r4:16], r6 + vld2.8 {d0[], d1[]}, [r4:32], r6 + vld2.8 {d0[], d1[]}, [r4:64], r6 + vld2.8 {d0[], d1[]}, [r4:128], r6 + vld2.8 {d0[], d1[]}, [r4:256], r6 + +@ CHECK: vld2.8 {d0[], d1[]}, [r4], r6 @ encoding: [0xa4,0xf9,0x06,0x0d] +@ CHECK: vld2.8 {d0[], d1[]}, [r4:16], r6 @ encoding: [0xa4,0xf9,0x16,0x0d] +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[], d1[]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[], d1[]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[], d1[]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[], d1[]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld2.8 {d0[], d2[]}, [r4] + vld2.8 {d0[], d2[]}, [r4:16] + vld2.8 {d0[], d2[]}, [r4:32] + vld2.8 {d0[], d2[]}, [r4:64] + vld2.8 {d0[], d2[]}, [r4:128] + vld2.8 {d0[], d2[]}, [r4:256] + +@ CHECK: vld2.8 {d0[], d2[]}, [r4] @ encoding: [0xa4,0xf9,0x2f,0x0d] +@ CHECK: vld2.8 {d0[], d2[]}, [r4:16] @ encoding: [0xa4,0xf9,0x3f,0x0d] +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[], d2[]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[], d2[]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[], d2[]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[], d2[]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld2.8 {d0[], d2[]}, [r4]! + vld2.8 {d0[], d2[]}, [r4:16]! + vld2.8 {d0[], d2[]}, [r4:32]! + vld2.8 {d0[], d2[]}, [r4:64]! + vld2.8 {d0[], d2[]}, [r4:128]! + vld2.8 {d0[], d2[]}, [r4:256]! + +@ CHECK: vld2.8 {d0[], d2[]}, [r4]! @ encoding: [0xa4,0xf9,0x2d,0x0d] +@ CHECK: vld2.8 {d0[], d2[]}, [r4:16]! @ encoding: [0xa4,0xf9,0x3d,0x0d] +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[], d2[]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[], d2[]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[], d2[]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[], d2[]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld2.8 {d0[], d2[]}, [r4], r6 + vld2.8 {d0[], d2[]}, [r4:16], r6 + vld2.8 {d0[], d2[]}, [r4:32], r6 + vld2.8 {d0[], d2[]}, [r4:64], r6 + vld2.8 {d0[], d2[]}, [r4:128], r6 + vld2.8 {d0[], d2[]}, [r4:256], r6 + +@ CHECK: vld2.8 {d0[], d2[]}, [r4], r6 @ encoding: [0xa4,0xf9,0x26,0x0d] +@ CHECK: vld2.8 {d0[], d2[]}, [r4:16], r6 @ encoding: [0xa4,0xf9,0x36,0x0d] +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[], d2[]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[], d2[]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[], d2[]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vld2.8 {d0[], d2[]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld2.16 {d0, d1}, [r4] + vld2.16 {d0, d1}, [r4:16] + vld2.16 {d0, d1}, [r4:32] + vld2.16 {d0, d1}, [r4:64] + vld2.16 {d0, d1}, [r4:128] + vld2.16 {d0, d1}, [r4:256] + +@ CHECK: vld2.16 {d0, d1}, [r4] @ encoding: [0x24,0xf9,0x4f,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.16 {d0, d1}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.16 {d0, d1}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld2.16 {d0, d1}, [r4:64] @ encoding: [0x24,0xf9,0x5f,0x08] +@ CHECK: vld2.16 {d0, d1}, [r4:128] @ encoding: [0x24,0xf9,0x6f,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.16 {d0, d1}, [r4:256] +@ CHECK-ERRORS: ^ + + vld2.16 {d0, d1}, [r4]! + vld2.16 {d0, d1}, [r4:16]! + vld2.16 {d0, d1}, [r4:32]! + vld2.16 {d0, d1}, [r4:64]! + vld2.16 {d0, d1}, [r4:128]! + vld2.16 {d0, d1}, [r4:256]! + +@ CHECK: vld2.16 {d0, d1}, [r4]! @ encoding: [0x24,0xf9,0x4d,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.16 {d0, d1}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.16 {d0, d1}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld2.16 {d0, d1}, [r4:64]! @ encoding: [0x24,0xf9,0x5d,0x08] +@ CHECK: vld2.16 {d0, d1}, [r4:128]! @ encoding: [0x24,0xf9,0x6d,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.16 {d0, d1}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld2.16 {d0, d1}, [r4], r6 + vld2.16 {d0, d1}, [r4:16], r6 + vld2.16 {d0, d1}, [r4:32], r6 + vld2.16 {d0, d1}, [r4:64], r6 + vld2.16 {d0, d1}, [r4:128], r6 + vld2.16 {d0, d1}, [r4:256], r6 + +@ CHECK: vld2.16 {d0, d1}, [r4], r6 @ encoding: [0x24,0xf9,0x46,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.16 {d0, d1}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.16 {d0, d1}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld2.16 {d0, d1}, [r4:64], r6 @ encoding: [0x24,0xf9,0x56,0x08] +@ CHECK: vld2.16 {d0, d1}, [r4:128], r6 @ encoding: [0x24,0xf9,0x66,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.16 {d0, d1}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld2.16 {d0, d2}, [r4] + vld2.16 {d0, d2}, [r4:16] + vld2.16 {d0, d2}, [r4:32] + vld2.16 {d0, d2}, [r4:64] + vld2.16 {d0, d2}, [r4:128] + vld2.16 {d0, d2}, [r4:256] + +@ CHECK: vld2.16 {d0, d2}, [r4] @ encoding: [0x24,0xf9,0x4f,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.16 {d0, d2}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.16 {d0, d2}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld2.16 {d0, d2}, [r4:64] @ encoding: [0x24,0xf9,0x5f,0x09] +@ CHECK: vld2.16 {d0, d2}, [r4:128] @ encoding: [0x24,0xf9,0x6f,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.16 {d0, d2}, [r4:256] +@ CHECK-ERRORS: ^ + + vld2.16 {d0, d2}, [r4]! + vld2.16 {d0, d2}, [r4:16]! + vld2.16 {d0, d2}, [r4:32]! + vld2.16 {d0, d2}, [r4:64]! + vld2.16 {d0, d2}, [r4:128]! + vld2.16 {d0, d2}, [r4:256]! + +@ CHECK: vld2.16 {d0, d2}, [r4]! @ encoding: [0x24,0xf9,0x4d,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.16 {d0, d2}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.16 {d0, d2}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld2.16 {d0, d2}, [r4:64]! @ encoding: [0x24,0xf9,0x5d,0x09] +@ CHECK: vld2.16 {d0, d2}, [r4:128]! @ encoding: [0x24,0xf9,0x6d,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.16 {d0, d2}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld2.16 {d0, d2}, [r4], r6 + vld2.16 {d0, d2}, [r4:16], r6 + vld2.16 {d0, d2}, [r4:32], r6 + vld2.16 {d0, d2}, [r4:64], r6 + vld2.16 {d0, d2}, [r4:128], r6 + vld2.16 {d0, d2}, [r4:256], r6 + +@ CHECK: vld2.16 {d0, d2}, [r4], r6 @ encoding: [0x24,0xf9,0x46,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.16 {d0, d2}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.16 {d0, d2}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld2.16 {d0, d2}, [r4:64], r6 @ encoding: [0x24,0xf9,0x56,0x09] +@ CHECK: vld2.16 {d0, d2}, [r4:128], r6 @ encoding: [0x24,0xf9,0x66,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.16 {d0, d2}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld2.16 {d0, d1, d2, d3}, [r4] + vld2.16 {d0, d1, d2, d3}, [r4:16] + vld2.16 {d0, d1, d2, d3}, [r4:32] + vld2.16 {d0, d1, d2, d3}, [r4:64] + vld2.16 {d0, d1, d2, d3}, [r4:128] + vld2.16 {d0, d1, d2, d3}, [r4:256] + +@ CHECK: vld2.16 {d0, d1, d2, d3}, [r4] @ encoding: [0x24,0xf9,0x4f,0x03] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld2.16 {d0, d1, d2, d3}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld2.16 {d0, d1, d2, d3}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld2.16 {d0, d1, d2, d3}, [r4:64] @ encoding: [0x24,0xf9,0x5f,0x03] +@ CHECK: vld2.16 {d0, d1, d2, d3}, [r4:128] @ encoding: [0x24,0xf9,0x6f,0x03] +@ CHECK: vld2.16 {d0, d1, d2, d3}, [r4:256] @ encoding: [0x24,0xf9,0x7f,0x03] + + vld2.16 {d0, d1, d2, d3}, [r4]! + vld2.16 {d0, d1, d2, d3}, [r4:16]! + vld2.16 {d0, d1, d2, d3}, [r4:32]! + vld2.16 {d0, d1, d2, d3}, [r4:64]! + vld2.16 {d0, d1, d2, d3}, [r4:128]! + vld2.16 {d0, d1, d2, d3}, [r4:256]! + +@ CHECK: vld2.16 {d0, d1, d2, d3}, [r4]! @ encoding: [0x24,0xf9,0x4d,0x03] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld2.16 {d0, d1, d2, d3}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld2.16 {d0, d1, d2, d3}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld2.16 {d0, d1, d2, d3}, [r4:64]! @ encoding: [0x24,0xf9,0x5d,0x03] +@ CHECK: vld2.16 {d0, d1, d2, d3}, [r4:128]! @ encoding: [0x24,0xf9,0x6d,0x03] +@ CHECK: vld2.16 {d0, d1, d2, d3}, [r4:256]! @ encoding: [0x24,0xf9,0x7d,0x03] + + vld2.16 {d0, d1, d2, d3}, [r4], r6 + vld2.16 {d0, d1, d2, d3}, [r4:16], r6 + vld2.16 {d0, d1, d2, d3}, [r4:32], r6 + vld2.16 {d0, d1, d2, d3}, [r4:64], r6 + vld2.16 {d0, d1, d2, d3}, [r4:128], r6 + vld2.16 {d0, d1, d2, d3}, [r4:256], r6 + +@ CHECK: vld2.16 {d0, d1, d2, d3}, [r4], r6 @ encoding: [0x24,0xf9,0x46,0x03] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld2.16 {d0, d1, d2, d3}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld2.16 {d0, d1, d2, d3}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld2.16 {d0, d1, d2, d3}, [r4:64], r6 @ encoding: [0x24,0xf9,0x56,0x03] +@ CHECK: vld2.16 {d0, d1, d2, d3}, [r4:128], r6 @ encoding: [0x24,0xf9,0x66,0x03] +@ CHECK: vld2.16 {d0, d1, d2, d3}, [r4:256], r6 @ encoding: [0x24,0xf9,0x76,0x03] + + vld2.16 {d0[2], d1[2]}, [r4] + vld2.16 {d0[2], d1[2]}, [r4:16] + vld2.16 {d0[2], d1[2]}, [r4:32] + vld2.16 {d0[2], d1[2]}, [r4:64] + vld2.16 {d0[2], d1[2]}, [r4:128] + vld2.16 {d0[2], d1[2]}, [r4:256] + +@ CHECK: vld2.16 {d0[2], d1[2]}, [r4] @ encoding: [0xa4,0xf9,0x8f,0x05] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[2], d1[2]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK: vld2.16 {d0[2], d1[2]}, [r4:32] @ encoding: [0xa4,0xf9,0x9f,0x05] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[2], d1[2]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[2], d1[2]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[2], d1[2]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld2.16 {d0[2], d1[2]}, [r4]! + vld2.16 {d0[2], d1[2]}, [r4:16]! + vld2.16 {d0[2], d1[2]}, [r4:32]! + vld2.16 {d0[2], d1[2]}, [r4:64]! + vld2.16 {d0[2], d1[2]}, [r4:128]! + vld2.16 {d0[2], d1[2]}, [r4:256]! + +@ CHECK: vld2.16 {d0[2], d1[2]}, [r4]! @ encoding: [0xa4,0xf9,0x8d,0x05] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[2], d1[2]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK: vld2.16 {d0[2], d1[2]}, [r4:32]! @ encoding: [0xa4,0xf9,0x9d,0x05] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[2], d1[2]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[2], d1[2]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[2], d1[2]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld2.16 {d0[2], d1[2]}, [r4], r6 + vld2.16 {d0[2], d1[2]}, [r4:16], r6 + vld2.16 {d0[2], d1[2]}, [r4:32], r6 + vld2.16 {d0[2], d1[2]}, [r4:64], r6 + vld2.16 {d0[2], d1[2]}, [r4:128], r6 + vld2.16 {d0[2], d1[2]}, [r4:256], r6 + +@ CHECK: vld2.16 {d0[2], d1[2]}, [r4], r6 @ encoding: [0xa4,0xf9,0x86,0x05] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[2], d1[2]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld2.16 {d0[2], d1[2]}, [r4:32], r6 @ encoding: [0xa4,0xf9,0x96,0x05] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[2], d1[2]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[2], d1[2]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[2], d1[2]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld2.16 {d0[2], d2[2]}, [r4] + vld2.16 {d0[2], d2[2]}, [r4:16] + vld2.16 {d0[2], d2[2]}, [r4:32] + vld2.16 {d0[2], d2[2]}, [r4:64] + vld2.16 {d0[2], d2[2]}, [r4:128] + vld2.16 {d0[2], d2[2]}, [r4:256] + +@ CHECK: vld2.16 {d0[2], d2[2]}, [r4] @ encoding: [0xa4,0xf9,0xaf,0x05] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[2], d2[2]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK: vld2.16 {d0[2], d2[2]}, [r4:32] @ encoding: [0xa4,0xf9,0xbf,0x05] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[2], d2[2]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[2], d2[2]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[2], d2[2]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld2.16 {d0[2], d2[2]}, [r4]! + vld2.16 {d0[2], d2[2]}, [r4:16]! + vld2.16 {d0[2], d2[2]}, [r4:32]! + vld2.16 {d0[2], d2[2]}, [r4:64]! + vld2.16 {d0[2], d2[2]}, [r4:128]! + vld2.16 {d0[2], d2[2]}, [r4:256]! + +@ CHECK: vld2.16 {d0[2], d1[2]}, [r4]! @ encoding: [0xa4,0xf9,0xad,0x05] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[2], d2[2]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK: vld2.16 {d0[2], d1[2]}, [r4:32]! @ encoding: [0xa4,0xf9,0xbd,0x05] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[2], d2[2]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[2], d2[2]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[2], d2[2]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld2.16 {d0[2], d2[2]}, [r4], r6 + vld2.16 {d0[2], d2[2]}, [r4:16], r6 + vld2.16 {d0[2], d2[2]}, [r4:32], r6 + vld2.16 {d0[2], d2[2]}, [r4:64], r6 + vld2.16 {d0[2], d2[2]}, [r4:128], r6 + vld2.16 {d0[2], d2[2]}, [r4:256], r6 + +@ CHECK: vld2.16 {d0[2], d2[2]}, [r4], r6 @ encoding: [0xa4,0xf9,0xa6,0x05] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[2], d2[2]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld2.16 {d0[2], d2[2]}, [r4:32], r6 @ encoding: [0xa4,0xf9,0xb6,0x05] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[2], d2[2]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[2], d2[2]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[2], d2[2]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld2.16 {d0[], d1[]}, [r4] + vld2.16 {d0[], d1[]}, [r4:16] + vld2.16 {d0[], d1[]}, [r4:32] + vld2.16 {d0[], d1[]}, [r4:64] + vld2.16 {d0[], d1[]}, [r4:128] + vld2.16 {d0[], d1[]}, [r4:256] + +@ CHECK: vld2.16 {d0[], d1[]}, [r4] @ encoding: [0xa4,0xf9,0x4f,0x0d] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[], d1[]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK: vld2.16 {d0[], d1[]}, [r4:32] @ encoding: [0xa4,0xf9,0x5f,0x0d] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[], d1[]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[], d1[]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[], d1[]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld2.16 {d0[], d1[]}, [r4]! + vld2.16 {d0[], d1[]}, [r4:16]! + vld2.16 {d0[], d1[]}, [r4:32]! + vld2.16 {d0[], d1[]}, [r4:64]! + vld2.16 {d0[], d1[]}, [r4:128]! + vld2.16 {d0[], d1[]}, [r4:256]! + +@ CHECK: vld2.16 {d0[], d1[]}, [r4]! @ encoding: [0xa4,0xf9,0x4d,0x0d] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[], d1[]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK: vld2.16 {d0[], d1[]}, [r4:32]! @ encoding: [0xa4,0xf9,0x5d,0x0d] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[], d1[]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[], d1[]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[], d1[]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld2.16 {d0[], d1[]}, [r4], r6 + vld2.16 {d0[], d1[]}, [r4:16], r6 + vld2.16 {d0[], d1[]}, [r4:32], r6 + vld2.16 {d0[], d1[]}, [r4:64], r6 + vld2.16 {d0[], d1[]}, [r4:128], r6 + vld2.16 {d0[], d1[]}, [r4:256], r6 + +@ CHECK: vld2.16 {d0[], d1[]}, [r4], r6 @ encoding: [0xa4,0xf9,0x46,0x0d] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[], d1[]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld2.16 {d0[], d1[]}, [r4:32], r6 @ encoding: [0xa4,0xf9,0x56,0x0d] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[], d1[]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[], d1[]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[], d1[]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld2.16 {d0[], d2[]}, [r4] + vld2.16 {d0[], d2[]}, [r4:16] + vld2.16 {d0[], d2[]}, [r4:32] + vld2.16 {d0[], d2[]}, [r4:64] + vld2.16 {d0[], d2[]}, [r4:128] + vld2.16 {d0[], d2[]}, [r4:256] + +@ CHECK: vld2.16 {d0[], d2[]}, [r4] @ encoding: [0xa4,0xf9,0x6f,0x0d] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[], d2[]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK: vld2.16 {d0[], d2[]}, [r4:32] @ encoding: [0xa4,0xf9,0x7f,0x0d] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[], d2[]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[], d2[]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[], d2[]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld2.16 {d0[], d2[]}, [r4]! + vld2.16 {d0[], d2[]}, [r4:16]! + vld2.16 {d0[], d2[]}, [r4:32]! + vld2.16 {d0[], d2[]}, [r4:64]! + vld2.16 {d0[], d2[]}, [r4:128]! + vld2.16 {d0[], d2[]}, [r4:256]! + +@ CHECK: vld2.16 {d0[], d2[]}, [r4]! @ encoding: [0xa4,0xf9,0x6d,0x0d] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[], d2[]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK: vld2.16 {d0[], d2[]}, [r4:32]! @ encoding: [0xa4,0xf9,0x7d,0x0d] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[], d2[]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[], d2[]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[], d2[]}, [r4:256]! + + vld2.16 {d0[], d2[]}, [r4], r6 + vld2.16 {d0[], d2[]}, [r4:16], r6 + vld2.16 {d0[], d2[]}, [r4:32], r6 + vld2.16 {d0[], d2[]}, [r4:64], r6 + vld2.16 {d0[], d2[]}, [r4:128], r6 + vld2.16 {d0[], d2[]}, [r4:256], r6 + +@ CHECK: vld2.16 {d0[], d2[]}, [r4], r6 @ encoding: [0xa4,0xf9,0x66,0x0d] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[], d2[]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld2.16 {d0[], d2[]}, [r4:32], r6 @ encoding: [0xa4,0xf9,0x76,0x0d] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[], d2[]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[], d2[]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld2.16 {d0[], d2[]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld2.32 {d0, d1}, [r4] + vld2.32 {d0, d1}, [r4:16] + vld2.32 {d0, d1}, [r4:32] + vld2.32 {d0, d1}, [r4:64] + vld2.32 {d0, d1}, [r4:128] + vld2.32 {d0, d1}, [r4:256] + +@ CHECK: vld2.32 {d0, d1}, [r4] @ encoding: [0x24,0xf9,0x8f,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.32 {d0, d1}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.32 {d0, d1}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld2.32 {d0, d1}, [r4:64] @ encoding: [0x24,0xf9,0x9f,0x08] +@ CHECK: vld2.32 {d0, d1}, [r4:128] @ encoding: [0x24,0xf9,0xaf,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.32 {d0, d1}, [r4:256] +@ CHECK-ERRORS: ^ + + vld2.32 {d0, d1}, [r4]! + vld2.32 {d0, d1}, [r4:16]! + vld2.32 {d0, d1}, [r4:32]! + vld2.32 {d0, d1}, [r4:64]! + vld2.32 {d0, d1}, [r4:128]! + vld2.32 {d0, d1}, [r4:256]! + +@ CHECK: vld2.32 {d0, d1}, [r4]! @ encoding: [0x24,0xf9,0x8d,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.32 {d0, d1}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.32 {d0, d1}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld2.32 {d0, d1}, [r4:64]! @ encoding: [0x24,0xf9,0x9d,0x08] +@ CHECK: vld2.32 {d0, d1}, [r4:128]! @ encoding: [0x24,0xf9,0xad,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.32 {d0, d1}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld2.32 {d0, d1}, [r4], r6 + vld2.32 {d0, d1}, [r4:16], r6 + vld2.32 {d0, d1}, [r4:32], r6 + vld2.32 {d0, d1}, [r4:64], r6 + vld2.32 {d0, d1}, [r4:128], r6 + vld2.32 {d0, d1}, [r4:256], r6 + +@ CHECK: vld2.32 {d0, d1}, [r4], r6 @ encoding: [0x24,0xf9,0x86,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.32 {d0, d1}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.32 {d0, d1}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld2.32 {d0, d1}, [r4:64], r6 @ encoding: [0x24,0xf9,0x96,0x08] +@ CHECK: vld2.32 {d0, d1}, [r4:128], r6 @ encoding: [0x24,0xf9,0xa6,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.32 {d0, d1}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld2.32 {d0, d2}, [r4] + vld2.32 {d0, d2}, [r4:16] + vld2.32 {d0, d2}, [r4:32] + vld2.32 {d0, d2}, [r4:64] + vld2.32 {d0, d2}, [r4:128] + vld2.32 {d0, d2}, [r4:256] + +@ CHECK: vld2.32 {d0, d2}, [r4] @ encoding: [0x24,0xf9,0x8f,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.32 {d0, d2}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.32 {d0, d2}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld2.32 {d0, d2}, [r4:64] @ encoding: [0x24,0xf9,0x9f,0x09] +@ CHECK: vld2.32 {d0, d2}, [r4:128] @ encoding: [0x24,0xf9,0xaf,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.32 {d0, d2}, [r4:256] +@ CHECK-ERRORS: ^ + + vld2.32 {d0, d2}, [r4]! + vld2.32 {d0, d2}, [r4:16]! + vld2.32 {d0, d2}, [r4:32]! + vld2.32 {d0, d2}, [r4:64]! + vld2.32 {d0, d2}, [r4:128]! + vld2.32 {d0, d2}, [r4:256]! + +@ CHECK: vld2.32 {d0, d2}, [r4]! @ encoding: [0x24,0xf9,0x8d,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.32 {d0, d2}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.32 {d0, d2}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld2.32 {d0, d2}, [r4:64]! @ encoding: [0x24,0xf9,0x9d,0x09] +@ CHECK: vld2.32 {d0, d2}, [r4:128]! @ encoding: [0x24,0xf9,0xad,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.32 {d0, d2}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld2.32 {d0, d2}, [r4], r6 + vld2.32 {d0, d2}, [r4:16], r6 + vld2.32 {d0, d2}, [r4:32], r6 + vld2.32 {d0, d2}, [r4:64], r6 + vld2.32 {d0, d2}, [r4:128], r6 + vld2.32 {d0, d2}, [r4:256], r6 + +@ CHECK: vld2.32 {d0, d2}, [r4], r6 @ encoding: [0x24,0xf9,0x86,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.32 {d0, d2}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.32 {d0, d2}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld2.32 {d0, d2}, [r4:64], r6 @ encoding: [0x24,0xf9,0x96,0x09] +@ CHECK: vld2.32 {d0, d2}, [r4:128], r6 @ encoding: [0x24,0xf9,0xa6,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld2.32 {d0, d2}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld2.32 {d0, d1, d2, d3}, [r4] + vld2.32 {d0, d1, d2, d3}, [r4:16] + vld2.32 {d0, d1, d2, d3}, [r4:32] + vld2.32 {d0, d1, d2, d3}, [r4:64] + vld2.32 {d0, d1, d2, d3}, [r4:128] + vld2.32 {d0, d1, d2, d3}, [r4:256] + +@ CHECK: vld2.32 {d0, d1, d2, d3}, [r4] @ encoding: [0x24,0xf9,0x8f,0x03] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld2.32 {d0, d1, d2, d3}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld2.32 {d0, d1, d2, d3}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld2.32 {d0, d1, d2, d3}, [r4:64] @ encoding: [0x24,0xf9,0x9f,0x03] +@ CHECK: vld2.32 {d0, d1, d2, d3}, [r4:128] @ encoding: [0x24,0xf9,0xaf,0x03] +@ CHECK: vld2.32 {d0, d1, d2, d3}, [r4:256] @ encoding: [0x24,0xf9,0xbf,0x03] + + vld2.32 {d0, d1, d2, d3}, [r4]! + vld2.32 {d0, d1, d2, d3}, [r4:16]! + vld2.32 {d0, d1, d2, d3}, [r4:32]! + vld2.32 {d0, d1, d2, d3}, [r4:64]! + vld2.32 {d0, d1, d2, d3}, [r4:128]! + vld2.32 {d0, d1, d2, d3}, [r4:256]! + +@ CHECK: vld2.32 {d0, d1, d2, d3}, [r4]! @ encoding: [0x24,0xf9,0x8d,0x03] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld2.32 {d0, d1, d2, d3}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld2.32 {d0, d1, d2, d3}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld2.32 {d0, d1, d2, d3}, [r4:64]! @ encoding: [0x24,0xf9,0x9d,0x03] +@ CHECK: vld2.32 {d0, d1, d2, d3}, [r4:128]! @ encoding: [0x24,0xf9,0xad,0x03] +@ CHECK: vld2.32 {d0, d1, d2, d3}, [r4:256]! @ encoding: [0x24,0xf9,0xbd,0x03] + + vld2.32 {d0, d1, d2, d3}, [r4], r6 + vld2.32 {d0, d1, d2, d3}, [r4:16], r6 + vld2.32 {d0, d1, d2, d3}, [r4:32], r6 + vld2.32 {d0, d1, d2, d3}, [r4:64], r6 + vld2.32 {d0, d1, d2, d3}, [r4:128], r6 + vld2.32 {d0, d1, d2, d3}, [r4:256], r6 + +@ CHECK: vld2.32 {d0, d1, d2, d3}, [r4], r6 @ encoding: [0x24,0xf9,0x86,0x03] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld2.32 {d0, d1, d2, d3}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld2.32 {d0, d1, d2, d3}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld2.32 {d0, d1, d2, d3}, [r4:64], r6 @ encoding: [0x24,0xf9,0x96,0x03] +@ CHECK: vld2.32 {d0, d1, d2, d3}, [r4:128], r6 @ encoding: [0x24,0xf9,0xa6,0x03] +@ CHECK: vld2.32 {d0, d1, d2, d3}, [r4:256], r6 @ encoding: [0x24,0xf9,0xb6,0x03] + + vld2.32 {d0[1], d1[1]}, [r4] + vld2.32 {d0[1], d1[1]}, [r4:16] + vld2.32 {d0[1], d1[1]}, [r4:32] + vld2.32 {d0[1], d1[1]}, [r4:64] + vld2.32 {d0[1], d1[1]}, [r4:128] + vld2.32 {d0[1], d1[1]}, [r4:256] + +@ CHECK: vld2.32 {d0[1], d1[1]}, [r4] @ encoding: [0xa4,0xf9,0x8f,0x09] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[1], d1[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[1], d1[1]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld2.32 {d0[1], d1[1]}, [r4:64] @ encoding: [0xa4,0xf9,0x9f,0x09] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[1], d1[1]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[1], d1[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld2.32 {d0[1], d1[1]}, [r4]! + vld2.32 {d0[1], d1[1]}, [r4:16]! + vld2.32 {d0[1], d1[1]}, [r4:32]! + vld2.32 {d0[1], d1[1]}, [r4:64]! + vld2.32 {d0[1], d1[1]}, [r4:128]! + vld2.32 {d0[1], d1[1]}, [r4:256]! + +@ CHECK: vld2.32 {d0[1], d1[1]}, [r4]! @ encoding: [0xa4,0xf9,0x8d,0x09] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[1], d1[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[1], d1[1]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld2.32 {d0[1], d1[1]}, [r4:64]! @ encoding: [0xa4,0xf9,0x9d,0x09] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[1], d1[1]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[1], d1[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld2.32 {d0[1], d1[1]}, [r4], r6 + vld2.32 {d0[1], d1[1]}, [r4:16], r6 + vld2.32 {d0[1], d1[1]}, [r4:32], r6 + vld2.32 {d0[1], d1[1]}, [r4:64], r6 + vld2.32 {d0[1], d1[1]}, [r4:128], r6 + vld2.32 {d0[1], d1[1]}, [r4:256], r6 + +@ CHECK: vld2.32 {d0[1], d1[1]}, [r4], r6 @ encoding: [0xa4,0xf9,0x86,0x09] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[1], d1[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[1], d1[1]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld2.32 {d0[1], d1[1]}, [r4:64], r6 @ encoding: [0xa4,0xf9,0x96,0x09] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[1], d1[1]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[1], d1[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld2.32 {d0[1], d2[1]}, [r4] + vld2.32 {d0[1], d2[1]}, [r4:16] + vld2.32 {d0[1], d2[1]}, [r4:32] + vld2.32 {d0[1], d2[1]}, [r4:64] + vld2.32 {d0[1], d2[1]}, [r4:128] + vld2.32 {d0[1], d2[1]}, [r4:256] + +@ CHECK: vld2.32 {d0[1], d2[1]}, [r4] @ encoding: [0xa4,0xf9,0xcf,0x09] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[1], d2[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[1], d2[1]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld2.32 {d0[1], d2[1]}, [r4:64] @ encoding: [0xa4,0xf9,0xdf,0x09] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[1], d2[1]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[1], d2[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld2.32 {d0[1], d2[1]}, [r4]! + vld2.32 {d0[1], d2[1]}, [r4:16]! + vld2.32 {d0[1], d2[1]}, [r4:32]! + vld2.32 {d0[1], d2[1]}, [r4:64]! + vld2.32 {d0[1], d2[1]}, [r4:128]! + vld2.32 {d0[1], d2[1]}, [r4:256]! + +@ CHECK: vld2.32 {d0[1], d2[1]}, [r4]! @ encoding: [0xa4,0xf9,0xcd,0x09] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[1], d2[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[1], d2[1]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld2.32 {d0[1], d2[1]}, [r4:64]! @ encoding: [0xa4,0xf9,0xdd,0x09] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[1], d2[1]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[1], d2[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld2.32 {d0[1], d2[1]}, [r4], r6 + vld2.32 {d0[1], d2[1]}, [r4:16], r6 + vld2.32 {d0[1], d2[1]}, [r4:32], r6 + vld2.32 {d0[1], d2[1]}, [r4:64], r6 + vld2.32 {d0[1], d2[1]}, [r4:128], r6 + vld2.32 {d0[1], d2[1]}, [r4:256], r6 + +@ CHECK: vld2.32 {d0[1], d2[1]}, [r4], r6 @ encoding: [0xa4,0xf9,0xc6,0x09] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[1], d2[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[1], d2[1]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld2.32 {d0[1], d2[1]}, [r4:64], r6 @ encoding: [0xa4,0xf9,0xd6,0x09] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[1], d2[1]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[1], d2[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld2.32 {d0[], d1[]}, [r4] + vld2.32 {d0[], d1[]}, [r4:16] + vld2.32 {d0[], d1[]}, [r4:32] + vld2.32 {d0[], d1[]}, [r4:64] + vld2.32 {d0[], d1[]}, [r4:128] + vld2.32 {d0[], d1[]}, [r4:256] + +@ CHECK: vld2.32 {d0[], d1[]}, [r4] @ encoding: [0xa4,0xf9,0x8f,0x0d] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[], d1[]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[], d1[]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld2.32 {d0[], d1[]}, [r4:64] @ encoding: [0xa4,0xf9,0x9f,0x0d] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[], d1[]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[], d1[]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld2.32 {d0[], d1[]}, [r4]! + vld2.32 {d0[], d1[]}, [r4:16]! + vld2.32 {d0[], d1[]}, [r4:32]! + vld2.32 {d0[], d1[]}, [r4:64]! + vld2.32 {d0[], d1[]}, [r4:128]! + vld2.32 {d0[], d1[]}, [r4:256]! + +@ CHECK: vld2.32 {d0[], d1[]}, [r4]! @ encoding: [0xa4,0xf9,0x8d,0x0d] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[], d1[]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[], d1[]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld2.32 {d0[], d1[]}, [r4:64]! @ encoding: [0xa4,0xf9,0x9d,0x0d] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[], d1[]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[], d1[]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld2.32 {d0[], d1[]}, [r4], r6 + vld2.32 {d0[], d1[]}, [r4:16], r6 + vld2.32 {d0[], d1[]}, [r4:32], r6 + vld2.32 {d0[], d1[]}, [r4:64], r6 + vld2.32 {d0[], d1[]}, [r4:128], r6 + vld2.32 {d0[], d1[]}, [r4:256], r6 + +@ CHECK: vld2.32 {d0[], d1[]}, [r4], r6 @ encoding: [0xa4,0xf9,0x86,0x0d] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[], d1[]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[], d1[]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld2.32 {d0[], d1[]}, [r4:64], r6 @ encoding: [0xa4,0xf9,0x96,0x0d] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[], d1[]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[], d1[]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld2.32 {d0[], d2[]}, [r4] + vld2.32 {d0[], d2[]}, [r4:16] + vld2.32 {d0[], d2[]}, [r4:32] + vld2.32 {d0[], d2[]}, [r4:64] + vld2.32 {d0[], d2[]}, [r4:128] + vld2.32 {d0[], d2[]}, [r4:256] + +@ CHECK: vld2.32 {d0[], d2[]}, [r4] @ encoding: [0xa4,0xf9,0xaf,0x0d] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[], d2[]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[], d2[]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld2.32 {d0[], d2[]}, [r4:64] @ encoding: [0xa4,0xf9,0xbf,0x0d] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[], d2[]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[], d2[]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld2.32 {d0[], d2[]}, [r4]! + vld2.32 {d0[], d2[]}, [r4:16]! + vld2.32 {d0[], d2[]}, [r4:32]! + vld2.32 {d0[], d2[]}, [r4:64]! + vld2.32 {d0[], d2[]}, [r4:128]! + vld2.32 {d0[], d2[]}, [r4:256]! + +@ CHECK: vld2.32 {d0[], d2[]}, [r4]! @ encoding: [0xa4,0xf9,0xad,0x0d] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[], d2[]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[], d2[]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld2.32 {d0[], d2[]}, [r4:64]! @ encoding: [0xa4,0xf9,0xbd,0x0d] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[], d2[]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[], d2[]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld2.32 {d0[], d2[]}, [r4], r6 + vld2.32 {d0[], d2[]}, [r4:16], r6 + vld2.32 {d0[], d2[]}, [r4:32], r6 + vld2.32 {d0[], d2[]}, [r4:64], r6 + vld2.32 {d0[], d2[]}, [r4:128], r6 + vld2.32 {d0[], d2[]}, [r4:256], r6 + +@ CHECK: vld2.32 {d0[], d2[]}, [r4], r6 @ encoding: [0xa4,0xf9,0xa6,0x0d] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[], d2[]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[], d2[]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld2.32 {d0[], d2[]}, [r4:64], r6 @ encoding: [0xa4,0xf9,0xb6,0x0d] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[], d2[]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld2.32 {d0[], d2[]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld3.8 {d0, d1, d2}, [r4] + vld3.8 {d0, d1, d2}, [r4:16] + vld3.8 {d0, d1, d2}, [r4:32] + vld3.8 {d0, d1, d2}, [r4:64] + vld3.8 {d0, d1, d2}, [r4:128] + vld3.8 {d0, d1, d2}, [r4:256] + +@ CHECK: vld3.8 {d0, d1, d2}, [r4] @ encoding: [0x24,0xf9,0x0f,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.8 {d0, d1, d2}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.8 {d0, d1, d2}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld3.8 {d0, d1, d2}, [r4:64] @ encoding: [0x24,0xf9,0x1f,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.8 {d0, d1, d2}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.8 {d0, d1, d2}, [r4:256] +@ CHECK-ERRORS: ^ + + vld3.8 {d0, d1, d2}, [r4]! + vld3.8 {d0, d1, d2}, [r4:16]! + vld3.8 {d0, d1, d2}, [r4:32]! + vld3.8 {d0, d1, d2}, [r4:64]! + vld3.8 {d0, d1, d2}, [r4:128]! + vld3.8 {d0, d1, d2}, [r4:256]! + +@ CHECK: vld3.8 {d0, d1, d2}, [r4]! @ encoding: [0x24,0xf9,0x0d,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.8 {d0, d1, d2}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.8 {d0, d1, d2}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld3.8 {d0, d1, d2}, [r4:64]! @ encoding: [0x24,0xf9,0x1d,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.8 {d0, d1, d2}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.8 {d0, d1, d2}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld3.8 {d0, d1, d2}, [r4], r6 + vld3.8 {d0, d1, d2}, [r4:16], r6 + vld3.8 {d0, d1, d2}, [r4:32], r6 + vld3.8 {d0, d1, d2}, [r4:64], r6 + vld3.8 {d0, d1, d2}, [r4:128], r6 + vld3.8 {d0, d1, d2}, [r4:256], r6 + +@ CHECK: vld3.8 {d0, d1, d2}, [r4], r6 @ encoding: [0x24,0xf9,0x06,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.8 {d0, d1, d2}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.8 {d0, d1, d2}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld3.8 {d0, d1, d2}, [r4:64], r6 @ encoding: [0x24,0xf9,0x16,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.8 {d0, d1, d2}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.8 {d0, d1, d2}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld3.8 {d0, d2, d4}, [r4] + vld3.8 {d0, d2, d4}, [r4:16] + vld3.8 {d0, d2, d4}, [r4:32] + vld3.8 {d0, d2, d4}, [r4:64] + vld3.8 {d0, d2, d4}, [r4:128] + vld3.8 {d0, d2, d4}, [r4:256] + +@ CHECK: vld3.8 {d0, d2, d4}, [r4] @ encoding: [0x24,0xf9,0x0f,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.8 {d0, d2, d4}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.8 {d0, d2, d4}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld3.8 {d0, d2, d4}, [r4:64] @ encoding: [0x24,0xf9,0x1f,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.8 {d0, d2, d4}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.8 {d0, d2, d4}, [r4:256] +@ CHECK-ERRORS: ^ + + vld3.8 {d0, d2, d4}, [r4]! + vld3.8 {d0, d2, d4}, [r4:16]! + vld3.8 {d0, d2, d4}, [r4:32]! + vld3.8 {d0, d2, d4}, [r4:64]! + vld3.8 {d0, d2, d4}, [r4:128]! + vld3.8 {d0, d2, d4}, [r4:256]! + +@ CHECK: vld3.8 {d0, d2, d4}, [r4]! @ encoding: [0x24,0xf9,0x0d,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.8 {d0, d2, d4}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.8 {d0, d2, d4}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld3.8 {d0, d2, d4}, [r4:64]! @ encoding: [0x24,0xf9,0x1d,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.8 {d0, d2, d4}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.8 {d0, d2, d4}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld3.8 {d0, d2, d4}, [r4], r6 + vld3.8 {d0, d2, d4}, [r4:16], r6 + vld3.8 {d0, d2, d4}, [r4:32], r6 + vld3.8 {d0, d2, d4}, [r4:64], r6 + vld3.8 {d0, d2, d4}, [r4:128], r6 + vld3.8 {d0, d2, d4}, [r4:256], r6 + +@ CHECK: vld3.8 {d0, d2, d4}, [r4], r6 @ encoding: [0x24,0xf9,0x06,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.8 {d0, d2, d4}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.8 {d0, d2, d4}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld3.8 {d0, d2, d4}, [r4:64], r6 @ encoding: [0x24,0xf9,0x16,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.8 {d0, d2, d4}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.8 {d0, d2, d4}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld3.8 {d0[1], d1[1], d2[1]}, [r4] + vld3.8 {d0[1], d1[1], d2[1]}, [r4:16] + vld3.8 {d0[1], d1[1], d2[1]}, [r4:32] + vld3.8 {d0[1], d1[1], d2[1]}, [r4:64] + vld3.8 {d0[1], d1[1], d2[1]}, [r4:128] + vld3.8 {d0[1], d1[1], d2[1]}, [r4:256] + +@ CHECK: vld3.8 {d0[1], d1[1], d2[1]}, [r4] @ encoding: [0xa4,0xf9,0x2f,0x02] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[1], d1[1], d2[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[1], d1[1], d2[1]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[1], d1[1], d2[1]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[1], d1[1], d2[1]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[1], d1[1], d2[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld3.8 {d0[1], d1[1], d2[1]}, [r4]! + vld3.8 {d0[1], d1[1], d2[1]}, [r4:16]! + vld3.8 {d0[1], d1[1], d2[1]}, [r4:32]! + vld3.8 {d0[1], d1[1], d2[1]}, [r4:64]! + vld3.8 {d0[1], d1[1], d2[1]}, [r4:128]! + vld3.8 {d0[1], d1[1], d2[1]}, [r4:256]! + +@ CHECK: vld3.8 {d0[1], d1[1], d2[1]}, [r4]! @ encoding: [0xa4,0xf9,0x2d,0x02] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[1], d1[1], d2[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[1], d1[1], d2[1]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[1], d1[1], d2[1]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[1], d1[1], d2[1]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[1], d1[1], d2[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld3.8 {d0[1], d1[1], d2[1]}, [r4], r6 + vld3.8 {d0[1], d1[1], d2[1]}, [r4:16], r6 + vld3.8 {d0[1], d1[1], d2[1]}, [r4:32], r6 + vld3.8 {d0[1], d1[1], d2[1]}, [r4:64], r6 + vld3.8 {d0[1], d1[1], d2[1]}, [r4:128], r6 + vld3.8 {d0[1], d1[1], d2[1]}, [r4:256], r6 + +@ CHECK: vld3.8 {d0[1], d1[1], d2[1]}, [r4], r6 @ encoding: [0xa4,0xf9,0x26,0x02] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[1], d1[1], d2[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[1], d1[1], d2[1]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[1], d1[1], d2[1]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[1], d1[1], d2[1]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[1], d1[1], d2[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld3.8 {d0[], d1[], d2[]}, [r4] + vld3.8 {d0[], d1[], d2[]}, [r4:16] + vld3.8 {d0[], d1[], d2[]}, [r4:32] + vld3.8 {d0[], d1[], d2[]}, [r4:64] + vld3.8 {d0[], d1[], d2[]}, [r4:128] + vld3.8 {d0[], d1[], d2[]}, [r4:256] + +@ CHECK: vld3.8 {d0[], d1[], d2[]}, [r4] @ encoding: [0xa4,0xf9,0x0f,0x0e] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d1[], d2[]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d1[], d2[]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d1[], d2[]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d1[], d2[]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d1[], d2[]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld3.8 {d0[], d1[], d2[]}, [r4]! + vld3.8 {d0[], d1[], d2[]}, [r4:16]! + vld3.8 {d0[], d1[], d2[]}, [r4:32]! + vld3.8 {d0[], d1[], d2[]}, [r4:64]! + vld3.8 {d0[], d1[], d2[]}, [r4:128]! + vld3.8 {d0[], d1[], d2[]}, [r4:256]! + +@ CHECK: vld3.8 {d0[], d1[], d2[]}, [r4]! @ encoding: [0xa4,0xf9,0x0d,0x0e] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d1[], d2[]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d1[], d2[]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d1[], d2[]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d1[], d2[]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d1[], d2[]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld3.8 {d0[], d1[], d2[]}, [r4], r6 + vld3.8 {d0[], d1[], d2[]}, [r4:16], r6 + vld3.8 {d0[], d1[], d2[]}, [r4:32], r6 + vld3.8 {d0[], d1[], d2[]}, [r4:64], r6 + vld3.8 {d0[], d1[], d2[]}, [r4:128], r6 + vld3.8 {d0[], d1[], d2[]}, [r4:256], r6 + +@ CHECK: vld3.8 {d0[], d1[], d2[]}, [r4], r6 @ encoding: [0xa4,0xf9,0x06,0x0e] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d1[], d2[]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d1[], d2[]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d1[], d2[]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d1[], d2[]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d1[], d2[]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld3.8 {d0[], d2[], d4[]}, [r4] + vld3.8 {d0[], d2[], d4[]}, [r4:16] + vld3.8 {d0[], d2[], d4[]}, [r4:32] + vld3.8 {d0[], d2[], d4[]}, [r4:64] + vld3.8 {d0[], d2[], d4[]}, [r4:128] + vld3.8 {d0[], d2[], d4[]}, [r4:256] + +@ CHECK: vld3.8 {d0[], d2[], d4[]}, [r4] @ encoding: [0xa4,0xf9,0x2f,0x0e] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d2[], d4[]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d2[], d4[]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d2[], d4[]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d2[], d4[]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d2[], d4[]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld3.8 {d0[], d2[], d4[]}, [r4]! + vld3.8 {d0[], d2[], d4[]}, [r4:16]! + vld3.8 {d0[], d2[], d4[]}, [r4:32]! + vld3.8 {d0[], d2[], d4[]}, [r4:64]! + vld3.8 {d0[], d2[], d4[]}, [r4:128]! + vld3.8 {d0[], d2[], d4[]}, [r4:256]! + +@ CHECK: vld3.8 {d0[], d1[], d2[]}, [r4]! @ encoding: [0xa4,0xf9,0x2d,0x0e] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d2[], d4[]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d2[], d4[]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d2[], d4[]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d2[], d4[]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d2[], d4[]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld3.8 {d0[], d2[], d4[]}, [r4], r6 + vld3.8 {d0[], d2[], d4[]}, [r4:16], r6 + vld3.8 {d0[], d2[], d4[]}, [r4:32], r6 + vld3.8 {d0[], d2[], d4[]}, [r4:64], r6 + vld3.8 {d0[], d2[], d4[]}, [r4:128], r6 + vld3.8 {d0[], d2[], d4[]}, [r4:256], r6 + +@ CHECK: vld3.8 {d0[], d2[], d4[]}, [r4], r6 @ encoding: [0xa4,0xf9,0x26,0x0e] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d2[], d4[]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d2[], d4[]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d2[], d4[]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d2[], d4[]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.8 {d0[], d2[], d4[]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld3.16 {d0, d1, d2}, [r4] + vld3.16 {d0, d1, d2}, [r4:16] + vld3.16 {d0, d1, d2}, [r4:32] + vld3.16 {d0, d1, d2}, [r4:64] + vld3.16 {d0, d1, d2}, [r4:128] + vld3.16 {d0, d1, d2}, [r4:256] + +@ CHECK: vld3.16 {d0, d1, d2}, [r4] @ encoding: [0x24,0xf9,0x4f,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.16 {d0, d1, d2}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.16 {d0, d1, d2}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld3.16 {d0, d1, d2}, [r4:64] @ encoding: [0x24,0xf9,0x5f,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.16 {d0, d1, d2}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.16 {d0, d1, d2}, [r4:256] +@ CHECK-ERRORS: ^ + + vld3.16 {d0, d1, d2}, [r4]! + vld3.16 {d0, d1, d2}, [r4:16]! + vld3.16 {d0, d1, d2}, [r4:32]! + vld3.16 {d0, d1, d2}, [r4:64]! + vld3.16 {d0, d1, d2}, [r4:128]! + vld3.16 {d0, d1, d2}, [r4:256]! + +@ CHECK: vld3.16 {d0, d1, d2}, [r4]! @ encoding: [0x24,0xf9,0x4d,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.16 {d0, d1, d2}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.16 {d0, d1, d2}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld3.16 {d0, d1, d2}, [r4:64]! @ encoding: [0x24,0xf9,0x5d,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.16 {d0, d1, d2}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.16 {d0, d1, d2}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld3.16 {d0, d1, d2}, [r4], r6 + vld3.16 {d0, d1, d2}, [r4:16], r6 + vld3.16 {d0, d1, d2}, [r4:32], r6 + vld3.16 {d0, d1, d2}, [r4:64], r6 + vld3.16 {d0, d1, d2}, [r4:128], r6 + vld3.16 {d0, d1, d2}, [r4:256], r6 + +@ CHECK: vld3.16 {d0, d1, d2}, [r4], r6 @ encoding: [0x24,0xf9,0x46,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.16 {d0, d1, d2}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.16 {d0, d1, d2}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld3.16 {d0, d1, d2}, [r4:64], r6 @ encoding: [0x24,0xf9,0x56,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.16 {d0, d1, d2}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.16 {d0, d1, d2}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld3.16 {d0, d2, d4}, [r4] + vld3.16 {d0, d2, d4}, [r4:16] + vld3.16 {d0, d2, d4}, [r4:32] + vld3.16 {d0, d2, d4}, [r4:64] + vld3.16 {d0, d2, d4}, [r4:128] + vld3.16 {d0, d2, d4}, [r4:256] + +@ CHECK: vld3.16 {d0, d2, d4}, [r4] @ encoding: [0x24,0xf9,0x4f,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.16 {d0, d2, d4}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.16 {d0, d2, d4}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld3.16 {d0, d2, d4}, [r4:64] @ encoding: [0x24,0xf9,0x5f,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.16 {d0, d2, d4}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.16 {d0, d2, d4}, [r4:256] +@ CHECK-ERRORS: ^ + + vld3.16 {d0, d2, d4}, [r4]! + vld3.16 {d0, d2, d4}, [r4:16]! + vld3.16 {d0, d2, d4}, [r4:32]! + vld3.16 {d0, d2, d4}, [r4:64]! + vld3.16 {d0, d2, d4}, [r4:128]! + vld3.16 {d0, d2, d4}, [r4:256]! + +@ CHECK: vld3.16 {d0, d2, d4}, [r4]! @ encoding: [0x24,0xf9,0x4d,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.16 {d0, d2, d4}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.16 {d0, d2, d4}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld3.16 {d0, d2, d4}, [r4:64]! @ encoding: [0x24,0xf9,0x5d,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.16 {d0, d2, d4}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.16 {d0, d2, d4}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld3.16 {d0, d2, d4}, [r4], r6 + vld3.16 {d0, d2, d4}, [r4:16], r6 + vld3.16 {d0, d2, d4}, [r4:32], r6 + vld3.16 {d0, d2, d4}, [r4:64], r6 + vld3.16 {d0, d2, d4}, [r4:128], r6 + vld3.16 {d0, d2, d4}, [r4:256], r6 + +@ CHECK: vld3.16 {d0, d2, d4}, [r4], r6 @ encoding: [0x24,0xf9,0x46,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.16 {d0, d2, d4}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.16 {d0, d2, d4}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld3.16 {d0, d2, d4}, [r4:64], r6 @ encoding: [0x24,0xf9,0x56,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.16 {d0, d2, d4}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.16 {d0, d2, d4}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld3.16 {d0[1], d1[1], d2[1]}, [r4] + vld3.16 {d0[1], d1[1], d2[1]}, [r4:16] + vld3.16 {d0[1], d1[1], d2[1]}, [r4:32] + vld3.16 {d0[1], d1[1], d2[1]}, [r4:64] + vld3.16 {d0[1], d1[1], d2[1]}, [r4:128] + vld3.16 {d0[1], d1[1], d2[1]}, [r4:256] + +@ CHECK: vld3.16 {d0[1], d1[1], d2[1]}, [r4] @ encoding: [0xa4,0xf9,0x4f,0x06] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d1[1], d2[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d1[1], d2[1]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d1[1], d2[1]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d1[1], d2[1]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d1[1], d2[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld3.16 {d0[1], d1[1], d2[1]}, [r4]! + vld3.16 {d0[1], d1[1], d2[1]}, [r4:16]! + vld3.16 {d0[1], d1[1], d2[1]}, [r4:32]! + vld3.16 {d0[1], d1[1], d2[1]}, [r4:64]! + vld3.16 {d0[1], d1[1], d2[1]}, [r4:128]! + vld3.16 {d0[1], d1[1], d2[1]}, [r4:256]! + +@ CHECK: vld3.16 {d0[1], d1[1], d2[1]}, [r4]! @ encoding: [0xa4,0xf9,0x4d,0x06] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d1[1], d2[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d1[1], d2[1]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d1[1], d2[1]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d1[1], d2[1]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d1[1], d2[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld3.16 {d0[1], d1[1], d2[1]}, [r4], r6 + vld3.16 {d0[1], d1[1], d2[1]}, [r4:16], r6 + vld3.16 {d0[1], d1[1], d2[1]}, [r4:32], r6 + vld3.16 {d0[1], d1[1], d2[1]}, [r4:64], r6 + vld3.16 {d0[1], d1[1], d2[1]}, [r4:128], r6 + vld3.16 {d0[1], d1[1], d2[1]}, [r4:256], r6 + +@ CHECK: vld3.16 {d0[1], d1[1], d2[1]}, [r4], r6 @ encoding: [0xa4,0xf9,0x46,0x06] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d1[1], d2[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d1[1], d2[1]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d1[1], d2[1]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d1[1], d2[1]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d1[1], d2[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld3.16 {d0[1], d2[1], d4[1]}, [r4] + vld3.16 {d0[1], d2[1], d4[1]}, [r4:16] + vld3.16 {d0[1], d2[1], d4[1]}, [r4:32] + vld3.16 {d0[1], d2[1], d4[1]}, [r4:64] + vld3.16 {d0[1], d2[1], d4[1]}, [r4:128] + vld3.16 {d0[1], d2[1], d4[1]}, [r4:256] + +@ CHECK: vld3.16 {d0[1], d2[1], d4[1]}, [r4] @ encoding: [0xa4,0xf9,0x6f,0x06] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d2[1], d4[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d2[1], d4[1]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d2[1], d4[1]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d2[1], d4[1]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d2[1], d4[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld3.16 {d0[1], d2[1], d4[1]}, [r4]! + vld3.16 {d0[1], d2[1], d4[1]}, [r4:16]! + vld3.16 {d0[1], d2[1], d4[1]}, [r4:32]! + vld3.16 {d0[1], d2[1], d4[1]}, [r4:64]! + vld3.16 {d0[1], d2[1], d4[1]}, [r4:128]! + vld3.16 {d0[1], d2[1], d4[1]}, [r4:256]! + +@ CHECK: vld3.16 {d0[1], d1[1], d2[1]}, [r4]! @ encoding: [0xa4,0xf9,0x6d,0x06] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d2[1], d4[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d2[1], d4[1]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d2[1], d4[1]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d2[1], d4[1]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d2[1], d4[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld3.16 {d0[1], d2[1], d4[1]}, [r4], r6 + vld3.16 {d0[1], d2[1], d4[1]}, [r4:16], r6 + vld3.16 {d0[1], d2[1], d4[1]}, [r4:32], r6 + vld3.16 {d0[1], d2[1], d4[1]}, [r4:64], r6 + vld3.16 {d0[1], d2[1], d4[1]}, [r4:128], r6 + vld3.16 {d0[1], d2[1], d4[1]}, [r4:256], r6 + +@ CHECK: vld3.16 {d0[1], d2[1], d4[1]}, [r4], r6 @ encoding: [0xa4,0xf9,0x66,0x06] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d2[1], d4[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d2[1], d4[1]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d2[1], d4[1]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d2[1], d4[1]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[1], d2[1], d4[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld3.16 {d0[], d1[], d2[]}, [r4] + vld3.16 {d0[], d1[], d2[]}, [r4:16] + vld3.16 {d0[], d1[], d2[]}, [r4:32] + vld3.16 {d0[], d1[], d2[]}, [r4:64] + vld3.16 {d0[], d1[], d2[]}, [r4:128] + vld3.16 {d0[], d1[], d2[]}, [r4:256] + +@ CHECK: vld3.16 {d0[], d1[], d2[]}, [r4] @ encoding: [0xa4,0xf9,0x4f,0x0e] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d1[], d2[]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d1[], d2[]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d1[], d2[]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d1[], d2[]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d1[], d2[]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld3.16 {d0[], d1[], d2[]}, [r4]! + vld3.16 {d0[], d1[], d2[]}, [r4:16]! + vld3.16 {d0[], d1[], d2[]}, [r4:32]! + vld3.16 {d0[], d1[], d2[]}, [r4:64]! + vld3.16 {d0[], d1[], d2[]}, [r4:128]! + vld3.16 {d0[], d1[], d2[]}, [r4:256]! + +@ CHECK: vld3.16 {d0[], d1[], d2[]}, [r4]! @ encoding: [0xa4,0xf9,0x4d,0x0e] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d1[], d2[]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d1[], d2[]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d1[], d2[]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d1[], d2[]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d1[], d2[]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld3.16 {d0[], d1[], d2[]}, [r4], r6 + vld3.16 {d0[], d1[], d2[]}, [r4:16], r6 + vld3.16 {d0[], d1[], d2[]}, [r4:32], r6 + vld3.16 {d0[], d1[], d2[]}, [r4:64], r6 + vld3.16 {d0[], d1[], d2[]}, [r4:128], r6 + vld3.16 {d0[], d1[], d2[]}, [r4:256], r6 + +@ CHECK: vld3.16 {d0[], d1[], d2[]}, [r4], r6 @ encoding: [0xa4,0xf9,0x46,0x0e] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d1[], d2[]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d1[], d2[]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d1[], d2[]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d1[], d2[]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d1[], d2[]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld3.16 {d0[], d2[], d4[]}, [r4] + vld3.16 {d0[], d2[], d4[]}, [r4:16] + vld3.16 {d0[], d2[], d4[]}, [r4:32] + vld3.16 {d0[], d2[], d4[]}, [r4:64] + vld3.16 {d0[], d2[], d4[]}, [r4:128] + vld3.16 {d0[], d2[], d4[]}, [r4:256] + +@ CHECK: vld3.16 {d0[], d2[], d4[]}, [r4] @ encoding: [0xa4,0xf9,0x6f,0x0e] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d2[], d4[]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d2[], d4[]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d2[], d4[]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d2[], d4[]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d2[], d4[]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld3.16 {d0[], d2[], d4[]}, [r4]! + vld3.16 {d0[], d2[], d4[]}, [r4:16]! + vld3.16 {d0[], d2[], d4[]}, [r4:32]! + vld3.16 {d0[], d2[], d4[]}, [r4:64]! + vld3.16 {d0[], d2[], d4[]}, [r4:128]! + vld3.16 {d0[], d2[], d4[]}, [r4:256]! + +@ CHECK: vld3.16 {d0[], d2[], d4[]}, [r4]! @ encoding: [0xa4,0xf9,0x6d,0x0e] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d2[], d4[]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d2[], d4[]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d2[], d4[]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d2[], d4[]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d2[], d4[]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld3.16 {d0[], d2[], d4[]}, [r4], r6 + vld3.16 {d0[], d2[], d4[]}, [r4:16], r6 + vld3.16 {d0[], d2[], d4[]}, [r4:32], r6 + vld3.16 {d0[], d2[], d4[]}, [r4:64], r6 + vld3.16 {d0[], d2[], d4[]}, [r4:128], r6 + vld3.16 {d0[], d2[], d4[]}, [r4:256], r6 + +@ CHECK: vld3.16 {d0[], d2[], d4[]}, [r4], r6 @ encoding: [0xa4,0xf9,0x66,0x0e] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d2[], d4[]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d2[], d4[]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d2[], d4[]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d2[], d4[]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.16 {d0[], d2[], d4[]}, [r4:256], r6 + + vld3.32 {d0, d1, d2}, [r4] + vld3.32 {d0, d1, d2}, [r4:16] + vld3.32 {d0, d1, d2}, [r4:32] + vld3.32 {d0, d1, d2}, [r4:64] + vld3.32 {d0, d1, d2}, [r4:128] + vld3.32 {d0, d1, d2}, [r4:256] + +@ CHECK: vld3.32 {d0, d1, d2}, [r4] @ encoding: [0x24,0xf9,0x8f,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.32 {d0, d1, d2}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.32 {d0, d1, d2}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld3.32 {d0, d1, d2}, [r4:64] @ encoding: [0x24,0xf9,0x9f,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.32 {d0, d1, d2}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.32 {d0, d1, d2}, [r4:256] +@ CHECK-ERRORS: ^ + + vld3.32 {d0, d1, d2}, [r4]! + vld3.32 {d0, d1, d2}, [r4:16]! + vld3.32 {d0, d1, d2}, [r4:32]! + vld3.32 {d0, d1, d2}, [r4:64]! + vld3.32 {d0, d1, d2}, [r4:128]! + vld3.32 {d0, d1, d2}, [r4:256]! + +@ CHECK: vld3.32 {d0, d1, d2}, [r4]! @ encoding: [0x24,0xf9,0x8d,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.32 {d0, d1, d2}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.32 {d0, d1, d2}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld3.32 {d0, d1, d2}, [r4:64]! @ encoding: [0x24,0xf9,0x9d,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.32 {d0, d1, d2}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.32 {d0, d1, d2}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld3.32 {d0, d1, d2}, [r4], r6 + vld3.32 {d0, d1, d2}, [r4:16], r6 + vld3.32 {d0, d1, d2}, [r4:32], r6 + vld3.32 {d0, d1, d2}, [r4:64], r6 + vld3.32 {d0, d1, d2}, [r4:128], r6 + vld3.32 {d0, d1, d2}, [r4:256], r6 + +@ CHECK: vld3.32 {d0, d1, d2}, [r4], r6 @ encoding: [0x24,0xf9,0x86,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.32 {d0, d1, d2}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.32 {d0, d1, d2}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld3.32 {d0, d1, d2}, [r4:64], r6 @ encoding: [0x24,0xf9,0x96,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.32 {d0, d1, d2}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.32 {d0, d1, d2}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld3.32 {d0, d2, d4}, [r4] + vld3.32 {d0, d2, d4}, [r4:16] + vld3.32 {d0, d2, d4}, [r4:32] + vld3.32 {d0, d2, d4}, [r4:64] + vld3.32 {d0, d2, d4}, [r4:128] + vld3.32 {d0, d2, d4}, [r4:256] + +@ CHECK: vld3.32 {d0, d2, d4}, [r4] @ encoding: [0x24,0xf9,0x8f,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.32 {d0, d2, d4}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.32 {d0, d2, d4}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld3.32 {d0, d2, d4}, [r4:64] @ encoding: [0x24,0xf9,0x9f,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.32 {d0, d2, d4}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.32 {d0, d2, d4}, [r4:256] +@ CHECK-ERRORS: ^ + + vld3.32 {d0, d2, d4}, [r4]! + vld3.32 {d0, d2, d4}, [r4:16]! + vld3.32 {d0, d2, d4}, [r4:32]! + vld3.32 {d0, d2, d4}, [r4:64]! + vld3.32 {d0, d2, d4}, [r4:128]! + vld3.32 {d0, d2, d4}, [r4:256]! + +@ CHECK: vld3.32 {d0, d2, d4}, [r4]! @ encoding: [0x24,0xf9,0x8d,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.32 {d0, d2, d4}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.32 {d0, d2, d4}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld3.32 {d0, d2, d4}, [r4:64]! @ encoding: [0x24,0xf9,0x9d,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.32 {d0, d2, d4}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.32 {d0, d2, d4}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld3.32 {d0, d2, d4}, [r4], r6 + vld3.32 {d0, d2, d4}, [r4:16], r6 + vld3.32 {d0, d2, d4}, [r4:32], r6 + vld3.32 {d0, d2, d4}, [r4:64], r6 + vld3.32 {d0, d2, d4}, [r4:128], r6 + vld3.32 {d0, d2, d4}, [r4:256], r6 + +@ CHECK: vld3.32 {d0, d2, d4}, [r4], r6 @ encoding: [0x24,0xf9,0x86,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.32 {d0, d2, d4}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.32 {d0, d2, d4}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld3.32 {d0, d2, d4}, [r4:64], r6 @ encoding: [0x24,0xf9,0x96,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.32 {d0, d2, d4}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld3.32 {d0, d2, d4}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld3.32 {d0[1], d1[1], d2[1]}, [r4] + vld3.32 {d0[1], d1[1], d2[1]}, [r4:16] + vld3.32 {d0[1], d1[1], d2[1]}, [r4:32] + vld3.32 {d0[1], d1[1], d2[1]}, [r4:64] + vld3.32 {d0[1], d1[1], d2[1]}, [r4:128] + vld3.32 {d0[1], d1[1], d2[1]}, [r4:256] + +@ CHECK: vld3.32 {d0[1], d1[1], d2[1]}, [r4] @ encoding: [0xa4,0xf9,0x8f,0x0a] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d1[1], d2[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d1[1], d2[1]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d1[1], d2[1]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d1[1], d2[1]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d1[1], d2[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld3.32 {d0[1], d1[1], d2[1]}, [r4]! + vld3.32 {d0[1], d1[1], d2[1]}, [r4:16]! + vld3.32 {d0[1], d1[1], d2[1]}, [r4:32]! + vld3.32 {d0[1], d1[1], d2[1]}, [r4:64]! + vld3.32 {d0[1], d1[1], d2[1]}, [r4:128]! + vld3.32 {d0[1], d1[1], d2[1]}, [r4:256]! + +@ CHECK: vld3.32 {d0[1], d1[1], d2[1]}, [r4]! @ encoding: [0xa4,0xf9,0x8d,0x0a] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d1[1], d2[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d1[1], d2[1]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d1[1], d2[1]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d1[1], d2[1]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d1[1], d2[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld3.32 {d0[1], d1[1], d2[1]}, [r4], r6 + vld3.32 {d0[1], d1[1], d2[1]}, [r4:16], r6 + vld3.32 {d0[1], d1[1], d2[1]}, [r4:32], r6 + vld3.32 {d0[1], d1[1], d2[1]}, [r4:64], r6 + vld3.32 {d0[1], d1[1], d2[1]}, [r4:128], r6 + vld3.32 {d0[1], d1[1], d2[1]}, [r4:256], r6 + +@ CHECK: vld3.32 {d0[1], d1[1], d2[1]}, [r4], r6 @ encoding: [0xa4,0xf9,0x86,0x0a] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d1[1], d2[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d1[1], d2[1]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d1[1], d2[1]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d1[1], d2[1]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d1[1], d2[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld3.32 {d0[1], d2[1], d4[1]}, [r4] + vld3.32 {d0[1], d2[1], d4[1]}, [r4:16] + vld3.32 {d0[1], d2[1], d4[1]}, [r4:32] + vld3.32 {d0[1], d2[1], d4[1]}, [r4:64] + vld3.32 {d0[1], d2[1], d4[1]}, [r4:128] + vld3.32 {d0[1], d2[1], d4[1]}, [r4:256] + +@ CHECK: vld3.32 {d0[1], d2[1], d4[1]}, [r4] @ encoding: [0xa4,0xf9,0xcf,0x0a] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d2[1], d4[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d2[1], d4[1]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d2[1], d4[1]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d2[1], d4[1]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d2[1], d4[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld3.32 {d0[1], d2[1], d4[1]}, [r4]! + vld3.32 {d0[1], d2[1], d4[1]}, [r4:16]! + vld3.32 {d0[1], d2[1], d4[1]}, [r4:32]! + vld3.32 {d0[1], d2[1], d4[1]}, [r4:64]! + vld3.32 {d0[1], d2[1], d4[1]}, [r4:128]! + vld3.32 {d0[1], d2[1], d4[1]}, [r4:256]! + +@ CHECK: vld3.32 {d0[1], d2[1], d4[1]}, [r4]! @ encoding: [0xa4,0xf9,0xcd,0x0a] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d2[1], d4[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d2[1], d4[1]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d2[1], d4[1]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d2[1], d4[1]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d2[1], d4[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld3.32 {d0[1], d2[1], d4[1]}, [r4], r6 + vld3.32 {d0[1], d2[1], d4[1]}, [r4:16], r6 + vld3.32 {d0[1], d2[1], d4[1]}, [r4:32], r6 + vld3.32 {d0[1], d2[1], d4[1]}, [r4:64], r6 + vld3.32 {d0[1], d2[1], d4[1]}, [r4:128], r6 + vld3.32 {d0[1], d2[1], d4[1]}, [r4:256], r6 + +@ CHECK: vld3.32 {d0[1], d2[1], d4[1]}, [r4], r6 @ encoding: [0xa4,0xf9,0xc6,0x0a] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d2[1], d4[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d2[1], d4[1]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d2[1], d4[1]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d2[1], d4[1]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[1], d2[1], d4[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld3.32 {d0[], d1[], d2[]}, [r4] + vld3.32 {d0[], d1[], d2[]}, [r4:16] + vld3.32 {d0[], d1[], d2[]}, [r4:32] + vld3.32 {d0[], d1[], d2[]}, [r4:64] + vld3.32 {d0[], d1[], d2[]}, [r4:128] + vld3.32 {d0[], d1[], d2[]}, [r4:256] + +@ CHECK: vld3.32 {d0[], d1[], d2[]}, [r4] @ encoding: [0xa4,0xf9,0x8f,0x0e] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d1[], d2[]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d1[], d2[]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d1[], d2[]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d1[], d2[]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d1[], d2[]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld3.32 {d0[], d1[], d2[]}, [r4]! + vld3.32 {d0[], d1[], d2[]}, [r4:16]! + vld3.32 {d0[], d1[], d2[]}, [r4:32]! + vld3.32 {d0[], d1[], d2[]}, [r4:64]! + vld3.32 {d0[], d1[], d2[]}, [r4:128]! + vld3.32 {d0[], d1[], d2[]}, [r4:256]! + +@ CHECK: vld3.32 {d0[], d1[], d2[]}, [r4]! @ encoding: [0xa4,0xf9,0x8d,0x0e] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d1[], d2[]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d1[], d2[]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d1[], d2[]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d1[], d2[]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d1[], d2[]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld3.32 {d0[], d1[], d2[]}, [r4], r6 + vld3.32 {d0[], d1[], d2[]}, [r4:16], r6 + vld3.32 {d0[], d1[], d2[]}, [r4:32], r6 + vld3.32 {d0[], d1[], d2[]}, [r4:64], r6 + vld3.32 {d0[], d1[], d2[]}, [r4:128], r6 + vld3.32 {d0[], d1[], d2[]}, [r4:256], r6 + +@ CHECK: vld3.32 {d0[], d1[], d2[]}, [r4], r6 @ encoding: [0xa4,0xf9,0x86,0x0e] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d1[], d2[]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d1[], d2[]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d1[], d2[]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d1[], d2[]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d1[], d2[]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld3.32 {d0[], d2[], d4[]}, [r4] + vld3.32 {d0[], d2[], d4[]}, [r4:16] + vld3.32 {d0[], d2[], d4[]}, [r4:32] + vld3.32 {d0[], d2[], d4[]}, [r4:64] + vld3.32 {d0[], d2[], d4[]}, [r4:128] + vld3.32 {d0[], d2[], d4[]}, [r4:256] + +@ CHECK: vld3.32 {d0[], d2[], d4[]}, [r4] @ encoding: [0xa4,0xf9,0xaf,0x0e] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d2[], d4[]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d2[], d4[]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d2[], d4[]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d2[], d4[]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d2[], d4[]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld3.32 {d0[], d2[], d4[]}, [r4]! + vld3.32 {d0[], d2[], d4[]}, [r4:16]! + vld3.32 {d0[], d2[], d4[]}, [r4:32]! + vld3.32 {d0[], d2[], d4[]}, [r4:64]! + vld3.32 {d0[], d2[], d4[]}, [r4:128]! + vld3.32 {d0[], d2[], d4[]}, [r4:256]! + +@ CHECK: vld3.32 {d0[], d2[], d4[]}, [r4]! @ encoding: [0xa4,0xf9,0xad,0x0e] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d2[], d4[]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d2[], d4[]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d2[], d4[]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d2[], d4[]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d2[], d4[]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld3.32 {d0[], d2[], d4[]}, [r4], r6 + vld3.32 {d0[], d2[], d4[]}, [r4:16], r6 + vld3.32 {d0[], d2[], d4[]}, [r4:32], r6 + vld3.32 {d0[], d2[], d4[]}, [r4:64], r6 + vld3.32 {d0[], d2[], d4[]}, [r4:128], r6 + vld3.32 {d0[], d2[], d4[]}, [r4:256], r6 + +@ CHECK: vld3.32 {d0[], d2[], d4[]}, [r4], r6 @ encoding: [0xa4,0xf9,0xa6,0x0e] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d2[], d4[]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d2[], d4[]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d2[], d4[]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d2[], d4[]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vld3.32 {d0[], d2[], d4[]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld4.8 {d0, d1, d2, d3}, [r4] + vld4.8 {d0, d1, d2, d3}, [r4:16] + vld4.8 {d0, d1, d2, d3}, [r4:32] + vld4.8 {d0, d1, d2, d3}, [r4:64] + vld4.8 {d0, d1, d2, d3}, [r4:128] + vld4.8 {d0, d1, d2, d3}, [r4:256] + +@ CHECK: vld4.8 {d0, d1, d2, d3}, [r4] @ encoding: [0x24,0xf9,0x0f,0x00] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.8 {d0, d1, d2, d3}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.8 {d0, d1, d2, d3}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld4.8 {d0, d1, d2, d3}, [r4:64] @ encoding: [0x24,0xf9,0x1f,0x00] +@ CHECK: vld4.8 {d0, d1, d2, d3}, [r4:128] @ encoding: [0x24,0xf9,0x2f,0x00] +@ CHECK: vld4.8 {d0, d1, d2, d3}, [r4:256] @ encoding: [0x24,0xf9,0x3f,0x00] + + vld4.8 {d0, d1, d2, d3}, [r4]! + vld4.8 {d0, d1, d2, d3}, [r4:16]! + vld4.8 {d0, d1, d2, d3}, [r4:32]! + vld4.8 {d0, d1, d2, d3}, [r4:64]! + vld4.8 {d0, d1, d2, d3}, [r4:128]! + vld4.8 {d0, d1, d2, d3}, [r4:256]! + +@ CHECK: vld4.8 {d0, d1, d2, d3}, [r4]! @ encoding: [0x24,0xf9,0x0d,0x00] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.8 {d0, d1, d2, d3}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.8 {d0, d1, d2, d3}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld4.8 {d0, d1, d2, d3}, [r4:64]! @ encoding: [0x24,0xf9,0x1d,0x00] +@ CHECK: vld4.8 {d0, d1, d2, d3}, [r4:128]! @ encoding: [0x24,0xf9,0x2d,0x00] +@ CHECK: vld4.8 {d0, d1, d2, d3}, [r4:256]! @ encoding: [0x24,0xf9,0x3d,0x00] + + vld4.8 {d0, d1, d2, d3}, [r4], r6 + vld4.8 {d0, d1, d2, d3}, [r4:16], r6 + vld4.8 {d0, d1, d2, d3}, [r4:32], r6 + vld4.8 {d0, d1, d2, d3}, [r4:64], r6 + vld4.8 {d0, d1, d2, d3}, [r4:128], r6 + vld4.8 {d0, d1, d2, d3}, [r4:256], r6 + +@ CHECK: vld4.8 {d0, d1, d2, d3}, [r4], r6 @ encoding: [0x24,0xf9,0x06,0x00] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.8 {d0, d1, d2, d3}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.8 {d0, d1, d2, d3}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld4.8 {d0, d1, d2, d3}, [r4:64], r6 @ encoding: [0x24,0xf9,0x16,0x00] +@ CHECK: vld4.8 {d0, d1, d2, d3}, [r4:128], r6 @ encoding: [0x24,0xf9,0x26,0x00] +@ CHECK: vld4.8 {d0, d1, d2, d3}, [r4:256], r6 @ encoding: [0x24,0xf9,0x36,0x00] + + vld4.8 {d0, d2, d4, d6}, [r4] + vld4.8 {d0, d2, d4, d6}, [r4:16] + vld4.8 {d0, d2, d4, d6}, [r4:32] + vld4.8 {d0, d2, d4, d6}, [r4:64] + vld4.8 {d0, d2, d4, d6}, [r4:128] + vld4.8 {d0, d2, d4, d6}, [r4:256] + +@ CHECK: vld4.8 {d0, d2, d4, d6}, [r4] @ encoding: [0x24,0xf9,0x0f,0x01] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.8 {d0, d2, d4, d6}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.8 {d0, d2, d4, d6}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld4.8 {d0, d2, d4, d6}, [r4:64] @ encoding: [0x24,0xf9,0x1f,0x01] +@ CHECK: vld4.8 {d0, d2, d4, d6}, [r4:128] @ encoding: [0x24,0xf9,0x2f,0x01] +@ CHECK: vld4.8 {d0, d2, d4, d6}, [r4:256] @ encoding: [0x24,0xf9,0x3f,0x01] + + vld4.8 {d0, d2, d4, d6}, [r4]! + vld4.8 {d0, d2, d4, d6}, [r4:16]! + vld4.8 {d0, d2, d4, d6}, [r4:32]! + vld4.8 {d0, d2, d4, d6}, [r4:64]! + vld4.8 {d0, d2, d4, d6}, [r4:128]! + vld4.8 {d0, d2, d4, d6}, [r4:256]! + +@ CHECK: vld4.8 {d0, d2, d4, d6}, [r4]! @ encoding: [0x24,0xf9,0x0d,0x01] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.8 {d0, d2, d4, d6}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.8 {d0, d2, d4, d6}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld4.8 {d0, d2, d4, d6}, [r4:64]! @ encoding: [0x24,0xf9,0x1d,0x01] +@ CHECK: vld4.8 {d0, d2, d4, d6}, [r4:128]! @ encoding: [0x24,0xf9,0x2d,0x01] +@ CHECK: vld4.8 {d0, d2, d4, d6}, [r4:256]! @ encoding: [0x24,0xf9,0x3d,0x01] + + vld4.8 {d0, d2, d4, d6}, [r4], r6 + vld4.8 {d0, d2, d4, d6}, [r4:16], r6 + vld4.8 {d0, d2, d4, d6}, [r4:32], r6 + vld4.8 {d0, d2, d4, d6}, [r4:64], r6 + vld4.8 {d0, d2, d4, d6}, [r4:128], r6 + vld4.8 {d0, d2, d4, d6}, [r4:256], r6 + +@ CHECK: vld4.8 {d0, d2, d4, d6}, [r4], r6 @ encoding: [0x24,0xf9,0x06,0x01] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.8 {d0, d2, d4, d6}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.8 {d0, d2, d4, d6}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld4.8 {d0, d2, d4, d6}, [r4:64], r6 @ encoding: [0x24,0xf9,0x16,0x01] +@ CHECK: vld4.8 {d0, d2, d4, d6}, [r4:128], r6 @ encoding: [0x24,0xf9,0x26,0x01] +@ CHECK: vld4.8 {d0, d2, d4, d6}, [r4:256], r6 @ encoding: [0x24,0xf9,0x36,0x01] + + vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4] + vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:16] + vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:32] + vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:64] + vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:128] + vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:256] + +@ CHECK: vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4] @ encoding: [0xa4,0xf9,0x2f,0x03] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK: vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:32] @ encoding: [0xa4,0xf9,0x3f,0x03] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4]! + vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:16]! + vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:32]! + vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:64]! + vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:128]! + vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:256]! + +@ CHECK: vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4]! @ encoding: [0xa4,0xf9,0x2d,0x03] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK: vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:32]! @ encoding: [0xa4,0xf9,0x3d,0x03] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4], r6 + vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:16], r6 + vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:32], r6 + vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:64], r6 + vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:128], r6 + vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:256], r6 + +@ CHECK: vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4], r6 @ encoding: [0xa4,0xf9,0x26,0x03] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:32], r6 @ encoding: [0xa4,0xf9,0x36,0x03] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld4.8 {d0[], d1[], d2[], d3[]}, [r4] + vld4.8 {d0[], d1[], d2[], d3[]}, [r4:16] + vld4.8 {d0[], d1[], d2[], d3[]}, [r4:32] + vld4.8 {d0[], d1[], d2[], d3[]}, [r4:64] + vld4.8 {d0[], d1[], d2[], d3[]}, [r4:128] + vld4.8 {d0[], d1[], d2[], d3[]}, [r4:256] + +@ CHECK: vld4.8 {d0[], d1[], d2[], d3[]}, [r4] @ encoding: [0xa4,0xf9,0x0f,0x0f] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[], d1[], d2[], d3[]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK: vld4.8 {d0[], d1[], d2[], d3[]}, [r4:32] @ encoding: [0xa4,0xf9,0x1f,0x0f] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[], d1[], d2[], d3[]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[], d1[], d2[], d3[]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[], d1[], d2[], d3[]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld4.8 {d0[], d1[], d2[], d3[]}, [r4]! + vld4.8 {d0[], d1[], d2[], d3[]}, [r4:16]! + vld4.8 {d0[], d1[], d2[], d3[]}, [r4:32]! + vld4.8 {d0[], d1[], d2[], d3[]}, [r4:64]! + vld4.8 {d0[], d1[], d2[], d3[]}, [r4:128]! + vld4.8 {d0[], d1[], d2[], d3[]}, [r4:256]! + +@ CHECK: vld4.8 {d0[], d1[], d2[], d3[]}, [r4]! @ encoding: [0xa4,0xf9,0x0d,0x0f] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[], d1[], d2[], d3[]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK: vld4.8 {d0[], d1[], d2[], d3[]}, [r4:32]! @ encoding: [0xa4,0xf9,0x1d,0x0f] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[], d1[], d2[], d3[]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[], d1[], d2[], d3[]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[], d1[], d2[], d3[]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld4.8 {d0[], d1[], d2[], d3[]}, [r4], r6 + vld4.8 {d0[], d1[], d2[], d3[]}, [r4:16], r6 + vld4.8 {d0[], d1[], d2[], d3[]}, [r4:32], r6 + vld4.8 {d0[], d1[], d2[], d3[]}, [r4:64], r6 + vld4.8 {d0[], d1[], d2[], d3[]}, [r4:128], r6 + vld4.8 {d0[], d1[], d2[], d3[]}, [r4:256], r6 + +@ CHECK: vld4.8 {d0[], d1[], d2[], d3[]}, [r4], r6 @ encoding: [0xa4,0xf9,0x06,0x0f] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[], d1[], d2[], d3[]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld4.8 {d0[], d1[], d2[], d3[]}, [r4:32], r6 @ encoding: [0xa4,0xf9,0x16,0x0f] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[], d1[], d2[], d3[]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[], d1[], d2[], d3[]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[], d1[], d2[], d3[]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld4.8 {d0[], d2[], d4[], d6[]}, [r4] + vld4.8 {d0[], d2[], d4[], d6[]}, [r4:16] + vld4.8 {d0[], d2[], d4[], d6[]}, [r4:32] + vld4.8 {d0[], d2[], d4[], d6[]}, [r4:64] + vld4.8 {d0[], d2[], d4[], d6[]}, [r4:128] + vld4.8 {d0[], d2[], d4[], d6[]}, [r4:256] + +@ CHECK: vld4.8 {d0[], d2[], d4[], d6[]}, [r4] @ encoding: [0xa4,0xf9,0x2f,0x0f] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[], d2[], d4[], d6[]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK: vld4.8 {d0[], d2[], d4[], d6[]}, [r4:32] @ encoding: [0xa4,0xf9,0x3f,0x0f] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[], d2[], d4[], d6[]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[], d2[], d4[], d6[]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[], d2[], d4[], d6[]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld4.8 {d0[], d2[], d4[], d6[]}, [r4]! + vld4.8 {d0[], d2[], d4[], d6[]}, [r4:16]! + vld4.8 {d0[], d2[], d4[], d6[]}, [r4:32]! + vld4.8 {d0[], d2[], d4[], d6[]}, [r4:64]! + vld4.8 {d0[], d2[], d4[], d6[]}, [r4:128]! + vld4.8 {d0[], d2[], d4[], d6[]}, [r4:256]! + +@ CHECK: vld4.8 {d0[], d1[], d2[], d3[]}, [r4]! @ encoding: [0xa4,0xf9,0x2d,0x0f] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[], d2[], d4[], d6[]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK: vld4.8 {d0[], d1[], d2[], d3[]}, [r4:32]! @ encoding: [0xa4,0xf9,0x3d,0x0f] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[], d2[], d4[], d6[]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[], d2[], d4[], d6[]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[], d2[], d4[], d6[]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld4.8 {d0[], d2[], d4[], d6[]}, [r4], r6 + vld4.8 {d0[], d2[], d4[], d6[]}, [r4:16], r6 + vld4.8 {d0[], d2[], d4[], d6[]}, [r4:32], r6 + vld4.8 {d0[], d2[], d4[], d6[]}, [r4:64], r6 + vld4.8 {d0[], d2[], d4[], d6[]}, [r4:128], r6 + vld4.8 {d0[], d2[], d4[], d6[]}, [r4:256], r6 + +@ CHECK: vld4.8 {d0[], d2[], d4[], d6[]}, [r4], r6 @ encoding: [0xa4,0xf9,0x26,0x0f] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[], d2[], d4[], d6[]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld4.8 {d0[], d2[], d4[], d6[]}, [r4:32], r6 @ encoding: [0xa4,0xf9,0x36,0x0f] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[], d2[], d4[], d6[]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[], d2[], d4[], d6[]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vld4.8 {d0[], d2[], d4[], d6[]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld4.16 {d0, d1, d2, d3}, [r4] + vld4.16 {d0, d1, d2, d3}, [r4:16] + vld4.16 {d0, d1, d2, d3}, [r4:32] + vld4.16 {d0, d1, d2, d3}, [r4:64] + vld4.16 {d0, d1, d2, d3}, [r4:128] + vld4.16 {d0, d1, d2, d3}, [r4:256] + +@ CHECK: vld4.16 {d0, d1, d2, d3}, [r4] @ encoding: [0x24,0xf9,0x4f,0x00] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.16 {d0, d1, d2, d3}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.16 {d0, d1, d2, d3}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld4.16 {d0, d1, d2, d3}, [r4:64] @ encoding: [0x24,0xf9,0x5f,0x00] +@ CHECK: vld4.16 {d0, d1, d2, d3}, [r4:128] @ encoding: [0x24,0xf9,0x6f,0x00] +@ CHECK: vld4.16 {d0, d1, d2, d3}, [r4:256] @ encoding: [0x24,0xf9,0x7f,0x00] + + vld4.16 {d0, d1, d2, d3}, [r4]! + vld4.16 {d0, d1, d2, d3}, [r4:16]! + vld4.16 {d0, d1, d2, d3}, [r4:32]! + vld4.16 {d0, d1, d2, d3}, [r4:64]! + vld4.16 {d0, d1, d2, d3}, [r4:128]! + vld4.16 {d0, d1, d2, d3}, [r4:256]! + +@ CHECK: vld4.16 {d0, d1, d2, d3}, [r4]! @ encoding: [0x24,0xf9,0x4d,0x00] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.16 {d0, d1, d2, d3}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.16 {d0, d1, d2, d3}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld4.16 {d0, d1, d2, d3}, [r4:64]! @ encoding: [0x24,0xf9,0x5d,0x00] +@ CHECK: vld4.16 {d0, d1, d2, d3}, [r4:128]! @ encoding: [0x24,0xf9,0x6d,0x00] +@ CHECK: vld4.16 {d0, d1, d2, d3}, [r4:256]! @ encoding: [0x24,0xf9,0x7d,0x00] + + vld4.16 {d0, d1, d2, d3}, [r4], r6 + vld4.16 {d0, d1, d2, d3}, [r4:16], r6 + vld4.16 {d0, d1, d2, d3}, [r4:32], r6 + vld4.16 {d0, d1, d2, d3}, [r4:64], r6 + vld4.16 {d0, d1, d2, d3}, [r4:128], r6 + vld4.16 {d0, d1, d2, d3}, [r4:256], r6 + +@ CHECK: vld4.16 {d0, d1, d2, d3}, [r4], r6 @ encoding: [0x24,0xf9,0x46,0x00] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.16 {d0, d1, d2, d3}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.16 {d0, d1, d2, d3}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld4.16 {d0, d1, d2, d3}, [r4:64], r6 @ encoding: [0x24,0xf9,0x56,0x00] +@ CHECK: vld4.16 {d0, d1, d2, d3}, [r4:128], r6 @ encoding: [0x24,0xf9,0x66,0x00] +@ CHECK: vld4.16 {d0, d1, d2, d3}, [r4:256], r6 @ encoding: [0x24,0xf9,0x76,0x00] + + vld4.16 {d0, d2, d4, d6}, [r4] + vld4.16 {d0, d2, d4, d6}, [r4:16] + vld4.16 {d0, d2, d4, d6}, [r4:32] + vld4.16 {d0, d2, d4, d6}, [r4:64] + vld4.16 {d0, d2, d4, d6}, [r4:128] + vld4.16 {d0, d2, d4, d6}, [r4:256] + +@ CHECK: vld4.16 {d0, d2, d4, d6}, [r4] @ encoding: [0x24,0xf9,0x4f,0x01] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.16 {d0, d2, d4, d6}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.16 {d0, d2, d4, d6}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld4.16 {d0, d2, d4, d6}, [r4:64] @ encoding: [0x24,0xf9,0x5f,0x01] +@ CHECK: vld4.16 {d0, d2, d4, d6}, [r4:128] @ encoding: [0x24,0xf9,0x6f,0x01] +@ CHECK: vld4.16 {d0, d2, d4, d6}, [r4:256] @ encoding: [0x24,0xf9,0x7f,0x01] + + vld4.16 {d0, d2, d4, d6}, [r4]! + vld4.16 {d0, d2, d4, d6}, [r4:16]! + vld4.16 {d0, d2, d4, d6}, [r4:32]! + vld4.16 {d0, d2, d4, d6}, [r4:64]! + vld4.16 {d0, d2, d4, d6}, [r4:128]! + vld4.16 {d0, d2, d4, d6}, [r4:256]! + +@ CHECK: vld4.16 {d0, d2, d4, d6}, [r4]! @ encoding: [0x24,0xf9,0x4d,0x01] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.16 {d0, d2, d4, d6}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.16 {d0, d2, d4, d6}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld4.16 {d0, d2, d4, d6}, [r4:64]! @ encoding: [0x24,0xf9,0x5d,0x01] +@ CHECK: vld4.16 {d0, d2, d4, d6}, [r4:128]! @ encoding: [0x24,0xf9,0x6d,0x01] +@ CHECK: vld4.16 {d0, d2, d4, d6}, [r4:256]! @ encoding: [0x24,0xf9,0x7d,0x01] + + vld4.16 {d0, d2, d4, d6}, [r4], r6 + vld4.16 {d0, d2, d4, d6}, [r4:16], r6 + vld4.16 {d0, d2, d4, d6}, [r4:32], r6 + vld4.16 {d0, d2, d4, d6}, [r4:64], r6 + vld4.16 {d0, d2, d4, d6}, [r4:128], r6 + vld4.16 {d0, d2, d4, d6}, [r4:256], r6 + +@ CHECK: vld4.16 {d0, d2, d4, d6}, [r4], r6 @ encoding: [0x24,0xf9,0x46,0x01] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.16 {d0, d2, d4, d6}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.16 {d0, d2, d4, d6}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld4.16 {d0, d2, d4, d6}, [r4:64], r6 @ encoding: [0x24,0xf9,0x56,0x01] +@ CHECK: vld4.16 {d0, d2, d4, d6}, [r4:128], r6 @ encoding: [0x24,0xf9,0x66,0x01] +@ CHECK: vld4.16 {d0, d2, d4, d6}, [r4:256], r6 @ encoding: [0x24,0xf9,0x76,0x01] + + vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4] + vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:16] + vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:32] + vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:64] + vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:128] + vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:256] + +@ CHECK: vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4] @ encoding: [0xa4,0xf9,0x4f,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:64] @ encoding: [0xa4,0xf9,0x5f,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4]! + vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:16]! + vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:32]! + vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:64]! + vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:128]! + vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:256]! + +@ CHECK: vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4]! @ encoding: [0xa4,0xf9,0x4d,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:64]! @ encoding: [0xa4,0xf9,0x5d,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4], r6 + vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:16], r6 + vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:32], r6 + vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:64], r6 + vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:128], r6 + vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:256], r6 + +@ CHECK: vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4], r6 @ encoding: [0xa4,0xf9,0x46,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:64], r6 @ encoding: [0xa4,0xf9,0x56,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4] + vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:16] + vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:32] + vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:64] + vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:128] + vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:256] + +@ CHECK: vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4] @ encoding: [0xa4,0xf9,0x6f,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:64] @ encoding: [0xa4,0xf9,0x7f,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4]! + vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:16]! + vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:32]! + vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:64]! + vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:128]! + vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:256]! + +@ CHECK: vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4]! @ encoding: [0xa4,0xf9,0x6d,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:64]! @ encoding: [0xa4,0xf9,0x7d,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4], r6 + vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:16], r6 + vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:32], r6 + vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:64], r6 + vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:128], r6 + vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:256], r6 + +@ CHECK: vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4], r6 @ encoding: [0xa4,0xf9,0x66,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:64], r6 @ encoding: [0xa4,0xf9,0x76,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld4.16 {d0[], d1[], d2[], d3[]}, [r4] + vld4.16 {d0[], d1[], d2[], d3[]}, [r4:16] + vld4.16 {d0[], d1[], d2[], d3[]}, [r4:32] + vld4.16 {d0[], d1[], d2[], d3[]}, [r4:64] + vld4.16 {d0[], d1[], d2[], d3[]}, [r4:128] + vld4.16 {d0[], d1[], d2[], d3[]}, [r4:256] + +@ CHECK: vld4.16 {d0[], d1[], d2[], d3[]}, [r4] @ encoding: [0xa4,0xf9,0x4f,0x0f] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[], d1[], d2[], d3[]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[], d1[], d2[], d3[]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld4.16 {d0[], d1[], d2[], d3[]}, [r4:64] @ encoding: [0xa4,0xf9,0x5f,0x0f] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[], d1[], d2[], d3[]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[], d1[], d2[], d3[]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld4.16 {d0[], d1[], d2[], d3[]}, [r4]! + vld4.16 {d0[], d1[], d2[], d3[]}, [r4:16]! + vld4.16 {d0[], d1[], d2[], d3[]}, [r4:32]! + vld4.16 {d0[], d1[], d2[], d3[]}, [r4:64]! + vld4.16 {d0[], d1[], d2[], d3[]}, [r4:128]! + vld4.16 {d0[], d1[], d2[], d3[]}, [r4:256]! + +@ CHECK: vld4.16 {d0[], d1[], d2[], d3[]}, [r4]! @ encoding: [0xa4,0xf9,0x4d,0x0f] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[], d1[], d2[], d3[]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[], d1[], d2[], d3[]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld4.16 {d0[], d1[], d2[], d3[]}, [r4:64]! @ encoding: [0xa4,0xf9,0x5d,0x0f] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[], d1[], d2[], d3[]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[], d1[], d2[], d3[]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld4.16 {d0[], d1[], d2[], d3[]}, [r4], r6 + vld4.16 {d0[], d1[], d2[], d3[]}, [r4:16], r6 + vld4.16 {d0[], d1[], d2[], d3[]}, [r4:32], r6 + vld4.16 {d0[], d1[], d2[], d3[]}, [r4:64], r6 + vld4.16 {d0[], d1[], d2[], d3[]}, [r4:128], r6 + vld4.16 {d0[], d1[], d2[], d3[]}, [r4:256], r6 + +@ CHECK: vld4.16 {d0[], d1[], d2[], d3[]}, [r4], r6 @ encoding: [0xa4,0xf9,0x46,0x0f] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[], d1[], d2[], d3[]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[], d1[], d2[], d3[]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld4.16 {d0[], d1[], d2[], d3[]}, [r4:64], r6 @ encoding: [0xa4,0xf9,0x56,0x0f] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[], d1[], d2[], d3[]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[], d1[], d2[], d3[]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld4.16 {d0[], d2[], d4[], d6[]}, [r4] + vld4.16 {d0[], d2[], d4[], d6[]}, [r4:16] + vld4.16 {d0[], d2[], d4[], d6[]}, [r4:32] + vld4.16 {d0[], d2[], d4[], d6[]}, [r4:64] + vld4.16 {d0[], d2[], d4[], d6[]}, [r4:128] + vld4.16 {d0[], d2[], d4[], d6[]}, [r4:256] + +@ CHECK: vld4.16 {d0[], d2[], d4[], d6[]}, [r4] @ encoding: [0xa4,0xf9,0x6f,0x0f] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[], d2[], d4[], d6[]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[], d2[], d4[], d6[]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld4.16 {d0[], d2[], d4[], d6[]}, [r4:64] @ encoding: [0xa4,0xf9,0x7f,0x0f] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[], d2[], d4[], d6[]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[], d2[], d4[], d6[]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld4.16 {d0[], d2[], d4[], d6[]}, [r4]! + vld4.16 {d0[], d2[], d4[], d6[]}, [r4:16]! + vld4.16 {d0[], d2[], d4[], d6[]}, [r4:32]! + vld4.16 {d0[], d2[], d4[], d6[]}, [r4:64]! + vld4.16 {d0[], d2[], d4[], d6[]}, [r4:128]! + vld4.16 {d0[], d2[], d4[], d6[]}, [r4:256]! + +@ CHECK: vld4.16 {d0[], d1[], d2[], d3[]}, [r4]! @ encoding: [0xa4,0xf9,0x6d,0x0f] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[], d2[], d4[], d6[]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[], d2[], d4[], d6[]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld4.16 {d0[], d1[], d2[], d3[]}, [r4:64]! @ encoding: [0xa4,0xf9,0x7d,0x0f] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[], d2[], d4[], d6[]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[], d2[], d4[], d6[]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld4.16 {d0[], d2[], d4[], d6[]}, [r4], r6 + vld4.16 {d0[], d2[], d4[], d6[]}, [r4:16], r6 + vld4.16 {d0[], d2[], d4[], d6[]}, [r4:32], r6 + vld4.16 {d0[], d2[], d4[], d6[]}, [r4:64], r6 + vld4.16 {d0[], d2[], d4[], d6[]}, [r4:128], r6 + vld4.16 {d0[], d2[], d4[], d6[]}, [r4:256], r6 + +@ CHECK: vld4.16 {d0[], d2[], d4[], d6[]}, [r4], r6 @ encoding: [0xa4,0xf9,0x66,0x0f] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[], d2[], d4[], d6[]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[], d2[], d4[], d6[]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld4.16 {d0[], d2[], d4[], d6[]}, [r4:64], r6 @ encoding: [0xa4,0xf9,0x76,0x0f] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[], d2[], d4[], d6[]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vld4.16 {d0[], d2[], d4[], d6[]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld4.32 {d0, d1, d2, d3}, [r4] + vld4.32 {d0, d1, d2, d3}, [r4:16] + vld4.32 {d0, d1, d2, d3}, [r4:32] + vld4.32 {d0, d1, d2, d3}, [r4:64] + vld4.32 {d0, d1, d2, d3}, [r4:128] + vld4.32 {d0, d1, d2, d3}, [r4:256] + +@ CHECK: vld4.32 {d0, d1, d2, d3}, [r4] @ encoding: [0x24,0xf9,0x8f,0x00] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.32 {d0, d1, d2, d3}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.32 {d0, d1, d2, d3}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld4.32 {d0, d1, d2, d3}, [r4:64] @ encoding: [0x24,0xf9,0x9f,0x00] +@ CHECK: vld4.32 {d0, d1, d2, d3}, [r4:128] @ encoding: [0x24,0xf9,0xaf,0x00] +@ CHECK: vld4.32 {d0, d1, d2, d3}, [r4:256] @ encoding: [0x24,0xf9,0xbf,0x00] + + vld4.32 {d0, d1, d2, d3}, [r4]! + vld4.32 {d0, d1, d2, d3}, [r4:16]! + vld4.32 {d0, d1, d2, d3}, [r4:32]! + vld4.32 {d0, d1, d2, d3}, [r4:64]! + vld4.32 {d0, d1, d2, d3}, [r4:128]! + vld4.32 {d0, d1, d2, d3}, [r4:256]! + +@ CHECK: vld4.32 {d0, d1, d2, d3}, [r4]! @ encoding: [0x24,0xf9,0x8d,0x00] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.32 {d0, d1, d2, d3}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.32 {d0, d1, d2, d3}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld4.32 {d0, d1, d2, d3}, [r4:64]! @ encoding: [0x24,0xf9,0x9d,0x00] +@ CHECK: vld4.32 {d0, d1, d2, d3}, [r4:128]! @ encoding: [0x24,0xf9,0xad,0x00] +@ CHECK: vld4.32 {d0, d1, d2, d3}, [r4:256]! @ encoding: [0x24,0xf9,0xbd,0x00] + + vld4.32 {d0, d1, d2, d3}, [r4], r6 + vld4.32 {d0, d1, d2, d3}, [r4:16], r6 + vld4.32 {d0, d1, d2, d3}, [r4:32], r6 + vld4.32 {d0, d1, d2, d3}, [r4:64], r6 + vld4.32 {d0, d1, d2, d3}, [r4:128], r6 + vld4.32 {d0, d1, d2, d3}, [r4:256], r6 + +@ CHECK: vld4.32 {d0, d1, d2, d3}, [r4], r6 @ encoding: [0x24,0xf9,0x86,0x00] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.32 {d0, d1, d2, d3}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.32 {d0, d1, d2, d3}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld4.32 {d0, d1, d2, d3}, [r4:64], r6 @ encoding: [0x24,0xf9,0x96,0x00] +@ CHECK: vld4.32 {d0, d1, d2, d3}, [r4:128], r6 @ encoding: [0x24,0xf9,0xa6,0x00] +@ CHECK: vld4.32 {d0, d1, d2, d3}, [r4:256], r6 @ encoding: [0x24,0xf9,0xb6,0x00] + + vld4.32 {d0, d2, d4, d6}, [r4] + vld4.32 {d0, d2, d4, d6}, [r4:16] + vld4.32 {d0, d2, d4, d6}, [r4:32] + vld4.32 {d0, d2, d4, d6}, [r4:64] + vld4.32 {d0, d2, d4, d6}, [r4:128] + vld4.32 {d0, d2, d4, d6}, [r4:256] + +@ CHECK: vld4.32 {d0, d2, d4, d6}, [r4] @ encoding: [0x24,0xf9,0x8f,0x01] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.32 {d0, d2, d4, d6}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.32 {d0, d2, d4, d6}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld4.32 {d0, d2, d4, d6}, [r4:64] @ encoding: [0x24,0xf9,0x9f,0x01] +@ CHECK: vld4.32 {d0, d2, d4, d6}, [r4:128] @ encoding: [0x24,0xf9,0xaf,0x01] +@ CHECK: vld4.32 {d0, d2, d4, d6}, [r4:256] @ encoding: [0x24,0xf9,0xbf,0x01] + + vld4.32 {d0, d2, d4, d6}, [r4]! + vld4.32 {d0, d2, d4, d6}, [r4:16]! + vld4.32 {d0, d2, d4, d6}, [r4:32]! + vld4.32 {d0, d2, d4, d6}, [r4:64]! + vld4.32 {d0, d2, d4, d6}, [r4:128]! + vld4.32 {d0, d2, d4, d6}, [r4:256]! + +@ CHECK: vld4.32 {d0, d2, d4, d6}, [r4]! @ encoding: [0x24,0xf9,0x8d,0x01] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.32 {d0, d2, d4, d6}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.32 {d0, d2, d4, d6}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld4.32 {d0, d2, d4, d6}, [r4:64]! @ encoding: [0x24,0xf9,0x9d,0x01] +@ CHECK: vld4.32 {d0, d2, d4, d6}, [r4:128]! @ encoding: [0x24,0xf9,0xad,0x01] +@ CHECK: vld4.32 {d0, d2, d4, d6}, [r4:256]! @ encoding: [0x24,0xf9,0xbd,0x01] + + vld4.32 {d0, d2, d4, d6}, [r4], r6 + vld4.32 {d0, d2, d4, d6}, [r4:16], r6 + vld4.32 {d0, d2, d4, d6}, [r4:32], r6 + vld4.32 {d0, d2, d4, d6}, [r4:64], r6 + vld4.32 {d0, d2, d4, d6}, [r4:128], r6 + vld4.32 {d0, d2, d4, d6}, [r4:256], r6 + +@ CHECK: vld4.32 {d0, d2, d4, d6}, [r4], r6 @ encoding: [0x24,0xf9,0x86,0x01] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.32 {d0, d2, d4, d6}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vld4.32 {d0, d2, d4, d6}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld4.32 {d0, d2, d4, d6}, [r4:64], r6 @ encoding: [0x24,0xf9,0x96,0x01] +@ CHECK: vld4.32 {d0, d2, d4, d6}, [r4:128], r6 @ encoding: [0x24,0xf9,0xa6,0x01] +@ CHECK: vld4.32 {d0, d2, d4, d6}, [r4:256], r6 @ encoding: [0x24,0xf9,0xb6,0x01] + + vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4] + vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:16] + vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:32] + vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:64] + vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:128] + vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:256] + +@ CHECK: vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4] @ encoding: [0xa4,0xf9,0x8f,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:64] @ encoding: [0xa4,0xf9,0x9f,0x0b] +@ CHECK: vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:128] @ encoding: [0xa4,0xf9,0xaf,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4]! + vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:16]! + vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:32]! + vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:64]! + vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:128]! + vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:256]! + +@ CHECK: vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4]! @ encoding: [0xa4,0xf9,0x8d,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:64]! @ encoding: [0xa4,0xf9,0x9d,0x0b] +@ CHECK: vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:128]! @ encoding: [0xa4,0xf9,0xad,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4], r6 + vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:16], r6 + vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:32], r6 + vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:64], r6 + vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:128], r6 + vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:256], r6 + +@ CHECK: vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4], r6 @ encoding: [0xa4,0xf9,0x86,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:64], r6 @ encoding: [0xa4,0xf9,0x96,0x0b] +@ CHECK: vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:128], r6 @ encoding: [0xa4,0xf9,0xa6,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4] + vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:16] + vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:32] + vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:64] + vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:128] + vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:256] + +@ CHECK: vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4] @ encoding: [0xa4,0xf9,0xcf,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:64] @ encoding: [0xa4,0xf9,0xdf,0x0b] +@ CHECK: vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:128] @ encoding: [0xa4,0xf9,0xef,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4]! + vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:16]! + vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:32]! + vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:64]! + vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:128]! + vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:256]! + +@ CHECK: vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4]! @ encoding: [0xa4,0xf9,0xcd,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:64]! @ encoding: [0xa4,0xf9,0xdd,0x0b] +@ CHECK: vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:128]! @ encoding: [0xa4,0xf9,0xed,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4], r6 + vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:16], r6 + vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:32], r6 + vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:64], r6 + vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:128], r6 + vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:256], r6 + +@ CHECK: vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4], r6 @ encoding: [0xa4,0xf9,0xc6,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:64], r6 @ encoding: [0xa4,0xf9,0xd6,0x0b] +@ CHECK: vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:128], r6 @ encoding: [0xa4,0xf9,0xe6,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld4.32 {d0[], d1[], d2[], d3[]}, [r4] + vld4.32 {d0[], d1[], d2[], d3[]}, [r4:16] + vld4.32 {d0[], d1[], d2[], d3[]}, [r4:32] + vld4.32 {d0[], d1[], d2[], d3[]}, [r4:64] + vld4.32 {d0[], d1[], d2[], d3[]}, [r4:128] + vld4.32 {d0[], d1[], d2[], d3[]}, [r4:256] + +@ CHECK: vld4.32 {d0[], d1[], d2[], d3[]}, [r4] @ encoding: [0xa4,0xf9,0x8f,0x0f] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[], d1[], d2[], d3[]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[], d1[], d2[], d3[]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld4.32 {d0[], d1[], d2[], d3[]}, [r4:64] @ encoding: [0xa4,0xf9,0x9f,0x0f] +@ CHECK: vld4.32 {d0[], d1[], d2[], d3[]}, [r4:128] @ encoding: [0xa4,0xf9,0xdf,0x0f] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[], d1[], d2[], d3[]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld4.32 {d0[], d1[], d2[], d3[]}, [r4]! + vld4.32 {d0[], d1[], d2[], d3[]}, [r4:16]! + vld4.32 {d0[], d1[], d2[], d3[]}, [r4:32]! + vld4.32 {d0[], d1[], d2[], d3[]}, [r4:64]! + vld4.32 {d0[], d1[], d2[], d3[]}, [r4:128]! + vld4.32 {d0[], d1[], d2[], d3[]}, [r4:256]! + +@ CHECK: vld4.32 {d0[], d1[], d2[], d3[]}, [r4]! @ encoding: [0xa4,0xf9,0x8d,0x0f] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[], d1[], d2[], d3[]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[], d1[], d2[], d3[]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld4.32 {d0[], d1[], d2[], d3[]}, [r4:64]! @ encoding: [0xa4,0xf9,0x9d,0x0f] +@ CHECK: vld4.32 {d0[], d1[], d2[], d3[]}, [r4:128]! @ encoding: [0xa4,0xf9,0xdd,0x0f] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[], d1[], d2[], d3[]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld4.32 {d0[], d1[], d2[], d3[]}, [r4], r6 + vld4.32 {d0[], d1[], d2[], d3[]}, [r4:16], r6 + vld4.32 {d0[], d1[], d2[], d3[]}, [r4:32], r6 + vld4.32 {d0[], d1[], d2[], d3[]}, [r4:64], r6 + vld4.32 {d0[], d1[], d2[], d3[]}, [r4:128], r6 + vld4.32 {d0[], d1[], d2[], d3[]}, [r4:256], r6 + +@ CHECK: vld4.32 {d0[], d1[], d2[], d3[]}, [r4], r6 @ encoding: [0xa4,0xf9,0x86,0x0f] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[], d1[], d2[], d3[]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[], d1[], d2[], d3[]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld4.32 {d0[], d1[], d2[], d3[]}, [r4:64], r6 @ encoding: [0xa4,0xf9,0x96,0x0f] +@ CHECK: vld4.32 {d0[], d1[], d2[], d3[]}, [r4:128], r6 @ encoding: [0xa4,0xf9,0xd6,0x0f] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[], d1[], d2[], d3[]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vld4.32 {d0[], d2[], d4[], d6[]}, [r4] + vld4.32 {d0[], d2[], d4[], d6[]}, [r4:16] + vld4.32 {d0[], d2[], d4[], d6[]}, [r4:32] + vld4.32 {d0[], d2[], d4[], d6[]}, [r4:64] + vld4.32 {d0[], d2[], d4[], d6[]}, [r4:128] + vld4.32 {d0[], d2[], d4[], d6[]}, [r4:256] + +@ CHECK: vld4.32 {d0[], d2[], d4[], d6[]}, [r4] @ encoding: [0xa4,0xf9,0xaf,0x0f] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[], d2[], d4[], d6[]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[], d2[], d4[], d6[]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vld4.32 {d0[], d2[], d4[], d6[]}, [r4:64] @ encoding: [0xa4,0xf9,0xbf,0x0f] +@ CHECK: vld4.32 {d0[], d2[], d4[], d6[]}, [r4:128] @ encoding: [0xa4,0xf9,0xff,0x0f] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[], d2[], d4[], d6[]}, [r4:256] +@ CHECK-ERRORS: ^ + + vld4.32 {d0[], d2[], d4[], d6[]}, [r4]! + vld4.32 {d0[], d2[], d4[], d6[]}, [r4:16]! + vld4.32 {d0[], d2[], d4[], d6[]}, [r4:32]! + vld4.32 {d0[], d2[], d4[], d6[]}, [r4:64]! + vld4.32 {d0[], d2[], d4[], d6[]}, [r4:128]! + vld4.32 {d0[], d2[], d4[], d6[]}, [r4:256]! + +@ CHECK: vld4.32 {d0[], d2[], d4[], d6[]}, [r4]! @ encoding: [0xa4,0xf9,0xad,0x0f] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[], d2[], d4[], d6[]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[], d2[], d4[], d6[]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vld4.32 {d0[], d2[], d4[], d6[]}, [r4:64]! @ encoding: [0xa4,0xf9,0xbd,0x0f] +@ CHECK: vld4.32 {d0[], d2[], d4[], d6[]}, [r4:128]! @ encoding: [0xa4,0xf9,0xfd,0x0f] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[], d2[], d4[], d6[]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vld4.32 {d0[], d2[], d4[], d6[]}, [r4], r6 + vld4.32 {d0[], d2[], d4[], d6[]}, [r4:16], r6 + vld4.32 {d0[], d2[], d4[], d6[]}, [r4:32], r6 + vld4.32 {d0[], d2[], d4[], d6[]}, [r4:64], r6 + vld4.32 {d0[], d2[], d4[], d6[]}, [r4:128], r6 + vld4.32 {d0[], d2[], d4[], d6[]}, [r4:256], r6 + +@ CHECK: vld4.32 {d0[], d2[], d4[], d6[]}, [r4], r6 @ encoding: [0xa4,0xf9,0xa6,0x0f] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[], d2[], d4[], d6[]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[], d2[], d4[], d6[]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vld4.32 {d0[], d2[], d4[], d6[]}, [r4:64], r6 @ encoding: [0xa4,0xf9,0xb6,0x0f] +@ CHECK: vld4.32 {d0[], d2[], d4[], d6[]}, [r4:128], r6 @ encoding: [0xa4,0xf9,0xf6,0x0f] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vld4.32 {d0[], d2[], d4[], d6[]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst1.8 {d0}, [r4] + vst1.8 {d0}, [r4:16] + vst1.8 {d0}, [r4:32] + vst1.8 {d0}, [r4:64] + vst1.8 {d0}, [r4:128] + vst1.8 {d0}, [r4:256] + +@ CHECK: vst1.8 {d0}, [r4] @ encoding: [0x04,0xf9,0x0f,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.8 {d0}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.8 {d0}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst1.8 {d0}, [r4:64] @ encoding: [0x04,0xf9,0x1f,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.8 {d0}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.8 {d0}, [r4:256] +@ CHECK-ERRORS: ^ + + vst1.8 {d0}, [r4]! + vst1.8 {d0}, [r4:16]! + vst1.8 {d0}, [r4:32]! + vst1.8 {d0}, [r4:64]! + vst1.8 {d0}, [r4:128]! + vst1.8 {d0}, [r4:256]! + +@ CHECK: vst1.8 {d0}, [r4]! @ encoding: [0x04,0xf9,0x0d,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.8 {d0}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.8 {d0}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst1.8 {d0}, [r4:64]! @ encoding: [0x04,0xf9,0x1d,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.8 {d0}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.8 {d0}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst1.8 {d0}, [r4], r6 + vst1.8 {d0}, [r4:16], r6 + vst1.8 {d0}, [r4:32], r6 + vst1.8 {d0}, [r4:64], r6 + vst1.8 {d0}, [r4:128], r6 + vst1.8 {d0}, [r4:256], r6 + +@ CHECK: vst1.8 {d0}, [r4], r6 @ encoding: [0x04,0xf9,0x06,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.8 {d0}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.8 {d0}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst1.8 {d0}, [r4:64], r6 @ encoding: [0x04,0xf9,0x16,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.8 {d0}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.8 {d0}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst1.8 {d0, d1}, [r4] + vst1.8 {d0, d1}, [r4:16] + vst1.8 {d0, d1}, [r4:32] + vst1.8 {d0, d1}, [r4:64] + vst1.8 {d0, d1}, [r4:128] + vst1.8 {d0, d1}, [r4:256] + +@ CHECK: vst1.8 {d0, d1}, [r4] @ encoding: [0x04,0xf9,0x0f,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst1.8 {d0, d1}, [r4:64] @ encoding: [0x04,0xf9,0x1f,0x0a] +@ CHECK: vst1.8 {d0, d1}, [r4:128] @ encoding: [0x04,0xf9,0x2f,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1}, [r4:256] +@ CHECK-ERRORS: ^ + + vst1.8 {d0, d1}, [r4]! + vst1.8 {d0, d1}, [r4:16]! + vst1.8 {d0, d1}, [r4:32]! + vst1.8 {d0, d1}, [r4:64]! + vst1.8 {d0, d1}, [r4:128]! + vst1.8 {d0, d1}, [r4:256]! + +@ CHECK: vst1.8 {d0, d1}, [r4]! @ encoding: [0x04,0xf9,0x0d,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst1.8 {d0, d1}, [r4:64]! @ encoding: [0x04,0xf9,0x1d,0x0a] +@ CHECK: vst1.8 {d0, d1}, [r4:128]! @ encoding: [0x04,0xf9,0x2d,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst1.8 {d0, d1}, [r4], r6 + vst1.8 {d0, d1}, [r4:16], r6 + vst1.8 {d0, d1}, [r4:32], r6 + vst1.8 {d0, d1}, [r4:64], r6 + vst1.8 {d0, d1}, [r4:128], r6 + vst1.8 {d0, d1}, [r4:256], r6 + +@ CHECK: vst1.8 {d0, d1}, [r4], r6 @ encoding: [0x04,0xf9,0x06,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst1.8 {d0, d1}, [r4:64], r6 @ encoding: [0x04,0xf9,0x16,0x0a] +@ CHECK: vst1.8 {d0, d1}, [r4:128], r6 @ encoding: [0x04,0xf9,0x26,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst1.8 {d0, d1, d2}, [r4] + vst1.8 {d0, d1, d2}, [r4:16] + vst1.8 {d0, d1, d2}, [r4:32] + vst1.8 {d0, d1, d2}, [r4:64] + vst1.8 {d0, d1, d2}, [r4:128] + vst1.8 {d0, d1, d2}, [r4:256] + +@ CHECK: vst1.8 {d0, d1, d2}, [r4] @ encoding: [0x04,0xf9,0x0f,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1, d2}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1, d2}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst1.8 {d0, d1, d2}, [r4:64] @ encoding: [0x04,0xf9,0x1f,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1, d2}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1, d2}, [r4:256] +@ CHECK-ERRORS: ^ + + vst1.8 {d0, d1, d2}, [r4]! + vst1.8 {d0, d1, d2}, [r4:16]! + vst1.8 {d0, d1, d2}, [r4:32]! + vst1.8 {d0, d1, d2}, [r4:64]! + vst1.8 {d0, d1, d2}, [r4:128]! + vst1.8 {d0, d1, d2}, [r4:256]! + +@ CHECK: vst1.8 {d0, d1, d2}, [r4]! @ encoding: [0x04,0xf9,0x0d,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1, d2}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1, d2}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst1.8 {d0, d1, d2}, [r4:64]! @ encoding: [0x04,0xf9,0x1d,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1, d2}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1, d2}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst1.8 {d0, d1, d2}, [r4], r6 + vst1.8 {d0, d1, d2}, [r4:16], r6 + vst1.8 {d0, d1, d2}, [r4:32], r6 + vst1.8 {d0, d1, d2}, [r4:64], r6 + vst1.8 {d0, d1, d2}, [r4:128], r6 + vst1.8 {d0, d1, d2}, [r4:256], r6 + +@ CHECK: vst1.8 {d0, d1, d2}, [r4], r6 @ encoding: [0x04,0xf9,0x06,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1, d2}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1, d2}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst1.8 {d0, d1, d2}, [r4:64], r6 @ encoding: [0x04,0xf9,0x16,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1, d2}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1, d2}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst1.8 {d0, d1, d2, d3}, [r4] + vst1.8 {d0, d1, d2, d3}, [r4:16] + vst1.8 {d0, d1, d2, d3}, [r4:32] + vst1.8 {d0, d1, d2, d3}, [r4:64] + vst1.8 {d0, d1, d2, d3}, [r4:128] + vst1.8 {d0, d1, d2, d3}, [r4:256] + +@ CHECK: vst1.8 {d0, d1, d2, d3}, [r4] @ encoding: [0x04,0xf9,0x0f,0x02] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1, d2, d3}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1, d2, d3}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst1.8 {d0, d1, d2, d3}, [r4:64] @ encoding: [0x04,0xf9,0x1f,0x02] +@ CHECK: vst1.8 {d0, d1, d2, d3}, [r4:128] @ encoding: [0x04,0xf9,0x2f,0x02] +@ CHECK: vst1.8 {d0, d1, d2, d3}, [r4:256] @ encoding: [0x04,0xf9,0x3f,0x02] + + vst1.8 {d0, d1, d2, d3}, [r4]! + vst1.8 {d0, d1, d2, d3}, [r4:16]! + vst1.8 {d0, d1, d2, d3}, [r4:32]! + vst1.8 {d0, d1, d2, d3}, [r4:64]! + vst1.8 {d0, d1, d2, d3}, [r4:128]! + vst1.8 {d0, d1, d2, d3}, [r4:256]! + +@ CHECK: vst1.8 {d0, d1, d2, d3}, [r4]! @ encoding: [0x04,0xf9,0x0d,0x02] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1, d2, d3}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1, d2, d3}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst1.8 {d0, d1, d2, d3}, [r4:64]! @ encoding: [0x04,0xf9,0x1d,0x02] +@ CHECK: vst1.8 {d0, d1, d2, d3}, [r4:128]! @ encoding: [0x04,0xf9,0x2d,0x02] +@ CHECK: vst1.8 {d0, d1, d2, d3}, [r4:256]! @ encoding: [0x04,0xf9,0x3d,0x02] + + vst1.8 {d0, d1, d2, d3}, [r4], r6 + vst1.8 {d0, d1, d2, d3}, [r4:16], r6 + vst1.8 {d0, d1, d2, d3}, [r4:32], r6 + vst1.8 {d0, d1, d2, d3}, [r4:64], r6 + vst1.8 {d0, d1, d2, d3}, [r4:128], r6 + vst1.8 {d0, d1, d2, d3}, [r4:256], r6 + +@ CHECK: vst1.8 {d0, d1, d2, d3}, [r4], r6 @ encoding: [0x04,0xf9,0x06,0x02] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1, d2, d3}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst1.8 {d0, d1, d2, d3}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst1.8 {d0, d1, d2, d3}, [r4:64], r6 @ encoding: [0x04,0xf9,0x16,0x02] +@ CHECK: vst1.8 {d0, d1, d2, d3}, [r4:128], r6 @ encoding: [0x04,0xf9,0x26,0x02] +@ CHECK: vst1.8 {d0, d1, d2, d3}, [r4:256], r6 @ encoding: [0x04,0xf9,0x36,0x02] + + vst1.8 {d0[2]}, [r4] + vst1.8 {d0[2]}, [r4:16] + vst1.8 {d0[2]}, [r4:32] + vst1.8 {d0[2]}, [r4:64] + vst1.8 {d0[2]}, [r4:128] + vst1.8 {d0[2]}, [r4:256] + +@ CHECK: vst1.8 {d0[2]}, [r4] @ encoding: [0x84,0xf9,0x4f,0x00] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst1.8 {d0[2]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst1.8 {d0[2]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst1.8 {d0[2]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst1.8 {d0[2]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst1.8 {d0[2]}, [r4:256] +@ CHECK-ERRORS: ^ + + vst1.8 {d0[2]}, [r4]! + vst1.8 {d0[2]}, [r4:16]! + vst1.8 {d0[2]}, [r4:32]! + vst1.8 {d0[2]}, [r4:64]! + vst1.8 {d0[2]}, [r4:128]! + vst1.8 {d0[2]}, [r4:256]! + +@ CHECK: vst1.8 {d0[2]}, [r4]! @ encoding: [0x84,0xf9,0x4d,0x00] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst1.8 {d0[2]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst1.8 {d0[2]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst1.8 {d0[2]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst1.8 {d0[2]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst1.8 {d0[2]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst1.8 {d0[2]}, [r4], r6 + vst1.8 {d0[2]}, [r4:16], r6 + vst1.8 {d0[2]}, [r4:32], r6 + vst1.8 {d0[2]}, [r4:64], r6 + vst1.8 {d0[2]}, [r4:128], r6 + vst1.8 {d0[2]}, [r4:256], r6 + +@ CHECK: vst1.8 {d0[2]}, [r4], r6 @ encoding: [0x84,0xf9,0x46,0x00] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst1.8 {d0[2]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst1.8 {d0[2]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst1.8 {d0[2]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst1.8 {d0[2]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst1.8 {d0[2]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst1.16 {d0}, [r4] + vst1.16 {d0}, [r4:16] + vst1.16 {d0}, [r4:32] + vst1.16 {d0}, [r4:64] + vst1.16 {d0}, [r4:128] + vst1.16 {d0}, [r4:256] + +@ CHECK: vst1.16 {d0}, [r4] @ encoding: [0x04,0xf9,0x4f,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.16 {d0}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.16 {d0}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst1.16 {d0}, [r4:64] @ encoding: [0x04,0xf9,0x5f,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.16 {d0}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.16 {d0}, [r4:256] +@ CHECK-ERRORS: ^ + + vst1.16 {d0}, [r4]! + vst1.16 {d0}, [r4:16]! + vst1.16 {d0}, [r4:32]! + vst1.16 {d0}, [r4:64]! + vst1.16 {d0}, [r4:128]! + vst1.16 {d0}, [r4:256]! + +@ CHECK: vst1.16 {d0}, [r4]! @ encoding: [0x04,0xf9,0x4d,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.16 {d0}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.16 {d0}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst1.16 {d0}, [r4:64]! @ encoding: [0x04,0xf9,0x5d,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.16 {d0}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.16 {d0}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst1.16 {d0}, [r4], r6 + vst1.16 {d0}, [r4:16], r6 + vst1.16 {d0}, [r4:32], r6 + vst1.16 {d0}, [r4:64], r6 + vst1.16 {d0}, [r4:128], r6 + vst1.16 {d0}, [r4:256], r6 + +@ CHECK: vst1.16 {d0}, [r4], r6 @ encoding: [0x04,0xf9,0x46,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.16 {d0}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.16 {d0}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst1.16 {d0}, [r4:64], r6 @ encoding: [0x04,0xf9,0x56,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.16 {d0}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.16 {d0}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst1.16 {d0, d1}, [r4] + vst1.16 {d0, d1}, [r4:16] + vst1.16 {d0, d1}, [r4:32] + vst1.16 {d0, d1}, [r4:64] + vst1.16 {d0, d1}, [r4:128] + vst1.16 {d0, d1}, [r4:256] + +@ CHECK: vst1.16 {d0, d1}, [r4] @ encoding: [0x04,0xf9,0x4f,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst1.16 {d0, d1}, [r4:64] @ encoding: [0x04,0xf9,0x5f,0x0a] +@ CHECK: vst1.16 {d0, d1}, [r4:128] @ encoding: [0x04,0xf9,0x6f,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1}, [r4:256] +@ CHECK-ERRORS: ^ + + vst1.16 {d0, d1}, [r4]! + vst1.16 {d0, d1}, [r4:16]! + vst1.16 {d0, d1}, [r4:32]! + vst1.16 {d0, d1}, [r4:64]! + vst1.16 {d0, d1}, [r4:128]! + vst1.16 {d0, d1}, [r4:256]! + +@ CHECK: vst1.16 {d0, d1}, [r4]! @ encoding: [0x04,0xf9,0x4d,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst1.16 {d0, d1}, [r4:64]! @ encoding: [0x04,0xf9,0x5d,0x0a] +@ CHECK: vst1.16 {d0, d1}, [r4:128]! @ encoding: [0x04,0xf9,0x6d,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst1.16 {d0, d1}, [r4], r6 + vst1.16 {d0, d1}, [r4:16], r6 + vst1.16 {d0, d1}, [r4:32], r6 + vst1.16 {d0, d1}, [r4:64], r6 + vst1.16 {d0, d1}, [r4:128], r6 + vst1.16 {d0, d1}, [r4:256], r6 + +@ CHECK: vst1.16 {d0, d1}, [r4], r6 @ encoding: [0x04,0xf9,0x46,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst1.16 {d0, d1}, [r4:64], r6 @ encoding: [0x04,0xf9,0x56,0x0a] +@ CHECK: vst1.16 {d0, d1}, [r4:128], r6 @ encoding: [0x04,0xf9,0x66,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst1.16 {d0, d1, d2}, [r4] + vst1.16 {d0, d1, d2}, [r4:16] + vst1.16 {d0, d1, d2}, [r4:32] + vst1.16 {d0, d1, d2}, [r4:64] + vst1.16 {d0, d1, d2}, [r4:128] + vst1.16 {d0, d1, d2}, [r4:256] + +@ CHECK: vst1.16 {d0, d1, d2}, [r4] @ encoding: [0x04,0xf9,0x4f,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1, d2}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1, d2}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst1.16 {d0, d1, d2}, [r4:64] @ encoding: [0x04,0xf9,0x5f,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1, d2}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1, d2}, [r4:256] +@ CHECK-ERRORS: ^ + + vst1.16 {d0, d1, d2}, [r4]! + vst1.16 {d0, d1, d2}, [r4:16]! + vst1.16 {d0, d1, d2}, [r4:32]! + vst1.16 {d0, d1, d2}, [r4:64]! + vst1.16 {d0, d1, d2}, [r4:128]! + vst1.16 {d0, d1, d2}, [r4:256]! + +@ CHECK: vst1.16 {d0, d1, d2}, [r4]! @ encoding: [0x04,0xf9,0x4d,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1, d2}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1, d2}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst1.16 {d0, d1, d2}, [r4:64]! @ encoding: [0x04,0xf9,0x5d,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1, d2}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1, d2}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst1.16 {d0, d1, d2}, [r4], r6 + vst1.16 {d0, d1, d2}, [r4:16], r6 + vst1.16 {d0, d1, d2}, [r4:32], r6 + vst1.16 {d0, d1, d2}, [r4:64], r6 + vst1.16 {d0, d1, d2}, [r4:128], r6 + vst1.16 {d0, d1, d2}, [r4:256], r6 + +@ CHECK: vst1.16 {d0, d1, d2}, [r4], r6 @ encoding: [0x04,0xf9,0x46,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1, d2}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1, d2}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst1.16 {d0, d1, d2}, [r4:64], r6 @ encoding: [0x04,0xf9,0x56,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1, d2}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1, d2}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst1.16 {d0, d1, d2, d3}, [r4] + vst1.16 {d0, d1, d2, d3}, [r4:16] + vst1.16 {d0, d1, d2, d3}, [r4:32] + vst1.16 {d0, d1, d2, d3}, [r4:64] + vst1.16 {d0, d1, d2, d3}, [r4:128] + vst1.16 {d0, d1, d2, d3}, [r4:256] + +@ CHECK: vst1.16 {d0, d1, d2, d3}, [r4] @ encoding: [0x04,0xf9,0x4f,0x02] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1, d2, d3}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1, d2, d3}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst1.16 {d0, d1, d2, d3}, [r4:64] @ encoding: [0x04,0xf9,0x5f,0x02] +@ CHECK: vst1.16 {d0, d1, d2, d3}, [r4:128] @ encoding: [0x04,0xf9,0x6f,0x02] +@ CHECK: vst1.16 {d0, d1, d2, d3}, [r4:256] @ encoding: [0x04,0xf9,0x7f,0x02] + + vst1.16 {d0, d1, d2, d3}, [r4]! + vst1.16 {d0, d1, d2, d3}, [r4:16]! + vst1.16 {d0, d1, d2, d3}, [r4:32]! + vst1.16 {d0, d1, d2, d3}, [r4:64]! + vst1.16 {d0, d1, d2, d3}, [r4:128]! + vst1.16 {d0, d1, d2, d3}, [r4:256]! + +@ CHECK: vst1.16 {d0, d1, d2, d3}, [r4]! @ encoding: [0x04,0xf9,0x4d,0x02] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1, d2, d3}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1, d2, d3}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst1.16 {d0, d1, d2, d3}, [r4:64]! @ encoding: [0x04,0xf9,0x5d,0x02] +@ CHECK: vst1.16 {d0, d1, d2, d3}, [r4:128]! @ encoding: [0x04,0xf9,0x6d,0x02] +@ CHECK: vst1.16 {d0, d1, d2, d3}, [r4:256]! @ encoding: [0x04,0xf9,0x7d,0x02] + + vst1.16 {d0, d1, d2, d3}, [r4], r6 + vst1.16 {d0, d1, d2, d3}, [r4:16], r6 + vst1.16 {d0, d1, d2, d3}, [r4:32], r6 + vst1.16 {d0, d1, d2, d3}, [r4:64], r6 + vst1.16 {d0, d1, d2, d3}, [r4:128], r6 + vst1.16 {d0, d1, d2, d3}, [r4:256], r6 + +@ CHECK: vst1.16 {d0, d1, d2, d3}, [r4], r6 @ encoding: [0x04,0xf9,0x46,0x02] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1, d2, d3}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst1.16 {d0, d1, d2, d3}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst1.16 {d0, d1, d2, d3}, [r4:64], r6 @ encoding: [0x04,0xf9,0x56,0x02] +@ CHECK: vst1.16 {d0, d1, d2, d3}, [r4:128], r6 @ encoding: [0x04,0xf9,0x66,0x02] +@ CHECK: vst1.16 {d0, d1, d2, d3}, [r4:256], r6 @ encoding: [0x04,0xf9,0x76,0x02] + + vst1.16 {d0[2]}, [r4] + vst1.16 {d0[2]}, [r4:16] + vst1.16 {d0[2]}, [r4:32] + vst1.16 {d0[2]}, [r4:64] + vst1.16 {d0[2]}, [r4:128] + vst1.16 {d0[2]}, [r4:256] + +@ CHECK: vst1.16 {d0[2]}, [r4] @ encoding: [0x84,0xf9,0x8f,0x04] +@ CHECK: vst1.16 {d0[2]}, [r4:16] @ encoding: [0x84,0xf9,0x9f,0x04] +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vst1.16 {d0[2]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vst1.16 {d0[2]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vst1.16 {d0[2]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vst1.16 {d0[2]}, [r4:256] +@ CHECK-ERRORS: ^ + + vst1.16 {d0[2]}, [r4]! + vst1.16 {d0[2]}, [r4:16]! + vst1.16 {d0[2]}, [r4:32]! + vst1.16 {d0[2]}, [r4:64]! + vst1.16 {d0[2]}, [r4:128]! + vst1.16 {d0[2]}, [r4:256]! + +@ CHECK: vst1.16 {d0[2]}, [r4]! @ encoding: [0x84,0xf9,0x8d,0x04] +@ CHECK: vst1.16 {d0[2]}, [r4:16]! @ encoding: [0x84,0xf9,0x9d,0x04] +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vst1.16 {d0[2]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vst1.16 {d0[2]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vst1.16 {d0[2]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vst1.16 {d0[2]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst1.16 {d0[2]}, [r4], r6 + vst1.16 {d0[2]}, [r4:16], r6 + vst1.16 {d0[2]}, [r4:32], r6 + vst1.16 {d0[2]}, [r4:64], r6 + vst1.16 {d0[2]}, [r4:128], r6 + vst1.16 {d0[2]}, [r4:256], r6 + +@ CHECK: vst1.16 {d0[2]}, [r4], r6 @ encoding: [0x84,0xf9,0x86,0x04] +@ CHECK: vst1.16 {d0[2]}, [r4:16], r6 @ encoding: [0x84,0xf9,0x96,0x04] +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vst1.16 {d0[2]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vst1.16 {d0[2]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vst1.16 {d0[2]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vst1.16 {d0[2]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst1.32 {d0}, [r4] + vst1.32 {d0}, [r4:16] + vst1.32 {d0}, [r4:32] + vst1.32 {d0}, [r4:64] + vst1.32 {d0}, [r4:128] + vst1.32 {d0}, [r4:256] + +@ CHECK: vst1.32 {d0}, [r4] @ encoding: [0x04,0xf9,0x8f,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.32 {d0}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.32 {d0}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst1.32 {d0}, [r4:64] @ encoding: [0x04,0xf9,0x9f,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.32 {d0}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.32 {d0}, [r4:256] +@ CHECK-ERRORS: ^ + + vst1.32 {d0}, [r4]! + vst1.32 {d0}, [r4:16]! + vst1.32 {d0}, [r4:32]! + vst1.32 {d0}, [r4:64]! + vst1.32 {d0}, [r4:128]! + vst1.32 {d0}, [r4:256]! + +@ CHECK: vst1.32 {d0}, [r4]! @ encoding: [0x04,0xf9,0x8d,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.32 {d0}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.32 {d0}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst1.32 {d0}, [r4:64]! @ encoding: [0x04,0xf9,0x9d,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.32 {d0}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.32 {d0}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst1.32 {d0}, [r4], r6 + vst1.32 {d0}, [r4:16], r6 + vst1.32 {d0}, [r4:32], r6 + vst1.32 {d0}, [r4:64], r6 + vst1.32 {d0}, [r4:128], r6 + vst1.32 {d0}, [r4:256], r6 + +@ CHECK: vst1.32 {d0}, [r4], r6 @ encoding: [0x04,0xf9,0x86,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.32 {d0}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.32 {d0}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst1.32 {d0}, [r4:64], r6 @ encoding: [0x04,0xf9,0x96,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.32 {d0}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.32 {d0}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst1.32 {d0, d1}, [r4] + vst1.32 {d0, d1}, [r4:16] + vst1.32 {d0, d1}, [r4:32] + vst1.32 {d0, d1}, [r4:64] + vst1.32 {d0, d1}, [r4:128] + vst1.32 {d0, d1}, [r4:256] + +@ CHECK: vst1.32 {d0, d1}, [r4] @ encoding: [0x04,0xf9,0x8f,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst1.32 {d0, d1}, [r4:64] @ encoding: [0x04,0xf9,0x9f,0x0a] +@ CHECK: vst1.32 {d0, d1}, [r4:128] @ encoding: [0x04,0xf9,0xaf,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1}, [r4:256] +@ CHECK-ERRORS: ^ + + vst1.32 {d0, d1}, [r4]! + vst1.32 {d0, d1}, [r4:16]! + vst1.32 {d0, d1}, [r4:32]! + vst1.32 {d0, d1}, [r4:64]! + vst1.32 {d0, d1}, [r4:128]! + vst1.32 {d0, d1}, [r4:256]! + +@ CHECK: vst1.32 {d0, d1}, [r4]! @ encoding: [0x04,0xf9,0x8d,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst1.32 {d0, d1}, [r4:64]! @ encoding: [0x04,0xf9,0x9d,0x0a] +@ CHECK: vst1.32 {d0, d1}, [r4:128]! @ encoding: [0x04,0xf9,0xad,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst1.32 {d0, d1}, [r4], r6 + vst1.32 {d0, d1}, [r4:16], r6 + vst1.32 {d0, d1}, [r4:32], r6 + vst1.32 {d0, d1}, [r4:64], r6 + vst1.32 {d0, d1}, [r4:128], r6 + vst1.32 {d0, d1}, [r4:256], r6 + +@ CHECK: vst1.32 {d0, d1}, [r4], r6 @ encoding: [0x04,0xf9,0x86,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst1.32 {d0, d1}, [r4:64], r6 @ encoding: [0x04,0xf9,0x96,0x0a] +@ CHECK: vst1.32 {d0, d1}, [r4:128], r6 @ encoding: [0x04,0xf9,0xa6,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst1.32 {d0, d1, d2}, [r4] + vst1.32 {d0, d1, d2}, [r4:16] + vst1.32 {d0, d1, d2}, [r4:32] + vst1.32 {d0, d1, d2}, [r4:64] + vst1.32 {d0, d1, d2}, [r4:128] + vst1.32 {d0, d1, d2}, [r4:256] + +@ CHECK: vst1.32 {d0, d1, d2}, [r4] @ encoding: [0x04,0xf9,0x8f,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1, d2}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1, d2}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst1.32 {d0, d1, d2}, [r4:64] @ encoding: [0x04,0xf9,0x9f,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1, d2}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1, d2}, [r4:256] +@ CHECK-ERRORS: ^ + + vst1.32 {d0, d1, d2}, [r4]! + vst1.32 {d0, d1, d2}, [r4:16]! + vst1.32 {d0, d1, d2}, [r4:32]! + vst1.32 {d0, d1, d2}, [r4:64]! + vst1.32 {d0, d1, d2}, [r4:128]! + vst1.32 {d0, d1, d2}, [r4:256]! + +@ CHECK: vst1.32 {d0, d1, d2}, [r4]! @ encoding: [0x04,0xf9,0x8d,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1, d2}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1, d2}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst1.32 {d0, d1, d2}, [r4:64]! @ encoding: [0x04,0xf9,0x9d,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1, d2}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1, d2}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst1.32 {d0, d1, d2}, [r4], r6 + vst1.32 {d0, d1, d2}, [r4:16], r6 + vst1.32 {d0, d1, d2}, [r4:32], r6 + vst1.32 {d0, d1, d2}, [r4:64], r6 + vst1.32 {d0, d1, d2}, [r4:128], r6 + vst1.32 {d0, d1, d2}, [r4:256], r6 + +@ CHECK: vst1.32 {d0, d1, d2}, [r4], r6 @ encoding: [0x04,0xf9,0x86,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1, d2}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1, d2}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst1.32 {d0, d1, d2}, [r4:64], r6 @ encoding: [0x04,0xf9,0x96,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1, d2}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1, d2}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst1.32 {d0, d1, d2, d3}, [r4] + vst1.32 {d0, d1, d2, d3}, [r4:16] + vst1.32 {d0, d1, d2, d3}, [r4:32] + vst1.32 {d0, d1, d2, d3}, [r4:64] + vst1.32 {d0, d1, d2, d3}, [r4:128] + vst1.32 {d0, d1, d2, d3}, [r4:256] + +@ CHECK: vst1.32 {d0, d1, d2, d3}, [r4] @ encoding: [0x04,0xf9,0x8f,0x02] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1, d2, d3}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1, d2, d3}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst1.32 {d0, d1, d2, d3}, [r4:64] @ encoding: [0x04,0xf9,0x9f,0x02] +@ CHECK: vst1.32 {d0, d1, d2, d3}, [r4:128] @ encoding: [0x04,0xf9,0xaf,0x02] +@ CHECK: vst1.32 {d0, d1, d2, d3}, [r4:256] @ encoding: [0x04,0xf9,0xbf,0x02] + + vst1.32 {d0, d1, d2, d3}, [r4]! + vst1.32 {d0, d1, d2, d3}, [r4:16]! + vst1.32 {d0, d1, d2, d3}, [r4:32]! + vst1.32 {d0, d1, d2, d3}, [r4:64]! + vst1.32 {d0, d1, d2, d3}, [r4:128]! + vst1.32 {d0, d1, d2, d3}, [r4:256]! + +@ CHECK: vst1.32 {d0, d1, d2, d3}, [r4]! @ encoding: [0x04,0xf9,0x8d,0x02] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1, d2, d3}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1, d2, d3}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst1.32 {d0, d1, d2, d3}, [r4:64]! @ encoding: [0x04,0xf9,0x9d,0x02] +@ CHECK: vst1.32 {d0, d1, d2, d3}, [r4:128]! @ encoding: [0x04,0xf9,0xad,0x02] +@ CHECK: vst1.32 {d0, d1, d2, d3}, [r4:256]! @ encoding: [0x04,0xf9,0xbd,0x02] + + vst1.32 {d0, d1, d2, d3}, [r4], r6 + vst1.32 {d0, d1, d2, d3}, [r4:16], r6 + vst1.32 {d0, d1, d2, d3}, [r4:32], r6 + vst1.32 {d0, d1, d2, d3}, [r4:64], r6 + vst1.32 {d0, d1, d2, d3}, [r4:128], r6 + vst1.32 {d0, d1, d2, d3}, [r4:256], r6 + +@ CHECK: vst1.32 {d0, d1, d2, d3}, [r4], r6 @ encoding: [0x04,0xf9,0x86,0x02] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1, d2, d3}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst1.32 {d0, d1, d2, d3}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst1.32 {d0, d1, d2, d3}, [r4:64], r6 @ encoding: [0x04,0xf9,0x96,0x02] +@ CHECK: vst1.32 {d0, d1, d2, d3}, [r4:128], r6 @ encoding: [0x04,0xf9,0xa6,0x02] +@ CHECK: vst1.32 {d0, d1, d2, d3}, [r4:256], r6 @ encoding: [0x04,0xf9,0xb6,0x02] + + vst1.32 {d0[1]}, [r4] + vst1.32 {d0[1]}, [r4:16] + vst1.32 {d0[1]}, [r4:32] + vst1.32 {d0[1]}, [r4:64] + vst1.32 {d0[1]}, [r4:128] + vst1.32 {d0[1]}, [r4:256] + +@ CHECK: vst1.32 {d0[1]}, [r4] @ encoding: [0x84,0xf9,0x8f,0x08] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vst1.32 {d0[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK: vst1.32 {d0[1]}, [r4:32] @ encoding: [0x84,0xf9,0xbf,0x08] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vst1.32 {d0[1]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vst1.32 {d0[1]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vst1.32 {d0[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vst1.32 {d0[1]}, [r4]! + vst1.32 {d0[1]}, [r4:16]! + vst1.32 {d0[1]}, [r4:32]! + vst1.32 {d0[1]}, [r4:64]! + vst1.32 {d0[1]}, [r4:128]! + vst1.32 {d0[1]}, [r4:256]! + +@ CHECK: vst1.32 {d0[1]}, [r4]! @ encoding: [0x84,0xf9,0x8d,0x08] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vst1.32 {d0[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK: vst1.32 {d0[1]}, [r4:32]! @ encoding: [0x84,0xf9,0xbd,0x08] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vst1.32 {d0[1]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vst1.32 {d0[1]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vst1.32 {d0[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst1.32 {d0[1]}, [r4], r6 + vst1.32 {d0[1]}, [r4:16], r6 + vst1.32 {d0[1]}, [r4:32], r6 + vst1.32 {d0[1]}, [r4:64], r6 + vst1.32 {d0[1]}, [r4:128], r6 + vst1.32 {d0[1]}, [r4:256], r6 + +@ CHECK: vst1.32 {d0[1]}, [r4], r6 @ encoding: [0x84,0xf9,0x86,0x08] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vst1.32 {d0[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst1.32 {d0[1]}, [r4:32], r6 @ encoding: [0x84,0xf9,0xb6,0x08] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vst1.32 {d0[1]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vst1.32 {d0[1]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vst1.32 {d0[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst1.64 {d0}, [r4] + vst1.64 {d0}, [r4:16] + vst1.64 {d0}, [r4:32] + vst1.64 {d0}, [r4:64] + vst1.64 {d0}, [r4:128] + vst1.64 {d0}, [r4:256] + +@ CHECK: vst1.64 {d0}, [r4] @ encoding: [0x04,0xf9,0xcf,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.64 {d0}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.64 {d0}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst1.64 {d0}, [r4:64] @ encoding: [0x04,0xf9,0xdf,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.64 {d0}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.64 {d0}, [r4:256] +@ CHECK-ERRORS: ^ + + vst1.64 {d0}, [r4]! + vst1.64 {d0}, [r4:16]! + vst1.64 {d0}, [r4:32]! + vst1.64 {d0}, [r4:64]! + vst1.64 {d0}, [r4:128]! + vst1.64 {d0}, [r4:256]! + +@ CHECK: vst1.64 {d0}, [r4]! @ encoding: [0x04,0xf9,0xcd,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.64 {d0}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.64 {d0}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst1.64 {d0}, [r4:64]! @ encoding: [0x04,0xf9,0xdd,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.64 {d0}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.64 {d0}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst1.64 {d0}, [r4], r6 + vst1.64 {d0}, [r4:16], r6 + vst1.64 {d0}, [r4:32], r6 + vst1.64 {d0}, [r4:64], r6 + vst1.64 {d0}, [r4:128], r6 + vst1.64 {d0}, [r4:256], r6 + +@ CHECK: vst1.64 {d0}, [r4], r6 @ encoding: [0x04,0xf9,0xc6,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.64 {d0}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.64 {d0}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst1.64 {d0}, [r4:64], r6 @ encoding: [0x04,0xf9,0xd6,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.64 {d0}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.64 {d0}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst1.64 {d0, d1}, [r4] + vst1.64 {d0, d1}, [r4:16] + vst1.64 {d0, d1}, [r4:32] + vst1.64 {d0, d1}, [r4:64] + vst1.64 {d0, d1}, [r4:128] + vst1.64 {d0, d1}, [r4:256] + +@ CHECK: vst1.64 {d0, d1}, [r4] @ encoding: [0x04,0xf9,0xcf,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst1.64 {d0, d1}, [r4:64] @ encoding: [0x04,0xf9,0xdf,0x0a] +@ CHECK: vst1.64 {d0, d1}, [r4:128] @ encoding: [0x04,0xf9,0xef,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1}, [r4:256] +@ CHECK-ERRORS: ^ + + vst1.64 {d0, d1}, [r4]! + vst1.64 {d0, d1}, [r4:16]! + vst1.64 {d0, d1}, [r4:32]! + vst1.64 {d0, d1}, [r4:64]! + vst1.64 {d0, d1}, [r4:128]! + vst1.64 {d0, d1}, [r4:256]! + +@ CHECK: vst1.64 {d0, d1}, [r4]! @ encoding: [0x04,0xf9,0xcd,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst1.64 {d0, d1}, [r4:64]! @ encoding: [0x04,0xf9,0xdd,0x0a] +@ CHECK: vst1.64 {d0, d1}, [r4:128]! @ encoding: [0x04,0xf9,0xed,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst1.64 {d0, d1}, [r4], r6 + vst1.64 {d0, d1}, [r4:16], r6 + vst1.64 {d0, d1}, [r4:32], r6 + vst1.64 {d0, d1}, [r4:64], r6 + vst1.64 {d0, d1}, [r4:128], r6 + vst1.64 {d0, d1}, [r4:256], r6 + +@ CHECK: vst1.64 {d0, d1}, [r4], r6 @ encoding: [0x04,0xf9,0xc6,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst1.64 {d0, d1}, [r4:64], r6 @ encoding: [0x04,0xf9,0xd6,0x0a] +@ CHECK: vst1.64 {d0, d1}, [r4:128], r6 @ encoding: [0x04,0xf9,0xe6,0x0a] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst1.64 {d0, d1, d2}, [r4] + vst1.64 {d0, d1, d2}, [r4:16] + vst1.64 {d0, d1, d2}, [r4:32] + vst1.64 {d0, d1, d2}, [r4:64] + vst1.64 {d0, d1, d2}, [r4:128] + vst1.64 {d0, d1, d2}, [r4:256] + +@ CHECK: vst1.64 {d0, d1, d2}, [r4] @ encoding: [0x04,0xf9,0xcf,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1, d2}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1, d2}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst1.64 {d0, d1, d2}, [r4:64] @ encoding: [0x04,0xf9,0xdf,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1, d2}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1, d2}, [r4:256] +@ CHECK-ERRORS: ^ + + vst1.64 {d0, d1, d2}, [r4]! + vst1.64 {d0, d1, d2}, [r4:16]! + vst1.64 {d0, d1, d2}, [r4:32]! + vst1.64 {d0, d1, d2}, [r4:64]! + vst1.64 {d0, d1, d2}, [r4:128]! + vst1.64 {d0, d1, d2}, [r4:256]! + +@ CHECK: vst1.64 {d0, d1, d2}, [r4]! @ encoding: [0x04,0xf9,0xcd,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1, d2}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1, d2}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst1.64 {d0, d1, d2}, [r4:64]! @ encoding: [0x04,0xf9,0xdd,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1, d2}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1, d2}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst1.64 {d0, d1, d2}, [r4], r6 + vst1.64 {d0, d1, d2}, [r4:16], r6 + vst1.64 {d0, d1, d2}, [r4:32], r6 + vst1.64 {d0, d1, d2}, [r4:64], r6 + vst1.64 {d0, d1, d2}, [r4:128], r6 + vst1.64 {d0, d1, d2}, [r4:256], r6 + +@ CHECK: vst1.64 {d0, d1, d2}, [r4], r6 @ encoding: [0x04,0xf9,0xc6,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1, d2}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1, d2}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst1.64 {d0, d1, d2}, [r4:64], r6 @ encoding: [0x04,0xf9,0xd6,0x06] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1, d2}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1, d2}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst1.64 {d0, d1, d2, d3}, [r4] + vst1.64 {d0, d1, d2, d3}, [r4:16] + vst1.64 {d0, d1, d2, d3}, [r4:32] + vst1.64 {d0, d1, d2, d3}, [r4:64] + vst1.64 {d0, d1, d2, d3}, [r4:128] + vst1.64 {d0, d1, d2, d3}, [r4:256] + +@ CHECK: vst1.64 {d0, d1, d2, d3}, [r4] @ encoding: [0x04,0xf9,0xcf,0x02] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1, d2, d3}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1, d2, d3}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst1.64 {d0, d1, d2, d3}, [r4:64] @ encoding: [0x04,0xf9,0xdf,0x02] +@ CHECK: vst1.64 {d0, d1, d2, d3}, [r4:128] @ encoding: [0x04,0xf9,0xef,0x02] +@ CHECK: vst1.64 {d0, d1, d2, d3}, [r4:256] @ encoding: [0x04,0xf9,0xff,0x02] + + vst1.64 {d0, d1, d2, d3}, [r4]! + vst1.64 {d0, d1, d2, d3}, [r4:16]! + vst1.64 {d0, d1, d2, d3}, [r4:32]! + vst1.64 {d0, d1, d2, d3}, [r4:64]! + vst1.64 {d0, d1, d2, d3}, [r4:128]! + vst1.64 {d0, d1, d2, d3}, [r4:256]! + +@ CHECK: vst1.64 {d0, d1, d2, d3}, [r4]! @ encoding: [0x04,0xf9,0xcd,0x02] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1, d2, d3}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1, d2, d3}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst1.64 {d0, d1, d2, d3}, [r4:64]! @ encoding: [0x04,0xf9,0xdd,0x02] +@ CHECK: vst1.64 {d0, d1, d2, d3}, [r4:128]! @ encoding: [0x04,0xf9,0xed,0x02] +@ CHECK: vst1.64 {d0, d1, d2, d3}, [r4:256]! @ encoding: [0x04,0xf9,0xfd,0x02] + + vst1.64 {d0, d1, d2, d3}, [r4], r6 + vst1.64 {d0, d1, d2, d3}, [r4:16], r6 + vst1.64 {d0, d1, d2, d3}, [r4:32], r6 + vst1.64 {d0, d1, d2, d3}, [r4:64], r6 + vst1.64 {d0, d1, d2, d3}, [r4:128], r6 + vst1.64 {d0, d1, d2, d3}, [r4:256], r6 + +@ CHECK: vst1.64 {d0, d1, d2, d3}, [r4], r6 @ encoding: [0x04,0xf9,0xc6,0x02] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1, d2, d3}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst1.64 {d0, d1, d2, d3}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst1.64 {d0, d1, d2, d3}, [r4:64], r6 @ encoding: [0x04,0xf9,0xd6,0x02] +@ CHECK: vst1.64 {d0, d1, d2, d3}, [r4:128], r6 @ encoding: [0x04,0xf9,0xe6,0x02] +@ CHECK: vst1.64 {d0, d1, d2, d3}, [r4:256], r6 @ encoding: [0x04,0xf9,0xf6,0x02] + + vst2.8 {d0, d1}, [r4] + vst2.8 {d0, d1}, [r4:16] + vst2.8 {d0, d1}, [r4:32] + vst2.8 {d0, d1}, [r4:64] + vst2.8 {d0, d1}, [r4:128] + vst2.8 {d0, d1}, [r4:256] + +@ CHECK: vst2.8 {d0, d1}, [r4] @ encoding: [0x04,0xf9,0x0f,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.8 {d0, d1}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.8 {d0, d1}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst2.8 {d0, d1}, [r4:64] @ encoding: [0x04,0xf9,0x1f,0x08] +@ CHECK: vst2.8 {d0, d1}, [r4:128] @ encoding: [0x04,0xf9,0x2f,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.8 {d0, d1}, [r4:256] +@ CHECK-ERRORS: ^ + + vst2.8 {d0, d1}, [r4]! + vst2.8 {d0, d1}, [r4:16]! + vst2.8 {d0, d1}, [r4:32]! + vst2.8 {d0, d1}, [r4:64]! + vst2.8 {d0, d1}, [r4:128]! + vst2.8 {d0, d1}, [r4:256]! + +@ CHECK: vst2.8 {d0, d1}, [r4]! @ encoding: [0x04,0xf9,0x0d,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.8 {d0, d1}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.8 {d0, d1}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst2.8 {d0, d1}, [r4:64]! @ encoding: [0x04,0xf9,0x1d,0x08] +@ CHECK: vst2.8 {d0, d1}, [r4:128]! @ encoding: [0x04,0xf9,0x2d,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.8 {d0, d1}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst2.8 {d0, d1}, [r4], r6 + vst2.8 {d0, d1}, [r4:16], r6 + vst2.8 {d0, d1}, [r4:32], r6 + vst2.8 {d0, d1}, [r4:64], r6 + vst2.8 {d0, d1}, [r4:128], r6 + vst2.8 {d0, d1}, [r4:256], r6 + +@ CHECK: vst2.8 {d0, d1}, [r4], r6 @ encoding: [0x04,0xf9,0x06,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.8 {d0, d1}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.8 {d0, d1}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst2.8 {d0, d1}, [r4:64], r6 @ encoding: [0x04,0xf9,0x16,0x08] +@ CHECK: vst2.8 {d0, d1}, [r4:128], r6 @ encoding: [0x04,0xf9,0x26,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.8 {d0, d1}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst2.8 {d0, d2}, [r4] + vst2.8 {d0, d2}, [r4:16] + vst2.8 {d0, d2}, [r4:32] + vst2.8 {d0, d2}, [r4:64] + vst2.8 {d0, d2}, [r4:128] + vst2.8 {d0, d2}, [r4:256] + +@ CHECK: vst2.8 {d0, d2}, [r4] @ encoding: [0x04,0xf9,0x0f,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.8 {d0, d2}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.8 {d0, d2}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst2.8 {d0, d2}, [r4:64] @ encoding: [0x04,0xf9,0x1f,0x09] +@ CHECK: vst2.8 {d0, d2}, [r4:128] @ encoding: [0x04,0xf9,0x2f,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.8 {d0, d2}, [r4:256] +@ CHECK-ERRORS: ^ + + vst2.8 {d0, d2}, [r4]! + vst2.8 {d0, d2}, [r4:16]! + vst2.8 {d0, d2}, [r4:32]! + vst2.8 {d0, d2}, [r4:64]! + vst2.8 {d0, d2}, [r4:128]! + vst2.8 {d0, d2}, [r4:256]! + +@ CHECK: vst2.8 {d0, d2}, [r4]! @ encoding: [0x04,0xf9,0x0d,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.8 {d0, d2}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.8 {d0, d2}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst2.8 {d0, d2}, [r4:64]! @ encoding: [0x04,0xf9,0x1d,0x09] +@ CHECK: vst2.8 {d0, d2}, [r4:128]! @ encoding: [0x04,0xf9,0x2d,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.8 {d0, d2}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst2.8 {d0, d2}, [r4], r6 + vst2.8 {d0, d2}, [r4:16], r6 + vst2.8 {d0, d2}, [r4:32], r6 + vst2.8 {d0, d2}, [r4:64], r6 + vst2.8 {d0, d2}, [r4:128], r6 + vst2.8 {d0, d2}, [r4:256], r6 + +@ CHECK: vst2.8 {d0, d2}, [r4], r6 @ encoding: [0x04,0xf9,0x06,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.8 {d0, d2}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.8 {d0, d2}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst2.8 {d0, d2}, [r4:64], r6 @ encoding: [0x04,0xf9,0x16,0x09] +@ CHECK: vst2.8 {d0, d2}, [r4:128], r6 @ encoding: [0x04,0xf9,0x26,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.8 {d0, d2}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst2.8 {d0, d1, d2, d3}, [r4] + vst2.8 {d0, d1, d2, d3}, [r4:16] + vst2.8 {d0, d1, d2, d3}, [r4:32] + vst2.8 {d0, d1, d2, d3}, [r4:64] + vst2.8 {d0, d1, d2, d3}, [r4:128] + vst2.8 {d0, d1, d2, d3}, [r4:256] + +@ CHECK: vst2.8 {d0, d1, d2, d3}, [r4] @ encoding: [0x04,0xf9,0x0f,0x03] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst2.8 {d0, d1, d2, d3}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst2.8 {d0, d1, d2, d3}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst2.8 {d0, d1, d2, d3}, [r4:64] @ encoding: [0x04,0xf9,0x1f,0x03] +@ CHECK: vst2.8 {d0, d1, d2, d3}, [r4:128] @ encoding: [0x04,0xf9,0x2f,0x03] +@ CHECK: vst2.8 {d0, d1, d2, d3}, [r4:256] @ encoding: [0x04,0xf9,0x3f,0x03] + + vst2.8 {d0, d1, d2, d3}, [r4]! + vst2.8 {d0, d1, d2, d3}, [r4:16]! + vst2.8 {d0, d1, d2, d3}, [r4:32]! + vst2.8 {d0, d1, d2, d3}, [r4:64]! + vst2.8 {d0, d1, d2, d3}, [r4:128]! + vst2.8 {d0, d1, d2, d3}, [r4:256]! + +@ CHECK: vst2.8 {d0, d1, d2, d3}, [r4]! @ encoding: [0x04,0xf9,0x0d,0x03] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst2.8 {d0, d1, d2, d3}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst2.8 {d0, d1, d2, d3}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst2.8 {d0, d1, d2, d3}, [r4:64]! @ encoding: [0x04,0xf9,0x1d,0x03] +@ CHECK: vst2.8 {d0, d1, d2, d3}, [r4:128]! @ encoding: [0x04,0xf9,0x2d,0x03] +@ CHECK: vst2.8 {d0, d1, d2, d3}, [r4:256]! @ encoding: [0x04,0xf9,0x3d,0x03] + + vst2.8 {d0, d1, d2, d3}, [r4], r6 + vst2.8 {d0, d1, d2, d3}, [r4:16], r6 + vst2.8 {d0, d1, d2, d3}, [r4:32], r6 + vst2.8 {d0, d1, d2, d3}, [r4:64], r6 + vst2.8 {d0, d1, d2, d3}, [r4:128], r6 + vst2.8 {d0, d1, d2, d3}, [r4:256], r6 + +@ CHECK: vst2.8 {d0, d1, d2, d3}, [r4], r6 @ encoding: [0x04,0xf9,0x06,0x03] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst2.8 {d0, d1, d2, d3}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst2.8 {d0, d1, d2, d3}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst2.8 {d0, d1, d2, d3}, [r4:64], r6 @ encoding: [0x04,0xf9,0x16,0x03] +@ CHECK: vst2.8 {d0, d1, d2, d3}, [r4:128], r6 @ encoding: [0x04,0xf9,0x26,0x03] +@ CHECK: vst2.8 {d0, d1, d2, d3}, [r4:256], r6 @ encoding: [0x04,0xf9,0x36,0x03] + + vst2.8 {d0[2], d1[2]}, [r4] + vst2.8 {d0[2], d1[2]}, [r4:16] + vst2.8 {d0[2], d1[2]}, [r4:32] + vst2.8 {d0[2], d1[2]}, [r4:64] + vst2.8 {d0[2], d1[2]}, [r4:128] + vst2.8 {d0[2], d1[2]}, [r4:256] + +@ CHECK: vst2.8 {d0[2], d1[2]}, [r4] @ encoding: [0x84,0xf9,0x4f,0x01] +@ CHECK: vst2.8 {d0[2], d1[2]}, [r4:16] @ encoding: [0x84,0xf9,0x5f,0x01] +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vst2.8 {d0[2], d1[2]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vst2.8 {d0[2], d1[2]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vst2.8 {d0[2], d1[2]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vst2.8 {d0[2], d1[2]}, [r4:256] +@ CHECK-ERRORS: ^ + + vst2.8 {d0[2], d1[2]}, [r4]! + vst2.8 {d0[2], d1[2]}, [r4:16]! + vst2.8 {d0[2], d1[2]}, [r4:32]! + vst2.8 {d0[2], d1[2]}, [r4:64]! + vst2.8 {d0[2], d1[2]}, [r4:128]! + vst2.8 {d0[2], d1[2]}, [r4:256]! + +@ CHECK: vst2.8 {d0[2], d1[2]}, [r4]! @ encoding: [0x84,0xf9,0x4d,0x01] +@ CHECK: vst2.8 {d0[2], d1[2]}, [r4:16]! @ encoding: [0x84,0xf9,0x5d,0x01] +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vst2.8 {d0[2], d1[2]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vst2.8 {d0[2], d1[2]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vst2.8 {d0[2], d1[2]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vst2.8 {d0[2], d1[2]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst2.8 {d0[2], d1[2]}, [r4], r6 + vst2.8 {d0[2], d1[2]}, [r4:16], r6 + vst2.8 {d0[2], d1[2]}, [r4:32], r6 + vst2.8 {d0[2], d1[2]}, [r4:64], r6 + vst2.8 {d0[2], d1[2]}, [r4:128], r6 + vst2.8 {d0[2], d1[2]}, [r4:256], r6 + +@ CHECK: vst2.8 {d0[2], d1[2]}, [r4], r6 @ encoding: [0x84,0xf9,0x46,0x01] +@ CHECK: vst2.8 {d0[2], d1[2]}, [r4:16], r6 @ encoding: [0x84,0xf9,0x56,0x01] +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vst2.8 {d0[2], d1[2]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vst2.8 {d0[2], d1[2]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vst2.8 {d0[2], d1[2]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 16 or omitted +@ CHECK-ERRORS: vst2.8 {d0[2], d1[2]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst2.32 {d0, d1}, [r4] + vst2.32 {d0, d1}, [r4:16] + vst2.32 {d0, d1}, [r4:32] + vst2.32 {d0, d1}, [r4:64] + vst2.32 {d0, d1}, [r4:128] + vst2.32 {d0, d1}, [r4:256] + +@ CHECK: vst2.32 {d0, d1}, [r4] @ encoding: [0x04,0xf9,0x8f,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.32 {d0, d1}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.32 {d0, d1}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst2.32 {d0, d1}, [r4:64] @ encoding: [0x04,0xf9,0x9f,0x08] +@ CHECK: vst2.32 {d0, d1}, [r4:128] @ encoding: [0x04,0xf9,0xaf,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.32 {d0, d1}, [r4:256] +@ CHECK-ERRORS: ^ + + vst2.32 {d0, d1}, [r4]! + vst2.32 {d0, d1}, [r4:16]! + vst2.32 {d0, d1}, [r4:32]! + vst2.32 {d0, d1}, [r4:64]! + vst2.32 {d0, d1}, [r4:128]! + vst2.32 {d0, d1}, [r4:256]! + +@ CHECK: vst2.32 {d0, d1}, [r4]! @ encoding: [0x04,0xf9,0x8d,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.32 {d0, d1}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.32 {d0, d1}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst2.32 {d0, d1}, [r4:64]! @ encoding: [0x04,0xf9,0x9d,0x08] +@ CHECK: vst2.32 {d0, d1}, [r4:128]! @ encoding: [0x04,0xf9,0xad,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.32 {d0, d1}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst2.32 {d0, d1}, [r4], r6 + vst2.32 {d0, d1}, [r4:16], r6 + vst2.32 {d0, d1}, [r4:32], r6 + vst2.32 {d0, d1}, [r4:64], r6 + vst2.32 {d0, d1}, [r4:128], r6 + vst2.32 {d0, d1}, [r4:256], r6 + +@ CHECK: vst2.32 {d0, d1}, [r4], r6 @ encoding: [0x04,0xf9,0x86,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.32 {d0, d1}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.32 {d0, d1}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst2.32 {d0, d1}, [r4:64], r6 @ encoding: [0x04,0xf9,0x96,0x08] +@ CHECK: vst2.32 {d0, d1}, [r4:128], r6 @ encoding: [0x04,0xf9,0xa6,0x08] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.32 {d0, d1}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst2.32 {d0, d2}, [r4] + vst2.32 {d0, d2}, [r4:16] + vst2.32 {d0, d2}, [r4:32] + vst2.32 {d0, d2}, [r4:64] + vst2.32 {d0, d2}, [r4:128] + vst2.32 {d0, d2}, [r4:256] + +@ CHECK: vst2.32 {d0, d2}, [r4] @ encoding: [0x04,0xf9,0x8f,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.32 {d0, d2}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.32 {d0, d2}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst2.32 {d0, d2}, [r4:64] @ encoding: [0x04,0xf9,0x9f,0x09] +@ CHECK: vst2.32 {d0, d2}, [r4:128] @ encoding: [0x04,0xf9,0xaf,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.32 {d0, d2}, [r4:256] +@ CHECK-ERRORS: ^ + + vst2.32 {d0, d2}, [r4]! + vst2.32 {d0, d2}, [r4:16]! + vst2.32 {d0, d2}, [r4:32]! + vst2.32 {d0, d2}, [r4:64]! + vst2.32 {d0, d2}, [r4:128]! + vst2.32 {d0, d2}, [r4:256]! + +@ CHECK: vst2.32 {d0, d2}, [r4]! @ encoding: [0x04,0xf9,0x8d,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.32 {d0, d2}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.32 {d0, d2}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst2.32 {d0, d2}, [r4:64]! @ encoding: [0x04,0xf9,0x9d,0x09] +@ CHECK: vst2.32 {d0, d2}, [r4:128]! @ encoding: [0x04,0xf9,0xad,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.32 {d0, d2}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst2.32 {d0, d2}, [r4], r6 + vst2.32 {d0, d2}, [r4:16], r6 + vst2.32 {d0, d2}, [r4:32], r6 + vst2.32 {d0, d2}, [r4:64], r6 + vst2.32 {d0, d2}, [r4:128], r6 + vst2.32 {d0, d2}, [r4:256], r6 + +@ CHECK: vst2.32 {d0, d2}, [r4], r6 @ encoding: [0x04,0xf9,0x86,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.32 {d0, d2}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.32 {d0, d2}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst2.32 {d0, d2}, [r4:64], r6 @ encoding: [0x04,0xf9,0x96,0x09] +@ CHECK: vst2.32 {d0, d2}, [r4:128], r6 @ encoding: [0x04,0xf9,0xa6,0x09] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst2.32 {d0, d2}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst2.32 {d0, d1, d2, d3}, [r4] + vst2.32 {d0, d1, d2, d3}, [r4:16] + vst2.32 {d0, d1, d2, d3}, [r4:32] + vst2.32 {d0, d1, d2, d3}, [r4:64] + vst2.32 {d0, d1, d2, d3}, [r4:128] + vst2.32 {d0, d1, d2, d3}, [r4:256] + +@ CHECK: vst2.32 {d0, d1, d2, d3}, [r4] @ encoding: [0x04,0xf9,0x8f,0x03] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst2.32 {d0, d1, d2, d3}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst2.32 {d0, d1, d2, d3}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst2.32 {d0, d1, d2, d3}, [r4:64] @ encoding: [0x04,0xf9,0x9f,0x03] +@ CHECK: vst2.32 {d0, d1, d2, d3}, [r4:128] @ encoding: [0x04,0xf9,0xaf,0x03] +@ CHECK: vst2.32 {d0, d1, d2, d3}, [r4:256] @ encoding: [0x04,0xf9,0xbf,0x03] + + vst2.32 {d0, d1, d2, d3}, [r4]! + vst2.32 {d0, d1, d2, d3}, [r4:16]! + vst2.32 {d0, d1, d2, d3}, [r4:32]! + vst2.32 {d0, d1, d2, d3}, [r4:64]! + vst2.32 {d0, d1, d2, d3}, [r4:128]! + vst2.32 {d0, d1, d2, d3}, [r4:256]! + +@ CHECK: vst2.32 {d0, d1, d2, d3}, [r4]! @ encoding: [0x04,0xf9,0x8d,0x03] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst2.32 {d0, d1, d2, d3}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst2.32 {d0, d1, d2, d3}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst2.32 {d0, d1, d2, d3}, [r4:64]! @ encoding: [0x04,0xf9,0x9d,0x03] +@ CHECK: vst2.32 {d0, d1, d2, d3}, [r4:128]! @ encoding: [0x04,0xf9,0xad,0x03] +@ CHECK: vst2.32 {d0, d1, d2, d3}, [r4:256]! @ encoding: [0x04,0xf9,0xbd,0x03] + + vst2.32 {d0, d1, d2, d3}, [r4], r6 + vst2.32 {d0, d1, d2, d3}, [r4:16], r6 + vst2.32 {d0, d1, d2, d3}, [r4:32], r6 + vst2.32 {d0, d1, d2, d3}, [r4:64], r6 + vst2.32 {d0, d1, d2, d3}, [r4:128], r6 + vst2.32 {d0, d1, d2, d3}, [r4:256], r6 + +@ CHECK: vst2.32 {d0, d1, d2, d3}, [r4], r6 @ encoding: [0x04,0xf9,0x86,0x03] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst2.32 {d0, d1, d2, d3}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst2.32 {d0, d1, d2, d3}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst2.32 {d0, d1, d2, d3}, [r4:64], r6 @ encoding: [0x04,0xf9,0x96,0x03] +@ CHECK: vst2.32 {d0, d1, d2, d3}, [r4:128], r6 @ encoding: [0x04,0xf9,0xa6,0x03] +@ CHECK: vst2.32 {d0, d1, d2, d3}, [r4:256], r6 @ encoding: [0x04,0xf9,0xb6,0x03] + + vst2.32 {d0[1], d1[1]}, [r4] + vst2.32 {d0[1], d1[1]}, [r4:16] + vst2.32 {d0[1], d1[1]}, [r4:32] + vst2.32 {d0[1], d1[1]}, [r4:64] + vst2.32 {d0[1], d1[1]}, [r4:128] + vst2.32 {d0[1], d1[1]}, [r4:256] + +@ CHECK: vst2.32 {d0[1], d1[1]}, [r4] @ encoding: [0x84,0xf9,0x8f,0x09] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst2.32 {d0[1], d1[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst2.32 {d0[1], d1[1]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst2.32 {d0[1], d1[1]}, [r4:64] @ encoding: [0x84,0xf9,0x9f,0x09] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst2.32 {d0[1], d1[1]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst2.32 {d0[1], d1[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vst2.32 {d0[1], d1[1]}, [r4]! + vst2.32 {d0[1], d1[1]}, [r4:16]! + vst2.32 {d0[1], d1[1]}, [r4:32]! + vst2.32 {d0[1], d1[1]}, [r4:64]! + vst2.32 {d0[1], d1[1]}, [r4:128]! + vst2.32 {d0[1], d1[1]}, [r4:256]! + +@ CHECK: vst2.32 {d0[1], d1[1]}, [r4]! @ encoding: [0x84,0xf9,0x8d,0x09] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst2.32 {d0[1], d1[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst2.32 {d0[1], d1[1]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst2.32 {d0[1], d1[1]}, [r4:64]! @ encoding: [0x84,0xf9,0x9d,0x09] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst2.32 {d0[1], d1[1]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst2.32 {d0[1], d1[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst2.32 {d0[1], d1[1]}, [r4], r6 + vst2.32 {d0[1], d1[1]}, [r4:16], r6 + vst2.32 {d0[1], d1[1]}, [r4:32], r6 + vst2.32 {d0[1], d1[1]}, [r4:64], r6 + vst2.32 {d0[1], d1[1]}, [r4:128], r6 + vst2.32 {d0[1], d1[1]}, [r4:256], r6 + +@ CHECK: vst2.32 {d0[1], d1[1]}, [r4], r6 @ encoding: [0x84,0xf9,0x86,0x09] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst2.32 {d0[1], d1[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst2.32 {d0[1], d1[1]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst2.32 {d0[1], d1[1]}, [r4:64], r6 @ encoding: [0x84,0xf9,0x96,0x09] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst2.32 {d0[1], d1[1]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst2.32 {d0[1], d1[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst2.32 {d0[1], d2[1]}, [r4] + vst2.32 {d0[1], d2[1]}, [r4:16] + vst2.32 {d0[1], d2[1]}, [r4:32] + vst2.32 {d0[1], d2[1]}, [r4:64] + vst2.32 {d0[1], d2[1]}, [r4:128] + vst2.32 {d0[1], d2[1]}, [r4:256] + +@ CHECK: vst2.32 {d0[1], d2[1]}, [r4] @ encoding: [0x84,0xf9,0xcf,0x09] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst2.32 {d0[1], d2[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst2.32 {d0[1], d2[1]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst2.32 {d0[1], d2[1]}, [r4:64] @ encoding: [0x84,0xf9,0xdf,0x09] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst2.32 {d0[1], d2[1]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst2.32 {d0[1], d2[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vst2.32 {d0[1], d2[1]}, [r4]! + vst2.32 {d0[1], d2[1]}, [r4:16]! + vst2.32 {d0[1], d2[1]}, [r4:32]! + vst2.32 {d0[1], d2[1]}, [r4:64]! + vst2.32 {d0[1], d2[1]}, [r4:128]! + vst2.32 {d0[1], d2[1]}, [r4:256]! + +@ CHECK: vst2.32 {d0[1], d2[1]}, [r4]! @ encoding: [0x84,0xf9,0xcd,0x09] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst2.32 {d0[1], d2[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst2.32 {d0[1], d2[1]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst2.32 {d0[1], d2[1]}, [r4:64]! @ encoding: [0x84,0xf9,0xdd,0x09] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst2.32 {d0[1], d2[1]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst2.32 {d0[1], d2[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst2.32 {d0[1], d2[1]}, [r4], r6 + vst2.32 {d0[1], d2[1]}, [r4:16], r6 + vst2.32 {d0[1], d2[1]}, [r4:32], r6 + vst2.32 {d0[1], d2[1]}, [r4:64], r6 + vst2.32 {d0[1], d2[1]}, [r4:128], r6 + vst2.32 {d0[1], d2[1]}, [r4:256], r6 + +@ CHECK: vst2.32 {d0[1], d2[1]}, [r4], r6 @ encoding: [0x84,0xf9,0xc6,0x09] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst2.32 {d0[1], d2[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst2.32 {d0[1], d2[1]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst2.32 {d0[1], d2[1]}, [r4:64], r6 @ encoding: [0x84,0xf9,0xd6,0x09] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst2.32 {d0[1], d2[1]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst2.32 {d0[1], d2[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst3.8 {d0, d1, d2}, [r4] + vst3.8 {d0, d1, d2}, [r4:16] + vst3.8 {d0, d1, d2}, [r4:32] + vst3.8 {d0, d1, d2}, [r4:64] + vst3.8 {d0, d1, d2}, [r4:128] + vst3.8 {d0, d1, d2}, [r4:256] + +@ CHECK: vst3.8 {d0, d1, d2}, [r4] @ encoding: [0x04,0xf9,0x0f,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.8 {d0, d1, d2}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.8 {d0, d1, d2}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst3.8 {d0, d1, d2}, [r4:64] @ encoding: [0x04,0xf9,0x1f,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.8 {d0, d1, d2}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.8 {d0, d1, d2}, [r4:256] +@ CHECK-ERRORS: ^ + + vst3.8 {d0, d1, d2}, [r4]! + vst3.8 {d0, d1, d2}, [r4:16]! + vst3.8 {d0, d1, d2}, [r4:32]! + vst3.8 {d0, d1, d2}, [r4:64]! + vst3.8 {d0, d1, d2}, [r4:128]! + vst3.8 {d0, d1, d2}, [r4:256]! + +@ CHECK: vst3.8 {d0, d1, d2}, [r4]! @ encoding: [0x04,0xf9,0x0d,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.8 {d0, d1, d2}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.8 {d0, d1, d2}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst3.8 {d0, d1, d2}, [r4:64]! @ encoding: [0x04,0xf9,0x1d,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.8 {d0, d1, d2}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.8 {d0, d1, d2}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst3.8 {d0, d1, d2}, [r4], r6 + vst3.8 {d0, d1, d2}, [r4:16], r6 + vst3.8 {d0, d1, d2}, [r4:32], r6 + vst3.8 {d0, d1, d2}, [r4:64], r6 + vst3.8 {d0, d1, d2}, [r4:128], r6 + vst3.8 {d0, d1, d2}, [r4:256], r6 + +@ CHECK: vst3.8 {d0, d1, d2}, [r4], r6 @ encoding: [0x04,0xf9,0x06,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.8 {d0, d1, d2}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.8 {d0, d1, d2}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst3.8 {d0, d1, d2}, [r4:64], r6 @ encoding: [0x04,0xf9,0x16,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.8 {d0, d1, d2}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.8 {d0, d1, d2}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst3.8 {d0, d2, d4}, [r4] + vst3.8 {d0, d2, d4}, [r4:16] + vst3.8 {d0, d2, d4}, [r4:32] + vst3.8 {d0, d2, d4}, [r4:64] + vst3.8 {d0, d2, d4}, [r4:128] + vst3.8 {d0, d2, d4}, [r4:256] + +@ CHECK: vst3.8 {d0, d2, d4}, [r4] @ encoding: [0x04,0xf9,0x0f,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.8 {d0, d2, d4}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.8 {d0, d2, d4}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst3.8 {d0, d2, d4}, [r4:64] @ encoding: [0x04,0xf9,0x1f,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.8 {d0, d2, d4}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.8 {d0, d2, d4}, [r4:256] +@ CHECK-ERRORS: ^ + + vst3.8 {d0, d2, d4}, [r4]! + vst3.8 {d0, d2, d4}, [r4:16]! + vst3.8 {d0, d2, d4}, [r4:32]! + vst3.8 {d0, d2, d4}, [r4:64]! + vst3.8 {d0, d2, d4}, [r4:128]! + vst3.8 {d0, d2, d4}, [r4:256]! + +@ CHECK: vst3.8 {d0, d2, d4}, [r4]! @ encoding: [0x04,0xf9,0x0d,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.8 {d0, d2, d4}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.8 {d0, d2, d4}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst3.8 {d0, d2, d4}, [r4:64]! @ encoding: [0x04,0xf9,0x1d,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.8 {d0, d2, d4}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.8 {d0, d2, d4}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst3.8 {d0, d2, d4}, [r4], r6 + vst3.8 {d0, d2, d4}, [r4:16], r6 + vst3.8 {d0, d2, d4}, [r4:32], r6 + vst3.8 {d0, d2, d4}, [r4:64], r6 + vst3.8 {d0, d2, d4}, [r4:128], r6 + vst3.8 {d0, d2, d4}, [r4:256], r6 + +@ CHECK: vst3.8 {d0, d2, d4}, [r4], r6 @ encoding: [0x04,0xf9,0x06,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.8 {d0, d2, d4}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.8 {d0, d2, d4}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst3.8 {d0, d2, d4}, [r4:64], r6 @ encoding: [0x04,0xf9,0x16,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.8 {d0, d2, d4}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.8 {d0, d2, d4}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst3.8 {d0[1], d1[1], d2[1]}, [r4] + vst3.8 {d0[1], d1[1], d2[1]}, [r4:16] + vst3.8 {d0[1], d1[1], d2[1]}, [r4:32] + vst3.8 {d0[1], d1[1], d2[1]}, [r4:64] + vst3.8 {d0[1], d1[1], d2[1]}, [r4:128] + vst3.8 {d0[1], d1[1], d2[1]}, [r4:256] + +@ CHECK: vst3.8 {d0[1], d1[1], d2[1]}, [r4] @ encoding: [0x84,0xf9,0x2f,0x02] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.8 {d0[1], d1[1], d2[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.8 {d0[1], d1[1], d2[1]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.8 {d0[1], d1[1], d2[1]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.8 {d0[1], d1[1], d2[1]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.8 {d0[1], d1[1], d2[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vst3.8 {d0[1], d1[1], d2[1]}, [r4]! + vst3.8 {d0[1], d1[1], d2[1]}, [r4:16]! + vst3.8 {d0[1], d1[1], d2[1]}, [r4:32]! + vst3.8 {d0[1], d1[1], d2[1]}, [r4:64]! + vst3.8 {d0[1], d1[1], d2[1]}, [r4:128]! + vst3.8 {d0[1], d1[1], d2[1]}, [r4:256]! + +@ CHECK: vst3.8 {d0[1], d1[1], d2[1]}, [r4]! @ encoding: [0x84,0xf9,0x2d,0x02] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.8 {d0[1], d1[1], d2[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.8 {d0[1], d1[1], d2[1]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.8 {d0[1], d1[1], d2[1]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.8 {d0[1], d1[1], d2[1]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.8 {d0[1], d1[1], d2[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst3.8 {d0[1], d1[1], d2[1]}, [r4], r6 + vst3.8 {d0[1], d1[1], d2[1]}, [r4:16], r6 + vst3.8 {d0[1], d1[1], d2[1]}, [r4:32], r6 + vst3.8 {d0[1], d1[1], d2[1]}, [r4:64], r6 + vst3.8 {d0[1], d1[1], d2[1]}, [r4:128], r6 + vst3.8 {d0[1], d1[1], d2[1]}, [r4:256], r6 + +@ CHECK: vst3.8 {d0[1], d1[1], d2[1]}, [r4], r6 @ encoding: [0x84,0xf9,0x26,0x02] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.8 {d0[1], d1[1], d2[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.8 {d0[1], d1[1], d2[1]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.8 {d0[1], d1[1], d2[1]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.8 {d0[1], d1[1], d2[1]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.8 {d0[1], d1[1], d2[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst3.16 {d0, d1, d2}, [r4] + vst3.16 {d0, d1, d2}, [r4:16] + vst3.16 {d0, d1, d2}, [r4:32] + vst3.16 {d0, d1, d2}, [r4:64] + vst3.16 {d0, d1, d2}, [r4:128] + vst3.16 {d0, d1, d2}, [r4:256] + +@ CHECK: vst3.16 {d0, d1, d2}, [r4] @ encoding: [0x04,0xf9,0x4f,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.16 {d0, d1, d2}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.16 {d0, d1, d2}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst3.16 {d0, d1, d2}, [r4:64] @ encoding: [0x04,0xf9,0x5f,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.16 {d0, d1, d2}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.16 {d0, d1, d2}, [r4:256] +@ CHECK-ERRORS: ^ + + vst3.16 {d0, d1, d2}, [r4]! + vst3.16 {d0, d1, d2}, [r4:16]! + vst3.16 {d0, d1, d2}, [r4:32]! + vst3.16 {d0, d1, d2}, [r4:64]! + vst3.16 {d0, d1, d2}, [r4:128]! + vst3.16 {d0, d1, d2}, [r4:256]! + +@ CHECK: vst3.16 {d0, d1, d2}, [r4]! @ encoding: [0x04,0xf9,0x4d,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.16 {d0, d1, d2}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.16 {d0, d1, d2}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst3.16 {d0, d1, d2}, [r4:64]! @ encoding: [0x04,0xf9,0x5d,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.16 {d0, d1, d2}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.16 {d0, d1, d2}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst3.16 {d0, d1, d2}, [r4], r6 + vst3.16 {d0, d1, d2}, [r4:16], r6 + vst3.16 {d0, d1, d2}, [r4:32], r6 + vst3.16 {d0, d1, d2}, [r4:64], r6 + vst3.16 {d0, d1, d2}, [r4:128], r6 + vst3.16 {d0, d1, d2}, [r4:256], r6 + +@ CHECK: vst3.16 {d0, d1, d2}, [r4], r6 @ encoding: [0x04,0xf9,0x46,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.16 {d0, d1, d2}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.16 {d0, d1, d2}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst3.16 {d0, d1, d2}, [r4:64], r6 @ encoding: [0x04,0xf9,0x56,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.16 {d0, d1, d2}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.16 {d0, d1, d2}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst3.16 {d0, d2, d4}, [r4] + vst3.16 {d0, d2, d4}, [r4:16] + vst3.16 {d0, d2, d4}, [r4:32] + vst3.16 {d0, d2, d4}, [r4:64] + vst3.16 {d0, d2, d4}, [r4:128] + vst3.16 {d0, d2, d4}, [r4:256] + +@ CHECK: vst3.16 {d0, d2, d4}, [r4] @ encoding: [0x04,0xf9,0x4f,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.16 {d0, d2, d4}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.16 {d0, d2, d4}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst3.16 {d0, d2, d4}, [r4:64] @ encoding: [0x04,0xf9,0x5f,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.16 {d0, d2, d4}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.16 {d0, d2, d4}, [r4:256] +@ CHECK-ERRORS: ^ + + vst3.16 {d0, d2, d4}, [r4]! + vst3.16 {d0, d2, d4}, [r4:16]! + vst3.16 {d0, d2, d4}, [r4:32]! + vst3.16 {d0, d2, d4}, [r4:64]! + vst3.16 {d0, d2, d4}, [r4:128]! + vst3.16 {d0, d2, d4}, [r4:256]! + +@ CHECK: vst3.16 {d0, d2, d4}, [r4]! @ encoding: [0x04,0xf9,0x4d,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.16 {d0, d2, d4}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.16 {d0, d2, d4}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst3.16 {d0, d2, d4}, [r4:64]! @ encoding: [0x04,0xf9,0x5d,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.16 {d0, d2, d4}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.16 {d0, d2, d4}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst3.16 {d0, d2, d4}, [r4], r6 + vst3.16 {d0, d2, d4}, [r4:16], r6 + vst3.16 {d0, d2, d4}, [r4:32], r6 + vst3.16 {d0, d2, d4}, [r4:64], r6 + vst3.16 {d0, d2, d4}, [r4:128], r6 + vst3.16 {d0, d2, d4}, [r4:256], r6 + +@ CHECK: vst3.16 {d0, d2, d4}, [r4], r6 @ encoding: [0x04,0xf9,0x46,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.16 {d0, d2, d4}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.16 {d0, d2, d4}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst3.16 {d0, d2, d4}, [r4:64], r6 @ encoding: [0x04,0xf9,0x56,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.16 {d0, d2, d4}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.16 {d0, d2, d4}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst3.16 {d0[1], d1[1], d2[1]}, [r4] + vst3.16 {d0[1], d1[1], d2[1]}, [r4:16] + vst3.16 {d0[1], d1[1], d2[1]}, [r4:32] + vst3.16 {d0[1], d1[1], d2[1]}, [r4:64] + vst3.16 {d0[1], d1[1], d2[1]}, [r4:128] + vst3.16 {d0[1], d1[1], d2[1]}, [r4:256] + +@ CHECK: vst3.16 {d0[1], d1[1], d2[1]}, [r4] @ encoding: [0x84,0xf9,0x4f,0x06] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d1[1], d2[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d1[1], d2[1]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d1[1], d2[1]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d1[1], d2[1]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d1[1], d2[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vst3.16 {d0[1], d1[1], d2[1]}, [r4]! + vst3.16 {d0[1], d1[1], d2[1]}, [r4:16]! + vst3.16 {d0[1], d1[1], d2[1]}, [r4:32]! + vst3.16 {d0[1], d1[1], d2[1]}, [r4:64]! + vst3.16 {d0[1], d1[1], d2[1]}, [r4:128]! + vst3.16 {d0[1], d1[1], d2[1]}, [r4:256]! + +@ CHECK: vst3.16 {d0[1], d1[1], d2[1]}, [r4]! @ encoding: [0x84,0xf9,0x4d,0x06] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d1[1], d2[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d1[1], d2[1]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d1[1], d2[1]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d1[1], d2[1]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d1[1], d2[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst3.16 {d0[1], d1[1], d2[1]}, [r4], r6 + vst3.16 {d0[1], d1[1], d2[1]}, [r4:16], r6 + vst3.16 {d0[1], d1[1], d2[1]}, [r4:32], r6 + vst3.16 {d0[1], d1[1], d2[1]}, [r4:64], r6 + vst3.16 {d0[1], d1[1], d2[1]}, [r4:128], r6 + vst3.16 {d0[1], d1[1], d2[1]}, [r4:256], r6 + +@ CHECK: vst3.16 {d0[1], d1[1], d2[1]}, [r4], r6 @ encoding: [0x84,0xf9,0x46,0x06] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d1[1], d2[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d1[1], d2[1]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d1[1], d2[1]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d1[1], d2[1]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d1[1], d2[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst3.16 {d0[1], d2[1], d4[1]}, [r4] + vst3.16 {d0[1], d2[1], d4[1]}, [r4:16] + vst3.16 {d0[1], d2[1], d4[1]}, [r4:32] + vst3.16 {d0[1], d2[1], d4[1]}, [r4:64] + vst3.16 {d0[1], d2[1], d4[1]}, [r4:128] + vst3.16 {d0[1], d2[1], d4[1]}, [r4:256] + +@ CHECK: vst3.16 {d0[1], d2[1], d4[1]}, [r4] @ encoding: [0x84,0xf9,0x6f,0x06] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d2[1], d4[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d2[1], d4[1]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d2[1], d4[1]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d2[1], d4[1]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d2[1], d4[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vst3.16 {d0[1], d2[1], d4[1]}, [r4]! + vst3.16 {d0[1], d2[1], d4[1]}, [r4:16]! + vst3.16 {d0[1], d2[1], d4[1]}, [r4:32]! + vst3.16 {d0[1], d2[1], d4[1]}, [r4:64]! + vst3.16 {d0[1], d2[1], d4[1]}, [r4:128]! + vst3.16 {d0[1], d2[1], d4[1]}, [r4:256]! + +@ CHECK: vst3.16 {d0[1], d1[1], d2[1]}, [r4]! @ encoding: [0x84,0xf9,0x6d,0x06] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d2[1], d4[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d2[1], d4[1]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d2[1], d4[1]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d2[1], d4[1]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d2[1], d4[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst3.16 {d0[1], d2[1], d4[1]}, [r4], r6 + vst3.16 {d0[1], d2[1], d4[1]}, [r4:16], r6 + vst3.16 {d0[1], d2[1], d4[1]}, [r4:32], r6 + vst3.16 {d0[1], d2[1], d4[1]}, [r4:64], r6 + vst3.16 {d0[1], d2[1], d4[1]}, [r4:128], r6 + vst3.16 {d0[1], d2[1], d4[1]}, [r4:256], r6 + +@ CHECK: vst3.16 {d0[1], d2[1], d4[1]}, [r4], r6 @ encoding: [0x84,0xf9,0x66,0x06] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d2[1], d4[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d2[1], d4[1]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d2[1], d4[1]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d2[1], d4[1]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.16 {d0[1], d2[1], d4[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst3.32 {d0, d1, d2}, [r4] + vst3.32 {d0, d1, d2}, [r4:16] + vst3.32 {d0, d1, d2}, [r4:32] + vst3.32 {d0, d1, d2}, [r4:64] + vst3.32 {d0, d1, d2}, [r4:128] + vst3.32 {d0, d1, d2}, [r4:256] + +@ CHECK: vst3.32 {d0, d1, d2}, [r4] @ encoding: [0x04,0xf9,0x8f,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.32 {d0, d1, d2}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.32 {d0, d1, d2}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst3.32 {d0, d1, d2}, [r4:64] @ encoding: [0x04,0xf9,0x9f,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.32 {d0, d1, d2}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.32 {d0, d1, d2}, [r4:256] +@ CHECK-ERRORS: ^ + + vst3.32 {d0, d1, d2}, [r4]! + vst3.32 {d0, d1, d2}, [r4:16]! + vst3.32 {d0, d1, d2}, [r4:32]! + vst3.32 {d0, d1, d2}, [r4:64]! + vst3.32 {d0, d1, d2}, [r4:128]! + vst3.32 {d0, d1, d2}, [r4:256]! + +@ CHECK: vst3.32 {d0, d1, d2}, [r4]! @ encoding: [0x04,0xf9,0x8d,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.32 {d0, d1, d2}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.32 {d0, d1, d2}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst3.32 {d0, d1, d2}, [r4:64]! @ encoding: [0x04,0xf9,0x9d,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.32 {d0, d1, d2}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.32 {d0, d1, d2}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst3.32 {d0, d1, d2}, [r4], r6 + vst3.32 {d0, d1, d2}, [r4:16], r6 + vst3.32 {d0, d1, d2}, [r4:32], r6 + vst3.32 {d0, d1, d2}, [r4:64], r6 + vst3.32 {d0, d1, d2}, [r4:128], r6 + vst3.32 {d0, d1, d2}, [r4:256], r6 + +@ CHECK: vst3.32 {d0, d1, d2}, [r4], r6 @ encoding: [0x04,0xf9,0x86,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.32 {d0, d1, d2}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.32 {d0, d1, d2}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst3.32 {d0, d1, d2}, [r4:64], r6 @ encoding: [0x04,0xf9,0x96,0x04] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.32 {d0, d1, d2}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.32 {d0, d1, d2}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst3.32 {d0, d2, d4}, [r4] + vst3.32 {d0, d2, d4}, [r4:16] + vst3.32 {d0, d2, d4}, [r4:32] + vst3.32 {d0, d2, d4}, [r4:64] + vst3.32 {d0, d2, d4}, [r4:128] + vst3.32 {d0, d2, d4}, [r4:256] + +@ CHECK: vst3.32 {d0, d2, d4}, [r4] @ encoding: [0x04,0xf9,0x8f,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.32 {d0, d2, d4}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.32 {d0, d2, d4}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst3.32 {d0, d2, d4}, [r4:64] @ encoding: [0x04,0xf9,0x9f,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.32 {d0, d2, d4}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.32 {d0, d2, d4}, [r4:256] +@ CHECK-ERRORS: ^ + + vst3.32 {d0, d2, d4}, [r4]! + vst3.32 {d0, d2, d4}, [r4:16]! + vst3.32 {d0, d2, d4}, [r4:32]! + vst3.32 {d0, d2, d4}, [r4:64]! + vst3.32 {d0, d2, d4}, [r4:128]! + vst3.32 {d0, d2, d4}, [r4:256]! + +@ CHECK: vst3.32 {d0, d2, d4}, [r4]! @ encoding: [0x04,0xf9,0x8d,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.32 {d0, d2, d4}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.32 {d0, d2, d4}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst3.32 {d0, d2, d4}, [r4:64]! @ encoding: [0x04,0xf9,0x9d,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.32 {d0, d2, d4}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.32 {d0, d2, d4}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst3.32 {d0, d2, d4}, [r4], r6 + vst3.32 {d0, d2, d4}, [r4:16], r6 + vst3.32 {d0, d2, d4}, [r4:32], r6 + vst3.32 {d0, d2, d4}, [r4:64], r6 + vst3.32 {d0, d2, d4}, [r4:128], r6 + vst3.32 {d0, d2, d4}, [r4:256], r6 + +@ CHECK: vst3.32 {d0, d2, d4}, [r4], r6 @ encoding: [0x04,0xf9,0x86,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.32 {d0, d2, d4}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.32 {d0, d2, d4}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst3.32 {d0, d2, d4}, [r4:64], r6 @ encoding: [0x04,0xf9,0x96,0x05] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.32 {d0, d2, d4}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst3.32 {d0, d2, d4}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst3.32 {d0[1], d1[1], d2[1]}, [r4] + vst3.32 {d0[1], d1[1], d2[1]}, [r4:16] + vst3.32 {d0[1], d1[1], d2[1]}, [r4:32] + vst3.32 {d0[1], d1[1], d2[1]}, [r4:64] + vst3.32 {d0[1], d1[1], d2[1]}, [r4:128] + vst3.32 {d0[1], d1[1], d2[1]}, [r4:256] + +@ CHECK: vst3.32 {d0[1], d1[1], d2[1]}, [r4] @ encoding: [0x84,0xf9,0x8f,0x0a] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d1[1], d2[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d1[1], d2[1]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d1[1], d2[1]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d1[1], d2[1]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d1[1], d2[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vst3.32 {d0[1], d1[1], d2[1]}, [r4]! + vst3.32 {d0[1], d1[1], d2[1]}, [r4:16]! + vst3.32 {d0[1], d1[1], d2[1]}, [r4:32]! + vst3.32 {d0[1], d1[1], d2[1]}, [r4:64]! + vst3.32 {d0[1], d1[1], d2[1]}, [r4:128]! + vst3.32 {d0[1], d1[1], d2[1]}, [r4:256]! + +@ CHECK: vst3.32 {d0[1], d1[1], d2[1]}, [r4]! @ encoding: [0x84,0xf9,0x8d,0x0a] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d1[1], d2[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d1[1], d2[1]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d1[1], d2[1]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d1[1], d2[1]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d1[1], d2[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst3.32 {d0[1], d1[1], d2[1]}, [r4], r6 + vst3.32 {d0[1], d1[1], d2[1]}, [r4:16], r6 + vst3.32 {d0[1], d1[1], d2[1]}, [r4:32], r6 + vst3.32 {d0[1], d1[1], d2[1]}, [r4:64], r6 + vst3.32 {d0[1], d1[1], d2[1]}, [r4:128], r6 + vst3.32 {d0[1], d1[1], d2[1]}, [r4:256], r6 + +@ CHECK: vst3.32 {d0[1], d1[1], d2[1]}, [r4], r6 @ encoding: [0x84,0xf9,0x86,0x0a] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d1[1], d2[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d1[1], d2[1]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d1[1], d2[1]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d1[1], d2[1]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d1[1], d2[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst3.32 {d0[1], d2[1], d4[1]}, [r4] + vst3.32 {d0[1], d2[1], d4[1]}, [r4:16] + vst3.32 {d0[1], d2[1], d4[1]}, [r4:32] + vst3.32 {d0[1], d2[1], d4[1]}, [r4:64] + vst3.32 {d0[1], d2[1], d4[1]}, [r4:128] + vst3.32 {d0[1], d2[1], d4[1]}, [r4:256] + +@ CHECK: vst3.32 {d0[1], d2[1], d4[1]}, [r4] @ encoding: [0x84,0xf9,0xcf,0x0a] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d2[1], d4[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d2[1], d4[1]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d2[1], d4[1]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d2[1], d4[1]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d2[1], d4[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vst3.32 {d0[1], d2[1], d4[1]}, [r4]! + vst3.32 {d0[1], d2[1], d4[1]}, [r4:16]! + vst3.32 {d0[1], d2[1], d4[1]}, [r4:32]! + vst3.32 {d0[1], d2[1], d4[1]}, [r4:64]! + vst3.32 {d0[1], d2[1], d4[1]}, [r4:128]! + vst3.32 {d0[1], d2[1], d4[1]}, [r4:256]! + +@ CHECK: vst3.32 {d0[1], d2[1], d4[1]}, [r4]! @ encoding: [0x84,0xf9,0xcd,0x0a] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d2[1], d4[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d2[1], d4[1]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d2[1], d4[1]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d2[1], d4[1]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d2[1], d4[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst3.32 {d0[1], d2[1], d4[1]}, [r4], r6 + vst3.32 {d0[1], d2[1], d4[1]}, [r4:16], r6 + vst3.32 {d0[1], d2[1], d4[1]}, [r4:32], r6 + vst3.32 {d0[1], d2[1], d4[1]}, [r4:64], r6 + vst3.32 {d0[1], d2[1], d4[1]}, [r4:128], r6 + vst3.32 {d0[1], d2[1], d4[1]}, [r4:256], r6 + +@ CHECK: vst3.32 {d0[1], d2[1], d4[1]}, [r4], r6 @ encoding: [0x84,0xf9,0xc6,0x0a] +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d2[1], d4[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d2[1], d4[1]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d2[1], d4[1]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d2[1], d4[1]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be omitted +@ CHECK-ERRORS: vst3.32 {d0[1], d2[1], d4[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst4.8 {d0, d1, d2, d3}, [r4] + vst4.8 {d0, d1, d2, d3}, [r4:16] + vst4.8 {d0, d1, d2, d3}, [r4:32] + vst4.8 {d0, d1, d2, d3}, [r4:64] + vst4.8 {d0, d1, d2, d3}, [r4:128] + vst4.8 {d0, d1, d2, d3}, [r4:256] + +@ CHECK: vst4.8 {d0, d1, d2, d3}, [r4] @ encoding: [0x04,0xf9,0x0f,0x00] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.8 {d0, d1, d2, d3}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.8 {d0, d1, d2, d3}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst4.8 {d0, d1, d2, d3}, [r4:64] @ encoding: [0x04,0xf9,0x1f,0x00] +@ CHECK: vst4.8 {d0, d1, d2, d3}, [r4:128] @ encoding: [0x04,0xf9,0x2f,0x00] +@ CHECK: vst4.8 {d0, d1, d2, d3}, [r4:256] @ encoding: [0x04,0xf9,0x3f,0x00] + + vst4.8 {d0, d1, d2, d3}, [r4]! + vst4.8 {d0, d1, d2, d3}, [r4:16]! + vst4.8 {d0, d1, d2, d3}, [r4:32]! + vst4.8 {d0, d1, d2, d3}, [r4:64]! + vst4.8 {d0, d1, d2, d3}, [r4:128]! + vst4.8 {d0, d1, d2, d3}, [r4:256]! + +@ CHECK: vst4.8 {d0, d1, d2, d3}, [r4]! @ encoding: [0x04,0xf9,0x0d,0x00] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.8 {d0, d1, d2, d3}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.8 {d0, d1, d2, d3}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst4.8 {d0, d1, d2, d3}, [r4:64]! @ encoding: [0x04,0xf9,0x1d,0x00] +@ CHECK: vst4.8 {d0, d1, d2, d3}, [r4:128]! @ encoding: [0x04,0xf9,0x2d,0x00] +@ CHECK: vst4.8 {d0, d1, d2, d3}, [r4:256]! @ encoding: [0x04,0xf9,0x3d,0x00] + + vst4.8 {d0, d1, d2, d3}, [r4], r6 + vst4.8 {d0, d1, d2, d3}, [r4:16], r6 + vst4.8 {d0, d1, d2, d3}, [r4:32], r6 + vst4.8 {d0, d1, d2, d3}, [r4:64], r6 + vst4.8 {d0, d1, d2, d3}, [r4:128], r6 + vst4.8 {d0, d1, d2, d3}, [r4:256], r6 + +@ CHECK: vst4.8 {d0, d1, d2, d3}, [r4], r6 @ encoding: [0x04,0xf9,0x06,0x00] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.8 {d0, d1, d2, d3}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.8 {d0, d1, d2, d3}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst4.8 {d0, d1, d2, d3}, [r4:64], r6 @ encoding: [0x04,0xf9,0x16,0x00] +@ CHECK: vst4.8 {d0, d1, d2, d3}, [r4:128], r6 @ encoding: [0x04,0xf9,0x26,0x00] +@ CHECK: vst4.8 {d0, d1, d2, d3}, [r4:256], r6 @ encoding: [0x04,0xf9,0x36,0x00] + + vst4.8 {d0, d2, d4, d6}, [r4] + vst4.8 {d0, d2, d4, d6}, [r4:16] + vst4.8 {d0, d2, d4, d6}, [r4:32] + vst4.8 {d0, d2, d4, d6}, [r4:64] + vst4.8 {d0, d2, d4, d6}, [r4:128] + vst4.8 {d0, d2, d4, d6}, [r4:256] + +@ CHECK: vst4.8 {d0, d2, d4, d6}, [r4] @ encoding: [0x04,0xf9,0x0f,0x01] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.8 {d0, d2, d4, d6}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.8 {d0, d2, d4, d6}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst4.8 {d0, d2, d4, d6}, [r4:64] @ encoding: [0x04,0xf9,0x1f,0x01] +@ CHECK: vst4.8 {d0, d2, d4, d6}, [r4:128] @ encoding: [0x04,0xf9,0x2f,0x01] +@ CHECK: vst4.8 {d0, d2, d4, d6}, [r4:256] @ encoding: [0x04,0xf9,0x3f,0x01] + + vst4.8 {d0, d2, d4, d6}, [r4]! + vst4.8 {d0, d2, d4, d6}, [r4:16]! + vst4.8 {d0, d2, d4, d6}, [r4:32]! + vst4.8 {d0, d2, d4, d6}, [r4:64]! + vst4.8 {d0, d2, d4, d6}, [r4:128]! + vst4.8 {d0, d2, d4, d6}, [r4:256]! + +@ CHECK: vst4.8 {d0, d2, d4, d6}, [r4]! @ encoding: [0x04,0xf9,0x0d,0x01] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.8 {d0, d2, d4, d6}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.8 {d0, d2, d4, d6}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst4.8 {d0, d2, d4, d6}, [r4:64]! @ encoding: [0x04,0xf9,0x1d,0x01] +@ CHECK: vst4.8 {d0, d2, d4, d6}, [r4:128]! @ encoding: [0x04,0xf9,0x2d,0x01] +@ CHECK: vst4.8 {d0, d2, d4, d6}, [r4:256]! @ encoding: [0x04,0xf9,0x3d,0x01] + + vst4.8 {d0, d2, d4, d6}, [r4], r6 + vst4.8 {d0, d2, d4, d6}, [r4:16], r6 + vst4.8 {d0, d2, d4, d6}, [r4:32], r6 + vst4.8 {d0, d2, d4, d6}, [r4:64], r6 + vst4.8 {d0, d2, d4, d6}, [r4:128], r6 + vst4.8 {d0, d2, d4, d6}, [r4:256], r6 + +@ CHECK: vst4.8 {d0, d2, d4, d6}, [r4], r6 @ encoding: [0x04,0xf9,0x06,0x01] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.8 {d0, d2, d4, d6}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.8 {d0, d2, d4, d6}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst4.8 {d0, d2, d4, d6}, [r4:64], r6 @ encoding: [0x04,0xf9,0x16,0x01] +@ CHECK: vst4.8 {d0, d2, d4, d6}, [r4:128], r6 @ encoding: [0x04,0xf9,0x26,0x01] +@ CHECK: vst4.8 {d0, d2, d4, d6}, [r4:256], r6 @ encoding: [0x04,0xf9,0x36,0x01] + + vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4] + vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:16] + vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:32] + vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:64] + vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:128] + vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:256] + +@ CHECK: vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4] @ encoding: [0x84,0xf9,0x2f,0x03] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK: vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:32] @ encoding: [0x84,0xf9,0x3f,0x03] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:64] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4]! + vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:16]! + vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:32]! + vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:64]! + vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:128]! + vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:256]! + +@ CHECK: vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4]! @ encoding: [0x84,0xf9,0x2d,0x03] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK: vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:32]! @ encoding: [0x84,0xf9,0x3d,0x03] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:64]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4], r6 + vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:16], r6 + vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:32], r6 + vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:64], r6 + vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:128], r6 + vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:256], r6 + +@ CHECK: vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4], r6 @ encoding: [0x84,0xf9,0x26,0x03] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:32], r6 @ encoding: [0x84,0xf9,0x36,0x03] +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:64], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 32 or omitted +@ CHECK-ERRORS: vst4.8 {d0[1], d1[1], d2[1], d3[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst4.16 {d0, d1, d2, d3}, [r4] + vst4.16 {d0, d1, d2, d3}, [r4:16] + vst4.16 {d0, d1, d2, d3}, [r4:32] + vst4.16 {d0, d1, d2, d3}, [r4:64] + vst4.16 {d0, d1, d2, d3}, [r4:128] + vst4.16 {d0, d1, d2, d3}, [r4:256] + +@ CHECK: vst4.16 {d0, d1, d2, d3}, [r4] @ encoding: [0x04,0xf9,0x4f,0x00] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.16 {d0, d1, d2, d3}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.16 {d0, d1, d2, d3}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst4.16 {d0, d1, d2, d3}, [r4:64] @ encoding: [0x04,0xf9,0x5f,0x00] +@ CHECK: vst4.16 {d0, d1, d2, d3}, [r4:128] @ encoding: [0x04,0xf9,0x6f,0x00] +@ CHECK: vst4.16 {d0, d1, d2, d3}, [r4:256] @ encoding: [0x04,0xf9,0x7f,0x00] + + vst4.16 {d0, d1, d2, d3}, [r4]! + vst4.16 {d0, d1, d2, d3}, [r4:16]! + vst4.16 {d0, d1, d2, d3}, [r4:32]! + vst4.16 {d0, d1, d2, d3}, [r4:64]! + vst4.16 {d0, d1, d2, d3}, [r4:128]! + vst4.16 {d0, d1, d2, d3}, [r4:256]! + +@ CHECK: vst4.16 {d0, d1, d2, d3}, [r4]! @ encoding: [0x04,0xf9,0x4d,0x00] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.16 {d0, d1, d2, d3}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.16 {d0, d1, d2, d3}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst4.16 {d0, d1, d2, d3}, [r4:64]! @ encoding: [0x04,0xf9,0x5d,0x00] +@ CHECK: vst4.16 {d0, d1, d2, d3}, [r4:128]! @ encoding: [0x04,0xf9,0x6d,0x00] +@ CHECK: vst4.16 {d0, d1, d2, d3}, [r4:256]! @ encoding: [0x04,0xf9,0x7d,0x00] + + vst4.16 {d0, d1, d2, d3}, [r4], r6 + vst4.16 {d0, d1, d2, d3}, [r4:16], r6 + vst4.16 {d0, d1, d2, d3}, [r4:32], r6 + vst4.16 {d0, d1, d2, d3}, [r4:64], r6 + vst4.16 {d0, d1, d2, d3}, [r4:128], r6 + vst4.16 {d0, d1, d2, d3}, [r4:256], r6 + +@ CHECK: vst4.16 {d0, d1, d2, d3}, [r4], r6 @ encoding: [0x04,0xf9,0x46,0x00] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.16 {d0, d1, d2, d3}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.16 {d0, d1, d2, d3}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst4.16 {d0, d1, d2, d3}, [r4:64], r6 @ encoding: [0x04,0xf9,0x56,0x00] +@ CHECK: vst4.16 {d0, d1, d2, d3}, [r4:128], r6 @ encoding: [0x04,0xf9,0x66,0x00] +@ CHECK: vst4.16 {d0, d1, d2, d3}, [r4:256], r6 @ encoding: [0x04,0xf9,0x76,0x00] + + vst4.16 {d0, d2, d4, d6}, [r4] + vst4.16 {d0, d2, d4, d6}, [r4:16] + vst4.16 {d0, d2, d4, d6}, [r4:32] + vst4.16 {d0, d2, d4, d6}, [r4:64] + vst4.16 {d0, d2, d4, d6}, [r4:128] + vst4.16 {d0, d2, d4, d6}, [r4:256] + +@ CHECK: vst4.16 {d0, d2, d4, d6}, [r4] @ encoding: [0x04,0xf9,0x4f,0x01] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.16 {d0, d2, d4, d6}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.16 {d0, d2, d4, d6}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst4.16 {d0, d2, d4, d6}, [r4:64] @ encoding: [0x04,0xf9,0x5f,0x01] +@ CHECK: vst4.16 {d0, d2, d4, d6}, [r4:128] @ encoding: [0x04,0xf9,0x6f,0x01] +@ CHECK: vst4.16 {d0, d2, d4, d6}, [r4:256] @ encoding: [0x04,0xf9,0x7f,0x01] + + vst4.16 {d0, d2, d4, d6}, [r4]! + vst4.16 {d0, d2, d4, d6}, [r4:16]! + vst4.16 {d0, d2, d4, d6}, [r4:32]! + vst4.16 {d0, d2, d4, d6}, [r4:64]! + vst4.16 {d0, d2, d4, d6}, [r4:128]! + vst4.16 {d0, d2, d4, d6}, [r4:256]! + +@ CHECK: vst4.16 {d0, d2, d4, d6}, [r4]! @ encoding: [0x04,0xf9,0x4d,0x01] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.16 {d0, d2, d4, d6}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.16 {d0, d2, d4, d6}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst4.16 {d0, d2, d4, d6}, [r4:64]! @ encoding: [0x04,0xf9,0x5d,0x01] +@ CHECK: vst4.16 {d0, d2, d4, d6}, [r4:128]! @ encoding: [0x04,0xf9,0x6d,0x01] +@ CHECK: vst4.16 {d0, d2, d4, d6}, [r4:256]! @ encoding: [0x04,0xf9,0x7d,0x01] + + vst4.16 {d0, d2, d4, d6}, [r4], r6 + vst4.16 {d0, d2, d4, d6}, [r4:16], r6 + vst4.16 {d0, d2, d4, d6}, [r4:32], r6 + vst4.16 {d0, d2, d4, d6}, [r4:64], r6 + vst4.16 {d0, d2, d4, d6}, [r4:128], r6 + vst4.16 {d0, d2, d4, d6}, [r4:256], r6 + +@ CHECK: vst4.16 {d0, d2, d4, d6}, [r4], r6 @ encoding: [0x04,0xf9,0x46,0x01] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.16 {d0, d2, d4, d6}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.16 {d0, d2, d4, d6}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst4.16 {d0, d2, d4, d6}, [r4:64], r6 @ encoding: [0x04,0xf9,0x56,0x01] +@ CHECK: vst4.16 {d0, d2, d4, d6}, [r4:128], r6 @ encoding: [0x04,0xf9,0x66,0x01] +@ CHECK: vst4.16 {d0, d2, d4, d6}, [r4:256], r6 @ encoding: [0x04,0xf9,0x76,0x01] + + vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4] + vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:16] + vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:32] + vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:64] + vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:128] + vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:256] + +@ CHECK: vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4] @ encoding: [0x84,0xf9,0x4f,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:64] @ encoding: [0x84,0xf9,0x5f,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4]! + vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:16]! + vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:32]! + vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:64]! + vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:128]! + vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:256]! + +@ CHECK: vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4]! @ encoding: [0x84,0xf9,0x4d,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:64]! @ encoding: [0x84,0xf9,0x5d,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4], r6 + vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:16], r6 + vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:32], r6 + vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:64], r6 + vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:128], r6 + vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:256], r6 + +@ CHECK: vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4], r6 @ encoding: [0x84,0xf9,0x46,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:64], r6 @ encoding: [0x84,0xf9,0x56,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4] + vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:16] + vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:32] + vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:64] + vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:128] + vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:256] + +@ CHECK: vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4] @ encoding: [0x84,0xf9,0x6f,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:64] @ encoding: [0x84,0xf9,0x7f,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:128] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4]! + vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:16]! + vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:32]! + vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:64]! + vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:128]! + vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:256]! + +@ CHECK: vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4]! @ encoding: [0x84,0xf9,0x6d,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r4:64]! @ encoding: [0x84,0xf9,0x7d,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:128]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4], r6 + vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:16], r6 + vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:32], r6 + vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:64], r6 + vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:128], r6 + vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:256], r6 + +@ CHECK: vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4], r6 @ encoding: [0x84,0xf9,0x66,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:64], r6 @ encoding: [0x84,0xf9,0x76,0x07] +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:128], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64 or omitted +@ CHECK-ERRORS: vst4.16 {d0[1], d2[1], d4[1], d6[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst4.32 {d0, d1, d2, d3}, [r4] + vst4.32 {d0, d1, d2, d3}, [r4:16] + vst4.32 {d0, d1, d2, d3}, [r4:32] + vst4.32 {d0, d1, d2, d3}, [r4:64] + vst4.32 {d0, d1, d2, d3}, [r4:128] + vst4.32 {d0, d1, d2, d3}, [r4:256] + +@ CHECK: vst4.32 {d0, d1, d2, d3}, [r4] @ encoding: [0x04,0xf9,0x8f,0x00] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.32 {d0, d1, d2, d3}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.32 {d0, d1, d2, d3}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst4.32 {d0, d1, d2, d3}, [r4:64] @ encoding: [0x04,0xf9,0x9f,0x00] +@ CHECK: vst4.32 {d0, d1, d2, d3}, [r4:128] @ encoding: [0x04,0xf9,0xaf,0x00] +@ CHECK: vst4.32 {d0, d1, d2, d3}, [r4:256] @ encoding: [0x04,0xf9,0xbf,0x00] + + vst4.32 {d0, d1, d2, d3}, [r4]! + vst4.32 {d0, d1, d2, d3}, [r4:16]! + vst4.32 {d0, d1, d2, d3}, [r4:32]! + vst4.32 {d0, d1, d2, d3}, [r4:64]! + vst4.32 {d0, d1, d2, d3}, [r4:128]! + vst4.32 {d0, d1, d2, d3}, [r4:256]! + +@ CHECK: vst4.32 {d0, d1, d2, d3}, [r4]! @ encoding: [0x04,0xf9,0x8d,0x00] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.32 {d0, d1, d2, d3}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.32 {d0, d1, d2, d3}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst4.32 {d0, d1, d2, d3}, [r4:64]! @ encoding: [0x04,0xf9,0x9d,0x00] +@ CHECK: vst4.32 {d0, d1, d2, d3}, [r4:128]! @ encoding: [0x04,0xf9,0xad,0x00] +@ CHECK: vst4.32 {d0, d1, d2, d3}, [r4:256]! @ encoding: [0x04,0xf9,0xbd,0x00] + + vst4.32 {d0, d1, d2, d3}, [r4], r6 + vst4.32 {d0, d1, d2, d3}, [r4:16], r6 + vst4.32 {d0, d1, d2, d3}, [r4:32], r6 + vst4.32 {d0, d1, d2, d3}, [r4:64], r6 + vst4.32 {d0, d1, d2, d3}, [r4:128], r6 + vst4.32 {d0, d1, d2, d3}, [r4:256], r6 + +@ CHECK: vst4.32 {d0, d1, d2, d3}, [r4], r6 @ encoding: [0x04,0xf9,0x86,0x00] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.32 {d0, d1, d2, d3}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.32 {d0, d1, d2, d3}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst4.32 {d0, d1, d2, d3}, [r4:64], r6 @ encoding: [0x04,0xf9,0x96,0x00] +@ CHECK: vst4.32 {d0, d1, d2, d3}, [r4:128], r6 @ encoding: [0x04,0xf9,0xa6,0x00] +@ CHECK: vst4.32 {d0, d1, d2, d3}, [r4:256], r6 @ encoding: [0x04,0xf9,0xb6,0x00] + + vst4.32 {d0, d2, d4, d6}, [r4] + vst4.32 {d0, d2, d4, d6}, [r4:16] + vst4.32 {d0, d2, d4, d6}, [r4:32] + vst4.32 {d0, d2, d4, d6}, [r4:64] + vst4.32 {d0, d2, d4, d6}, [r4:128] + vst4.32 {d0, d2, d4, d6}, [r4:256] + +@ CHECK: vst4.32 {d0, d2, d4, d6}, [r4] @ encoding: [0x04,0xf9,0x8f,0x01] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.32 {d0, d2, d4, d6}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.32 {d0, d2, d4, d6}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst4.32 {d0, d2, d4, d6}, [r4:64] @ encoding: [0x04,0xf9,0x9f,0x01] +@ CHECK: vst4.32 {d0, d2, d4, d6}, [r4:128] @ encoding: [0x04,0xf9,0xaf,0x01] +@ CHECK: vst4.32 {d0, d2, d4, d6}, [r4:256] @ encoding: [0x04,0xf9,0xbf,0x01] + + vst4.32 {d0, d2, d4, d6}, [r4]! + vst4.32 {d0, d2, d4, d6}, [r4:16]! + vst4.32 {d0, d2, d4, d6}, [r4:32]! + vst4.32 {d0, d2, d4, d6}, [r4:64]! + vst4.32 {d0, d2, d4, d6}, [r4:128]! + vst4.32 {d0, d2, d4, d6}, [r4:256]! + +@ CHECK: vst4.32 {d0, d2, d4, d6}, [r4]! @ encoding: [0x04,0xf9,0x8d,0x01] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.32 {d0, d2, d4, d6}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.32 {d0, d2, d4, d6}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst4.32 {d0, d2, d4, d6}, [r4:64]! @ encoding: [0x04,0xf9,0x9d,0x01] +@ CHECK: vst4.32 {d0, d2, d4, d6}, [r4:128]! @ encoding: [0x04,0xf9,0xad,0x01] +@ CHECK: vst4.32 {d0, d2, d4, d6}, [r4:256]! @ encoding: [0x04,0xf9,0xbd,0x01] + + vst4.32 {d0, d2, d4, d6}, [r4], r6 + vst4.32 {d0, d2, d4, d6}, [r4:16], r6 + vst4.32 {d0, d2, d4, d6}, [r4:32], r6 + vst4.32 {d0, d2, d4, d6}, [r4:64], r6 + vst4.32 {d0, d2, d4, d6}, [r4:128], r6 + vst4.32 {d0, d2, d4, d6}, [r4:256], r6 + +@ CHECK: vst4.32 {d0, d2, d4, d6}, [r4], r6 @ encoding: [0x04,0xf9,0x86,0x01] +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.32 {d0, d2, d4, d6}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128, 256 or omitted +@ CHECK-ERRORS: vst4.32 {d0, d2, d4, d6}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst4.32 {d0, d2, d4, d6}, [r4:64], r6 @ encoding: [0x04,0xf9,0x96,0x01] +@ CHECK: vst4.32 {d0, d2, d4, d6}, [r4:128], r6 @ encoding: [0x04,0xf9,0xa6,0x01] +@ CHECK: vst4.32 {d0, d2, d4, d6}, [r4:256], r6 @ encoding: [0x04,0xf9,0xb6,0x01] + + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4] + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:16] + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:32] + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:64] + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:128] + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:256] + +@ CHECK: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4] @ encoding: [0x84,0xf9,0x8f,0x0b] +@ CHECK-ERRORS: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:64] @ encoding: [0x84,0xf9,0x9f,0x0b] +@ CHECK: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:128] @ encoding: [0x84,0xf9,0xaf,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4]! + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:16]! + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:32]! + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:64]! + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:128]! + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:256]! + +@ CHECK: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4]! @ encoding: [0x84,0xf9,0x8d,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:64]! @ encoding: [0x84,0xf9,0x9d,0x0b] +@ CHECK: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:128]! @ encoding: [0x84,0xf9,0xad,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4], r6 + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:16], r6 + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:32], r6 + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:64], r6 + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:128], r6 + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:256], r6 + +@ CHECK: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4], r6 @ encoding: [0x84,0xf9,0x86,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:64], r6 @ encoding: [0x84,0xf9,0x96,0x0b] +@ CHECK: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:128], r6 @ encoding: [0x84,0xf9,0xa6,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4] + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:16] + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:32] + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:64] + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:128] + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:256] + +@ CHECK: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4] @ encoding: [0x84,0xf9,0xcf,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:64] @ encoding: [0x84,0xf9,0xdf,0x0b] +@ CHECK: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:128] @ encoding: [0x84,0xf9,0xef,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4]! + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:16]! + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:32]! + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:64]! + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:128]! + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:256]! + +@ CHECK: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4]! @ encoding: [0x84,0xf9,0xcd,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:64]! @ encoding: [0x84,0xf9,0xdd,0x0b] +@ CHECK: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:128]! @ encoding: [0x84,0xf9,0xed,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4], r6 + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:16], r6 + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:32], r6 + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:64], r6 + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:128], r6 + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:256], r6 + +@ CHECK: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4], r6 @ encoding: [0x84,0xf9,0xc6,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:64], r6 @ encoding: [0x84,0xf9,0xd6,0x0b] +@ CHECK: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:128], r6 @ encoding: [0x84,0xf9,0xe6,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4]! + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:16]! + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:32]! + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:64]! + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:128]! + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:256]! + +@ CHECK: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4]! @ encoding: [0x84,0xf9,0x8d,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:64]! @ encoding: [0x84,0xf9,0x9d,0x0b] +@ CHECK: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:128]! @ encoding: [0x84,0xf9,0xad,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4], r6 + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:16], r6 + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:32], r6 + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:64], r6 + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:128], r6 + vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:256], r6 + +@ CHECK: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4], r6 @ encoding: [0x84,0xf9,0x86,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:64], r6 @ encoding: [0x84,0xf9,0x96,0x0b] +@ CHECK: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:128], r6 @ encoding: [0x84,0xf9,0xa6,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d1[1], d2[1], d3[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ + + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4] + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:16] + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:32] + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:64] + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:128] + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:256] + +@ CHECK: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4] @ encoding: [0x84,0xf9,0xcf,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:16] +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:32] +@ CHECK-ERRORS: ^ +@ CHECK: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:64] @ encoding: [0x84,0xf9,0xdf,0x0b] +@ CHECK: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:128] @ encoding: [0x84,0xf9,0xef,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:256] +@ CHECK-ERRORS: ^ + + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4]! + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:16]! + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:32]! + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:64]! + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:128]! + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:256]! + +@ CHECK: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4]! @ encoding: [0x84,0xf9,0xcd,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:16]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:32]! +@ CHECK-ERRORS: ^ +@ CHECK: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:64]! @ encoding: [0x84,0xf9,0xdd,0x0b] +@ CHECK: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:128]! @ encoding: [0x84,0xf9,0xed,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:256]! +@ CHECK-ERRORS: ^ + + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4], r6 + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:16], r6 + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:32], r6 + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:64], r6 + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:128], r6 + vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:256], r6 + +@ CHECK: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4], r6 @ encoding: [0x84,0xf9,0xc6,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:16], r6 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:32], r6 +@ CHECK-ERRORS: ^ +@ CHECK: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:64], r6 @ encoding: [0x84,0xf9,0xd6,0x0b] +@ CHECK: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:128], r6 @ encoding: [0x84,0xf9,0xe6,0x0b] +@ CHECK-ERRORS: error: alignment must be 64, 128 or omitted +@ CHECK-ERRORS: vst4.32 {d0[1], d2[1], d4[1], d6[1]}, [r4:256], r6 +@ CHECK-ERRORS: ^ diff --git a/test/MC/ARM/not-armv4.s b/test/MC/ARM/not-armv4.s new file mode 100644 index 000000000000..a1ba611a61e4 --- /dev/null +++ b/test/MC/ARM/not-armv4.s @@ -0,0 +1,8 @@ +@ RUN: not llvm-mc < %s -triple armv4-unknown-unknown -show-encoding 2>&1 | FileCheck %s + +@ PR18524 +@ CHECK: error: instruction requires: armv5t +clz r4,r9 + +@ CHECK: error: instruction requires: armv6t2 +rbit r4,r9 diff --git a/test/MC/ARM/pool.s b/test/MC/ARM/pool.s new file mode 100644 index 000000000000..782f67e1fea5 --- /dev/null +++ b/test/MC/ARM/pool.s @@ -0,0 +1,19 @@ +@ RUN: llvm-mc -triple thumbv7-linux-gnueabi -o - %s | FileCheck %s + + .syntax unified + + .align 2 + .global pool + .type pool,%function +pool: + ldr r0, =0xba5eba11 + bx lr + .pool + +@ CHECK-LABEL: pool +@ CHECK: ldr r0, .Ltmp0 +@ CHECK: .align 2 +@ CHECK-LABEL: .Ltmp0: +@ CHECK: .long 3126770193 + + diff --git a/test/MC/ARM/simple-fp-encoding.s b/test/MC/ARM/simple-fp-encoding.s index d840e9cd798a..539dd2c4d976 100644 --- a/test/MC/ARM/simple-fp-encoding.s +++ b/test/MC/ARM/simple-fp-encoding.s @@ -395,3 +395,46 @@ @ CHECK: vmov.i32 d4, #0x0 @ encoding: [0x10,0x40,0x80,0xf2] @ CHECK: vmov.i32 d4, #0x42000000 @ encoding: [0x12,0x46,0x84,0xf2] + +@ Test encoding of floating point constants for vmov functions +@ vfp3 + vmov.f32 s5, #1.0 + vmov.f32 s5, #0.125 + vmov.f32 s5, #-1.875 + vmov.f32 s5, #-0.59375 + + vmov.f64 d6, #1.0 + vmov.f64 d6, #0.125 + vmov.f64 d6, #-1.875 + vmov.f64 d6, #-0.59375 + +@ neon + vmov.f32 d7, #1.0 + vmov.f32 d7, #0.125 + vmov.f32 d7, #-1.875 + vmov.f32 d7, #-0.59375 + + vmov.f32 q8, #1.0 + vmov.f32 q8, #0.125 + vmov.f32 q8, #-1.875 + vmov.f32 q8, #-0.59375 + +@ CHECK: vmov.f32 s5, #1.000000e+00 @ encoding: [0x00,0x2a,0xf7,0xee] +@ CHECK: vmov.f32 s5, #1.250000e-01 @ encoding: [0x00,0x2a,0xf4,0xee] +@ CHECK: vmov.f32 s5, #-1.875000e+00 @ encoding: [0x0e,0x2a,0xff,0xee] +@ CHECK: vmov.f32 s5, #-5.937500e-01 @ encoding: [0x03,0x2a,0xfe,0xee] + +@ CHECK: vmov.f64 d6, #1.000000e+00 @ encoding: [0x00,0x6b,0xb7,0xee] +@ CHECK: vmov.f64 d6, #1.250000e-01 @ encoding: [0x00,0x6b,0xb4,0xee] +@ CHECK: vmov.f64 d6, #-1.875000e+00 @ encoding: [0x0e,0x6b,0xbf,0xee] +@ CHECK: vmov.f64 d6, #-5.937500e-01 @ encoding: [0x03,0x6b,0xbe,0xee] + +@ CHECK: vmov.f32 d7, #1.000000e+00 @ encoding: [0x10,0x7f,0x87,0xf2] +@ CHECK: vmov.f32 d7, #1.250000e-01 @ encoding: [0x10,0x7f,0x84,0xf2] +@ CHECK: vmov.f32 d7, #-1.875000e+00 @ encoding: [0x1e,0x7f,0x87,0xf3] +@ CHECK: vmov.f32 d7, #-5.937500e-01 @ encoding: [0x13,0x7f,0x86,0xf3] + +@ CHECK: vmov.f32 q8, #1.000000e+00 @ encoding: [0x50,0x0f,0xc7,0xf2] +@ CHECK: vmov.f32 q8, #1.250000e-01 @ encoding: [0x50,0x0f,0xc4,0xf2] +@ CHECK: vmov.f32 q8, #-1.875000e+00 @ encoding: [0x5e,0x0f,0xc7,0xf3] +@ CHECK: vmov.f32 q8, #-5.937500e-01 @ encoding: [0x53,0x0f,0xc6,0xf3] diff --git a/test/MC/ARM/symbol-variants-errors.s b/test/MC/ARM/symbol-variants-errors.s new file mode 100644 index 000000000000..03401cd98b7e --- /dev/null +++ b/test/MC/ARM/symbol-variants-errors.s @@ -0,0 +1,23 @@ +@ RUN: not llvm-mc < %s -triple armv7-none-linux-gnueabi 2>&1 | FileCheck %s + +@ check for invalid variant +f1: + bl bar(blargh) +@CHECK: error: invalid variant 'blargh' +@CHECK: bl bar(blargh) +@CHECK: ^ + +@ check for missing closed paren +f2: + .word bar(got +@CHECK: error: unexpected token in variant, expected ')' +@CHECK: .word bar(got +@CHECK: ^ + +@ check for invalid symbol before variant end +f3: + .word bar(got+2) + +@CHECK: error: unexpected token in variant, expected ')' +@CHECK: .word bar(got+2) +@CHECK: ^ diff --git a/test/MC/ARM/symbol-variants.s b/test/MC/ARM/symbol-variants.s new file mode 100644 index 000000000000..a10fe5029e0a --- /dev/null +++ b/test/MC/ARM/symbol-variants.s @@ -0,0 +1,91 @@ +@ RUN: llvm-mc < %s -triple armv7-none-linux-gnueabi -filetype=obj | llvm-objdump -triple armv7-none-linux-gnueabi -r - | FileCheck %s --check-prefix=CHECK --check-prefix=ARM +@ RUN: llvm-mc < %s -triple thumbv7-none-linux-gnueabi -filetype=obj | llvm-objdump -triple thumbv7-none-linux-gnueabi -r - | FileCheck %s --check-prefix=CHECK --check-prefix=THUMB + +@ CHECK-LABEL: RELOCATION RECORDS FOR [.rel.text] +.Lsym: + +@ empty +.word f00 +.word f01 +@CHECK: 0 R_ARM_ABS32 f00 +@CHECK: 4 R_ARM_ABS32 f01 + +@ none +.word f02(NONE) +.word f03(none) +@CHECK: 8 R_ARM_NONE f02 +@CHECK: c R_ARM_NONE f03 + +@ plt +bl f04(PLT) +bl f05(plt) +@ARM: 10 R_ARM_PLT32 f04 +@ARM: 14 R_ARM_PLT32 f05 +@THUMB: 10 R_ARM_THM_CALL f04 +@THUMB: 14 R_ARM_THM_CALL f05 + +@ got +.word f06(GOT) +.word f07(got) +@CHECK: 18 R_ARM_GOT_BREL f06 +@CHECK: 1c R_ARM_GOT_BREL f07 + +@ gotoff +.word f08(GOTOFF) +.word f09(gotoff) +@CHECK: 20 R_ARM_GOTOFF32 f08 +@CHECK: 24 R_ARM_GOTOFF32 f09 + +@ tpoff +.word f10(TPOFF) +.word f11(tpoff) +@CHECK: 28 R_ARM_TLS_LE32 f10 +@CHECK: 2c R_ARM_TLS_LE32 f11 + +@ tlsgd +.word f12(TLSGD) +.word f13(tlsgd) +@CHECK: 30 R_ARM_TLS_GD32 f12 +@CHECK: 34 R_ARM_TLS_GD32 f13 + +@ target1 +.word f14(TARGET1) +.word f15(target1) +@CHECK: 38 R_ARM_TARGET1 f14 +@CHECK: 3c R_ARM_TARGET1 f15 + +@ target2 +.word f16(TARGET2) +.word f17(target2) +@CHECK: 40 R_ARM_TARGET2 f16 +@CHECK: 44 R_ARM_TARGET2 f17 + +@ prel31 +.word f18(PREL31) +.word f19(prel31) +@CHECK: 48 R_ARM_PREL31 f18 +@CHECK: 4c R_ARM_PREL31 f19 + +@ tlsldo +.word f20(TLSLDO) +.word f21(tlsldo) +@CHECK: 50 R_ARM_TLS_LDO32 f20 +@CHECK: 54 R_ARM_TLS_LDO32 f21 + +@ tlscall +.word f22(TLSCALL) +.word f23(tlscall) +@ CHECK: 58 R_ARM_TLS_CALL f22 +@ CHECK: 5c R_ARM_TLS_CALL f23 + +@ tlsdesc +.word f24(TLSDESC) +.word f25(tlsdesc) +@ CHECK: 60 R_ARM_TLS_GOTDESC f24 +@ CHECK: 64 R_ARM_TLS_GOTDESC f25 + +@ got_prel +.word f26(GOT_PREL) + (. - .Lsym) + ldr r3, =f27(GOT_PREL) +@ CHECK: 68 R_ARM_GOT_PREL f26 +@ CHECK: 70 R_ARM_GOT_PREL f27 diff --git a/test/MC/ARM/target-expressions.s b/test/MC/ARM/target-expressions.s new file mode 100644 index 000000000000..c87cd22b2bad --- /dev/null +++ b/test/MC/ARM/target-expressions.s @@ -0,0 +1,80 @@ +@ RUN: llvm-mc -triple armv7-eabi -filetype asm -o - %s | FileCheck %s +@ RUN: llvm-mc -triple armv7-eabi -filetype obj -o - %s | llvm-readobj -r \ +@ RUN: | FileCheck -check-prefix CHECK-RELOCATIONS %s + + .syntax unified + + .type function,%function +function: + bx lr + + .global external + .type external,%function + +.set deadbeat, 0xdeadbea7 + + .type test,%function +test: + movw r0, :lower16:function + movt r0, :upper16:function + + movw r1, #:lower16:function + movt r1, #:upper16:function + + movw r2, :lower16:deadbeat + movt r2, :upper16:deadbeat + + movw r3, #:lower16:deadbeat + movt r3, #:upper16:deadbeat + + movw r4, :lower16:0xD1510D6E + movt r4, :upper16:0xD1510D6E + + movw r5, #:lower16:0xD1510D6E + movt r5, #:upper16:0xD1510D6E + + movw r0, :lower16:external + movt r0, :upper16:external + + movw r1, #:lower16:external + movt r1, #:upper16:external + + movw r2, #:lower16:(16 + 16) + movt r2, #:upper16:(16 + 16) + + movw r3, :lower16:(16 + 16) + movt r3, :upper16:(16 + 16) + +@ CHECK-LABEL: test: +@ CHECK: movw r0, :lower16:function +@ CHECK: movt r0, :upper16:function +@ CHECK: movw r1, :lower16:function +@ CHECK: movt r1, :upper16:function +@ CHECK: movw r2, :lower16:(3735928487) +@ CHECK: movt r2, :upper16:(3735928487) +@ CHECK: movw r3, :lower16:(3735928487) +@ CHECK: movt r3, :upper16:(3735928487) +@ CHECK: movw r4, :lower16:(3511749998) +@ CHECK: movt r4, :upper16:(3511749998) +@ CHECK: movw r5, :lower16:(3511749998) +@ CHECK: movt r5, :upper16:(3511749998) +@ CHECK: movw r0, :lower16:external +@ CHECK: movt r0, :upper16:external +@ CHECK: movw r1, :lower16:external +@ CHECK: movt r1, :upper16:external +@ CHECK: movw r2, :lower16:(32) +@ CHECK: movt r2, :upper16:(32) +@ CHECK: movw r3, :lower16:(32) +@ CHECK: movt r3, :upper16:(32) + +@ CHECK-RELOCATIONS: Relocations [ +@ CHECK-RELOCATIONS: 0x4 R_ARM_MOVW_ABS_NC function 0x0 +@ CHECK-RELOCATIONS: 0x8 R_ARM_MOVT_ABS function 0x0 +@ CHECK-RELOCATIONS: 0xC R_ARM_MOVW_ABS_NC function 0x0 +@ CHECK-RELOCATIONS: 0x10 R_ARM_MOVT_ABS function 0x0 +@ CHECK-RELOCATIONS: 0x34 R_ARM_MOVW_ABS_NC external 0x0 +@ CHECK-RELOCATIONS: 0x38 R_ARM_MOVT_ABS external 0x0 +@ CHECK-RELOCATIONS: 0x3C R_ARM_MOVW_ABS_NC external 0x0 +@ CHECK-RELOCATIONS: 0x40 R_ARM_MOVT_ABS external 0x0 +@ CHECK-RELOCATIONS: ] + diff --git a/test/MC/ARM/thumb-far-jump.s b/test/MC/ARM/thumb-far-jump.s new file mode 100644 index 000000000000..2fd2c567d133 --- /dev/null +++ b/test/MC/ARM/thumb-far-jump.s @@ -0,0 +1,26 @@ +@ RUN: llvm-mc < %s -triple thumbv5-linux-gnueabi -filetype=obj -o - \ +@ RUN: | llvm-readobj -r | FileCheck %s + .syntax unified + + .text + .align 2 + .globl main + .type main,%function + .thumb_func +main: + bl end + .space 8192 +end: + bl main2 + bx lr + + .text + .align 2 + .globl main2 + .type main2,%function + .thumb_func +main2: + bx lr + +@ CHECK-NOT: 0x0 R_ARM_THM_CALL end 0x0 +@ CHECK: 0x2004 R_ARM_THM_CALL main2 0x0 diff --git a/test/MC/ARM/thumb-st_other.s b/test/MC/ARM/thumb-st_other.s new file mode 100644 index 000000000000..8750c2bba5fd --- /dev/null +++ b/test/MC/ARM/thumb-st_other.s @@ -0,0 +1,19 @@ +@ Check the value of st_other for thumb function. + +@ ARM does not define any st_other flags for thumb function. The value +@ for st_other should always be 0. + +@ RUN: llvm-mc < %s -triple thumbv5-linux-gnueabi -filetype=obj -o - \ +@ RUN: | llvm-readobj -t | FileCheck %s + + .syntax unified + .text + .align 2 + .thumb_func + .global main + .type main,%function +main: + bx lr + +@ CHECK: Name: main +@ CHECK: Other: 0 diff --git a/test/MC/ARM/thumb-types.s b/test/MC/ARM/thumb-types.s new file mode 100644 index 000000000000..b3aaf7d80532 --- /dev/null +++ b/test/MC/ARM/thumb-types.s @@ -0,0 +1,108 @@ +@ RUN: llvm-mc -triple armv7-elf -filetype obj -o - %s | llvm-readobj -t \ +@ RUN: | FileCheck %s + + .syntax unified + + .thumb + + .type implicit_function,%function +implicit_function: + nop + + .type implicit_data,%object +implicit_data: + .long 0 + + .arm + .type arm_function,%function +arm_function: + nop + + .thumb + + .text + +untyped_text_label: + nop + + .type explicit_function,%function +explicit_function: + nop + + .long tls(TPOFF) + + .type indirect_function,%gnu_indirect_function +indirect_function: + nop + + .data + +untyped_data_label: + nop + + .type explicit_data,%object +explicit_data: + .long 0 + + .section .tdata,"awT",%progbits + .type tls,%object + .align 2 +tls: + .long 42 + .size tls, 4 + + +@ CHECK: Symbol { +@ CHECK: Name: arm_function +@ CHECK: Value: 0x6 +@ CHECK: Type: Function +@ CHECK: } + +@ CHECK: Symbol { +@ CHECK: Name: explicit_data +@ CHECK: Value: 0x2 +@ CHECK: Type: Object +@ CHECK: } + +@ CHECK: Symbol { +@ CHECK: Name: explicit_function +@ CHECK: Value: 0xD +@ CHECK: Type: Function +@ CHECK: } + +@ CHECK: Symbol { +@ CHECK: Name: implicit_data +@ CHECK: Value: 0x2 +@ CHECK: Type: Object +@ CHECK: } + +@ CHECK: Symbol { +@ CHECK: Name: implicit_function +@ CHECK: Value: 0x1 +@ CHECK: Type: Function +@ CHECK: } + +@ CHECK: Symbol { +@ CHECK: Name: indirect_function +@ CHECK: Value: 0x13 +@ CHECK: Type: GNU_IFunc +@ CHECK: } + +@ CHECK: Symbol { +@ CHECK: Name: tls +@ CHECK: Value: 0x0 +@ CHECK: Type: TLS +@ CHECK: } + +@ CHECK: Symbol { +@ CHECK: Name: untyped_data_label +@ CHECK: Value: 0x0 +@ CHECK: Type: None +@ CHECK: } + +@ CHECK: Symbol { +@ CHECK: Name: untyped_text_label +@ CHECK: Value: 0xA +@ CHECK: Type: None +@ CHECK: } + diff --git a/test/MC/ARM/thumb2-cbn-to-next-inst.s b/test/MC/ARM/thumb2-cbn-to-next-inst.s new file mode 100644 index 000000000000..a7ad11b24508 --- /dev/null +++ b/test/MC/ARM/thumb2-cbn-to-next-inst.s @@ -0,0 +1,33 @@ +@ RUN: llvm-mc -triple thumbv7-apple-darwin -filetype=obj -o %t.o %s +@ RUN: llvm-objdump -triple thumbv7-apple-darwin -d %t.o | FileCheck %s + +.thumb +start: +.thumb_func start + add r1, r2, r3 + cbnz r2, L1 @ this can't be encoded, must turn into a nop +L1: + add r4, r5, r6 + cbnz r2, L2 + sub r7, r8, r9 +L2: + add r7, r8, r9 + cbz r2, L3 @ this can't be encoded, must turn into a nop +L3: + add r10, r11, r12 + cbz r2, L4 + sub r7, r8, r9 +L4: + add r3, r4, r5 + +@ CHECK: 0: 02 eb 03 01 add.w r1, r2, r3 +@ CHECK: 4: 00 bf nop +@ CHECK: 6: 05 eb 06 04 add.w r4, r5, r6 +@ CHECK: a: 0a b9 cbnz r2, #2 +@ CHECK: c: a8 eb 09 07 sub.w r7, r8, r9 +@ CHECK: 10: 08 eb 09 07 add.w r7, r8, r9 +@ CHECK: 14: 00 bf nop +@ CHECK: 16: 0b eb 0c 0a add.w r10, r11, r12 +@ CHECK: 1a: 0a b1 cbz r2, #2 +@ CHECK: 1c: a8 eb 09 07 sub.w r7, r8, r9 +@ CHECK: 20: 04 eb 05 03 add.w r3, r4, r5 diff --git a/test/MC/ARM/thumb2-diagnostics.s b/test/MC/ARM/thumb2-diagnostics.s index 6ac2db02cca7..b2b14bc13d6a 100644 --- a/test/MC/ARM/thumb2-diagnostics.s +++ b/test/MC/ARM/thumb2-diagnostics.s @@ -70,3 +70,21 @@ @ CHECK-ERRORS: error: branch target out of range @ CHECK-ERRORS: error: branch target out of range @ CHECK-ERRORS: error: branch target out of range + +foo2: + mov r0, foo2 + movw r0, foo2 + movt r0, foo2 +@ CHECK-ERRORS: error: immediate expression for mov requires :lower16: or :upper16 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: immediate expression for mov requires :lower16: or :upper16 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: immediate expression for mov requires :lower16: or :upper16 +@ CHECK-ERRORS: ^ + + and sp, r1, #80008000 + and pc, r1, #80008000 +@ CHECK-ERRORS: error: invalid operand for instruction +@ CHECK-ERRORS: error: invalid operand for instruction + + diff --git a/test/MC/ARM/thumb2-ldrd.s b/test/MC/ARM/thumb2-ldrd.s index 4463c21fe8c0..5166ff00ec18 100644 --- a/test/MC/ARM/thumb2-ldrd.s +++ b/test/MC/ARM/thumb2-ldrd.s @@ -1,9 +1,16 @@ -// RUN: not llvm-mc -arch thumb -mattr=+thumb2 \ -// RUN: < %s >/dev/null 2> %t -// RUN: grep "error: destination operands can't be identical" %t | count 4 -// rdar://14479780 +@ RUN: not llvm-mc -triple thumb-eabi -mattr=+thumb2 %s -o /dev/null 2>&1 \ +@ RUN: | FileCheck %s + +@ rdar://14479780 ldrd r0, r0, [pc, #0] ldrd r0, r0, [r1, #4] ldrd r0, r0, [r1], #4 ldrd r0, r0, [r1, #4]! + +@ CHECK: error: destination operands can't be identical +@ CHECK: error: destination operands can't be identical +@ CHECK: error: destination operands can't be identical +@ CHECK: error: destination operands can't be identical +@ CHECK-NOT: error: destination operands can't be identical + diff --git a/test/MC/ARM/thumb2-mclass.s b/test/MC/ARM/thumb2-mclass.s index b7af7236207d..d9c96dfcdd34 100644 --- a/test/MC/ARM/thumb2-mclass.s +++ b/test/MC/ARM/thumb2-mclass.s @@ -1,9 +1,10 @@ @ RUN: llvm-mc -triple=thumbv7m-apple-darwin -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -triple=thumbv6m -show-encoding < %s | FileCheck %s .syntax unified .globl _func @ Check that the assembler can handle the documented syntax from the ARM ARM. -@ These tests test instruction encodings specific to v7m & v7m (FeatureMClass). +@ These tests test instruction encodings specific to v6m & v7m (FeatureMClass). @------------------------------------------------------------------------------ @ MRS @@ -19,9 +20,6 @@ mrs r0, msp mrs r0, psp mrs r0, primask - mrs r0, basepri - mrs r0, basepri_max - mrs r0, faultmask mrs r0, control @ CHECK: mrs r0, apsr @ encoding: [0xef,0xf3,0x00,0x80] @@ -34,9 +32,6 @@ @ CHECK: mrs r0, msp @ encoding: [0xef,0xf3,0x08,0x80] @ CHECK: mrs r0, psp @ encoding: [0xef,0xf3,0x09,0x80] @ CHECK: mrs r0, primask @ encoding: [0xef,0xf3,0x10,0x80] -@ CHECK: mrs r0, basepri @ encoding: [0xef,0xf3,0x11,0x80] -@ CHECK: mrs r0, basepri_max @ encoding: [0xef,0xf3,0x12,0x80] -@ CHECK: mrs r0, faultmask @ encoding: [0xef,0xf3,0x13,0x80] @ CHECK: mrs r0, control @ encoding: [0xef,0xf3,0x14,0x80] @------------------------------------------------------------------------------ @@ -65,9 +60,6 @@ msr msp, r0 msr psp, r0 msr primask, r0 - msr basepri, r0 - msr basepri_max, r0 - msr faultmask, r0 msr control, r0 @ CHECK: msr apsr, r0 @ encoding: [0x80,0xf3,0x00,0x88] @@ -92,7 +84,4 @@ @ CHECK: msr msp, r0 @ encoding: [0x80,0xf3,0x08,0x88] @ CHECK: msr psp, r0 @ encoding: [0x80,0xf3,0x09,0x88] @ CHECK: msr primask, r0 @ encoding: [0x80,0xf3,0x10,0x88] -@ CHECK: msr basepri, r0 @ encoding: [0x80,0xf3,0x11,0x88] -@ CHECK: msr basepri_max, r0 @ encoding: [0x80,0xf3,0x12,0x88] -@ CHECK: msr faultmask, r0 @ encoding: [0x80,0xf3,0x13,0x88] @ CHECK: msr control, r0 @ encoding: [0x80,0xf3,0x14,0x88] diff --git a/test/MC/ARM/thumb2-strd.s b/test/MC/ARM/thumb2-strd.s new file mode 100644 index 000000000000..3f8025d2cd70 --- /dev/null +++ b/test/MC/ARM/thumb2-strd.s @@ -0,0 +1,10 @@ +@ RUN: not llvm-mc -triple=armv7-linux-gnueabi %s 2>&1 | FileCheck %s +.text +.thumb + +@ CHECK: error: invalid operand for instruction +@ CHECK: error: invalid operand for instruction +@ CHECK: error: invalid operand for instruction +strd r12, SP, [r0, #256] +strd r12, SP, [r0, #256]! +strd r12, SP, [r0], #256 diff --git a/test/MC/ARM/thumb2be-b.w-encoding.s b/test/MC/ARM/thumb2be-b.w-encoding.s new file mode 100644 index 000000000000..2c3e31b3d986 --- /dev/null +++ b/test/MC/ARM/thumb2be-b.w-encoding.s @@ -0,0 +1,9 @@ +@ RUN: llvm-mc -triple=thumbv7-none-linux-gnueabi -show-encoding < %s | FileCheck %s --check-prefix=CHECK-LE +@ RUN: llvm-mc -triple=thumbebv7-none-linux-gnueabi -show-encoding < %s | FileCheck %s --check-prefix=CHECK-BE + +b.w bar +@ CHECK-LE: b.w bar @ encoding: [A,0xf0'A',A,0x90'A'] +@ CHECK-LE-NEXT: @ fixup A - offset: 0, value: bar, kind: fixup_t2_uncondbranch +@ CHECK-BE: b.w bar @ encoding: [0xf0'A',A,0x90'A',A] +@ CHECK-BE-NEXT: @ fixup A - offset: 0, value: bar, kind: fixup_t2_uncondbranch + diff --git a/test/MC/ARM/thumb2be-beq.w-encoding.s b/test/MC/ARM/thumb2be-beq.w-encoding.s new file mode 100644 index 000000000000..e39e541f69f1 --- /dev/null +++ b/test/MC/ARM/thumb2be-beq.w-encoding.s @@ -0,0 +1,9 @@ +@ RUN: llvm-mc -triple=thumbv7-none-linux-gnueabi -show-encoding < %s | FileCheck %s --check-prefix=CHECK-LE +@ RUN: llvm-mc -triple=thumbebv7-none-linux-gnueabi -show-encoding < %s | FileCheck %s --check-prefix=CHECK-BE + +beq.w bar +@ CHECK-LE: beq.w bar @ encoding: [A,0xf0'A',A,0x80'A'] +@ CHECK-LE-NEXT: @ fixup A - offset: 0, value: bar, kind: fixup_t2_condbranch +@ CHECK-BE: beq.w bar @ encoding: [0xf0'A',A,0x80'A',A] +@ CHECK-BE-NEXT: @ fixup A - offset: 0, value: bar, kind: fixup_t2_condbranch + diff --git a/test/MC/ARM/thumb2be-movt-encoding.s b/test/MC/ARM/thumb2be-movt-encoding.s new file mode 100644 index 000000000000..cc6c04ef18b5 --- /dev/null +++ b/test/MC/ARM/thumb2be-movt-encoding.s @@ -0,0 +1,9 @@ +@ RUN: llvm-mc -triple=thumbv7-none-linux-gnueabi -show-encoding < %s | FileCheck %s --check-prefix=CHECK-LE +@ RUN: llvm-mc -triple=thumbebv7-none-linux-gnueabi -show-encoding < %s | FileCheck %s --check-prefix=CHECK-BE + +movt r9, :upper16:(_bar) +@ CHECK-LE: movt r9, :upper16:_bar @ encoding: [0xc0'A',0xf2'A',0b0000AAAA,0x09] +@ CHECK-LE-NEXT: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_movt_hi16 +@ CHECK-BE: movt r9, :upper16:_bar @ encoding: [0xf2,0b1100AAAA,0x09'A',A] +@ CHECK-BE-NEXT: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_movt_hi16 + diff --git a/test/MC/ARM/thumb2be-movw-encoding.s b/test/MC/ARM/thumb2be-movw-encoding.s new file mode 100644 index 000000000000..3bff457961be --- /dev/null +++ b/test/MC/ARM/thumb2be-movw-encoding.s @@ -0,0 +1,9 @@ +@ RUN: llvm-mc -triple=thumbv7-none-linux-gnueabi -show-encoding < %s | FileCheck %s --check-prefix=CHECK-LE +@ RUN: llvm-mc -triple=thumbebv7-none-linux-gnueabi -show-encoding < %s | FileCheck %s --check-prefix=CHECK-BE + +movw r9, :lower16:(_bar) +@ CHECK-LE: movw r9, :lower16:_bar @ encoding: [0x40'A',0xf2'A',0b0000AAAA,0x09] +@ CHECK-LE-NEXT: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_movw_lo16 +@ CHECK-BE: movw r9, :lower16:_bar @ encoding: [0xf2,0b0100AAAA,0x09'A',A] +@ CHECK-BE-NEXT: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_movw_lo16 + diff --git a/test/MC/ARM/thumb_set-diagnostics.s b/test/MC/ARM/thumb_set-diagnostics.s new file mode 100644 index 000000000000..5f1844de01ff --- /dev/null +++ b/test/MC/ARM/thumb_set-diagnostics.s @@ -0,0 +1,43 @@ +@ RUN: not llvm-mc -triple armv7-eabi -o /dev/null 2>&1 %s | FileCheck %s + + .syntax unified + + .thumb + + .thumb_set + +@ CHECK: error: expected identifier after '.thumb_set' +@ CHECK: .thumb_set +@ CHECL: ^ + + .thumb_set ., 0x0b5e55ed + +@ CHECK: error: expected identifier after '.thumb_set' +@ CHECK: .thumb_set ., 0x0b5e55ed +@ CHECK: ^ + + .thumb_set labelled, 0x1abe11ed + .thumb_set invalid, :lower16:labelled + +@ CHECK: error: unknown token in expression +@ CHECK: .thumb_set invalid, :lower16:labelled +@ CHECK: ^ + + .thumb_set missing_comma + +@ CHECK: error: expected comma after name 'missing_comma' +@ CHECK: .thumb_set missing_comma +@ CHECK: ^ + + .thumb_set missing_expression, + +@ CHECK: error: missing expression +@ CHECK: .thumb_set missing_expression, +@ CHECK: ^ + + .thumb_set trailer_trash, 0x11fe1e55, + +@ CHECK: error: unexpected token +@ CHECK: .thumb_set trailer_trash, 0x11fe1e55, +@ CHECK: ^ + diff --git a/test/MC/ARM/thumb_set.s b/test/MC/ARM/thumb_set.s new file mode 100644 index 000000000000..d2a0dc04730c --- /dev/null +++ b/test/MC/ARM/thumb_set.s @@ -0,0 +1,154 @@ +@ RUN: llvm-mc -triple armv7-eabi -filetype obj -o - %s | llvm-readobj -t \ +@ RUN: | FileCheck %s + +@ RUN: llvm-mc -triple armv7-eabi -filetype asm -o - %s \ +@ RUN: | FileCheck --check-prefix=ASM %s + + .syntax unified + + .arm + + .type arm_func,%function +arm_func: + nop + + .thumb_set alias_arm_func, arm_func + + alias_arm_func2 = alias_arm_func + alias_arm_func3 = alias_arm_func2 + +@ ASM: .thumb_set alias_arm_func, arm_func + + .thumb + + .type thumb_func,%function + .thumb_func +thumb_func: + nop + + .thumb_set alias_thumb_func, thumb_func + + .thumb_set seedless, 0x5eed1e55 + .thumb_set eggsalad, seedless + 0x87788358 + .thumb_set faceless, ~eggsalad + 0xe133c002 + + .thumb_set alias_undefined_data, badblood + + .data + + .type badblood,%object +badblood: + .long 0xbadb100d + + .type bedazzle,%object +bedazzle: + .long 0xbeda221e + + .text + .thumb + + .thumb_set alias_defined_data, bedazzle + + .type alpha,%function +alpha: + nop + + .type beta,%function +beta: + bkpt + + .thumb_set beta, alpha + +@ CHECK: Symbol { +@ CHECK: Name: alias_arm_func +@ CHECK: Value: 0x1 +@ CHECK: Type: Function +@ CHECK: } + +@ CHECK: Symbol { +@ CHECK: Name: alias_arm_func2 +@ CHECK: Value: 0x1 +@ CHECK: Type: Function +@ CHECK: } + +@ CHECK: Symbol { +@ CHECK: Name: alias_arm_func3 +@ CHECK: Value: 0x1 +@ CHECK: Type: Function +@ CHECK: } + +@ CHECK: Symbol { +@ CHECK: Name: alias_defined_data +@ CHECK: Value: 0x5 +@ CHECK: Type: Function +@ CHECK: } + +@ CHECK: Symbol { +@ CHECK: Name: alias_thumb_func +@ CHECK: Value: 0x5 +@ CHECK: Type: Function +@ CHECK: } + +@ CHECK: Symbol { +@ CHECK: Name: alias_undefined_data +@ CHECK: Value: 0x0 +@ CHECK: Type: Object +@ CHECK: } + +@ CHECK: Symbol { +@ CHECK: Name: alpha +@ CHECK: Value: 0x7 +@ CHECK: Type: Function +@ CHECK: } + +@ CHECK: Symbol { +@ CHECK: Name: arm_func +@ CHECK: Value: 0x0 +@ CHECK: Type: Function +@ CHECK: } + +@ CHECK: Symbol { +@ CHECK: Name: badblood +@ CHECK-NEXT: Value: 0x0 +@ CHECK-NEXT: Size: 0 +@ CHECK-NEXT: Binding: Local +@ CHECK-NEXT: Type: Object +@ CHECK-NEXT: Other: 0 +@ CHECK-NEXT: Section: .data +@ CHECK-NEXT: } + +@ CHECK: Symbol { +@ CHECK: Name: bedazzle +@ CHECK: Value: 0x4 +@ CHECK: Type: Object +@ CHECK: } + +@ CHECK: Symbol { +@ CHECK: Name: beta +@ CHECK: Value: 0x7 +@ CHECK: Type: Function +@ CHECK: } + +@ CHECK: Symbol { +@ CHECK: Name: eggsalad +@ CHECK: Value: 0xE665A1AD +@ CHECK: Type: Function +@ CHECK: } + +@ CHECK: Symbol { +@ CHECK: Name: faceless +@ CHECK: Value: 0xFACE1E55 +@ CHECK: Type: Function +@ CHECK: } + +@ CHECK: Symbol { +@ CHECK: Name: seedless +@ CHECK: Value: 0x5EED1E55 +@ CHECK: Type: Function +@ CHECK: } + +@ CHECK: Symbol { +@ CHECK: Name: thumb_func +@ CHECK: Value: 0x5 +@ CHECK: Type: Function +@ CHECK: } diff --git a/test/MC/ARM/thumbv7m.s b/test/MC/ARM/thumbv7m.s new file mode 100644 index 000000000000..33ed44cd3da4 --- /dev/null +++ b/test/MC/ARM/thumbv7m.s @@ -0,0 +1,45 @@ +@ RUN: llvm-mc -triple=thumbv7m-apple-darwin -show-encoding < %s | FileCheck %s +@ RUN: not llvm-mc -triple=thumbv6 -show-encoding 2>&1 < %s | FileCheck %s --check-prefix=CHECK-V6M + .syntax unified + .globl _func + +@ Check that the assembler can handle the documented syntax from the ARM ARM. +@ These tests test instruction encodings specific to ARMv7m. + +@------------------------------------------------------------------------------ +@ MRS +@------------------------------------------------------------------------------ + + mrs r0, basepri + mrs r0, basepri_max + mrs r0, faultmask + +@ CHECK: mrs r0, basepri @ encoding: [0xef,0xf3,0x11,0x80] +@ CHECK: mrs r0, basepri_max @ encoding: [0xef,0xf3,0x12,0x80] +@ CHECK: mrs r0, faultmask @ encoding: [0xef,0xf3,0x13,0x80] + +@------------------------------------------------------------------------------ +@ MSR +@------------------------------------------------------------------------------ + + msr basepri, r0 + msr basepri_max, r0 + msr faultmask, r0 + +@ CHECK: msr basepri, r0 @ encoding: [0x80,0xf3,0x11,0x88] +@ CHECK: msr basepri_max, r0 @ encoding: [0x80,0xf3,0x12,0x88] +@ CHECK: msr faultmask, r0 @ encoding: [0x80,0xf3,0x13,0x88] + +@ CHECK-V6M: error: invalid operand for instruction +@ CHECK-V6M-NEXT: mrs r0, basepri +@ CHECK-V6M: error: invalid operand for instruction +@ CHECK-V6M-NEXT: mrs r0, basepri_max +@ CHECK-V6M: error: invalid operand for instruction +@ CHECK-V6M-NEXT: mrs r0, faultmask +@ CHECK-V6M: error: invalid operand for instruction +@ CHECK-V6M-NEXT: msr basepri, r0 +@ CHECK-V6M: error: invalid operand for instruction +@ CHECK-V6M-NEXT: msr basepri_max, r0 +@ CHECK-V6M: error: invalid operand for instruction +@ CHECK-V6M-NEXT: msr faultmask, r0 + diff --git a/test/MC/ARM/udf-arm-diagnostics.s b/test/MC/ARM/udf-arm-diagnostics.s new file mode 100644 index 000000000000..9ec9bf2124f0 --- /dev/null +++ b/test/MC/ARM/udf-arm-diagnostics.s @@ -0,0 +1,19 @@ +@ RUN: not llvm-mc -triple arm-eabi %s 2>&1 | FileCheck %s + + .syntax unified + .text + .arm + +undefined: + udfpl + +@ CHECK: error: instruction 'udf' is not predicable, but condition code specified +@ CHECK: udfpl +@ CHECK: ^ + + udf #65536 + +@ CHECK: error: invalid operand for instruction +@ CHECK: udf #65536 +@ CHECK: ^ + diff --git a/test/MC/ARM/udf-arm.s b/test/MC/ARM/udf-arm.s new file mode 100644 index 000000000000..a9d19ca66e6c --- /dev/null +++ b/test/MC/ARM/udf-arm.s @@ -0,0 +1,11 @@ +@ RUN: llvm-mc -triple arm-eabi -show-encoding %s | FileCheck %s + + .syntax unified + .text + .arm + +undefined: + udf #0 + +@ CHECK: udf #0 @ encoding: [0xf0,0x00,0xf0,0xe7] + diff --git a/test/MC/ARM/udf-thumb-2-diagnostics.s b/test/MC/ARM/udf-thumb-2-diagnostics.s new file mode 100644 index 000000000000..f8375601a031 --- /dev/null +++ b/test/MC/ARM/udf-thumb-2-diagnostics.s @@ -0,0 +1,25 @@ +@ RUN: not llvm-mc -triple thumbv7-eabi -mattr +thumb2 %s 2>&1 | FileCheck %s + + .syntax unified + .text + .thumb + +undefined: + udfpl + +@ CHECK: error: instruction 'udf' is not predicable, but condition code specified +@ CHECK: udfpl +@ CHECK: ^ + + udf #256 + +@ CHECK: error: instruction requires: arm-mode +@ CHECK: udf #256 +@ CHECK: ^ + + udf.w #65536 + +@ CHECK: error: invalid operand for instruction +@ CHECK: udf.w #65536 +@ CHECK: ^ + diff --git a/test/MC/ARM/udf-thumb-2.s b/test/MC/ARM/udf-thumb-2.s new file mode 100644 index 000000000000..beb6549cb08f --- /dev/null +++ b/test/MC/ARM/udf-thumb-2.s @@ -0,0 +1,13 @@ +@ RUN: llvm-mc -triple thumbv7-eabi -mattr +thumb2 -show-encoding %s | FileCheck %s + + .syntax unified + .text + .thumb + +undefined: + udf #0 + udf.w #0 + +@ CHECK: udf #0 @ encoding: [0x00,0xde] +@ CHECK: udf.w #0 @ encoding: [0xf0,0xf7,0x00,0xa0] + diff --git a/test/MC/ARM/udf-thumb-diagnostics.s b/test/MC/ARM/udf-thumb-diagnostics.s new file mode 100644 index 000000000000..51388d0f10d6 --- /dev/null +++ b/test/MC/ARM/udf-thumb-diagnostics.s @@ -0,0 +1,19 @@ +@ RUN: not llvm-mc -triple thumbv6m-eabi %s 2>&1 | FileCheck %s + + .syntax unified + .text + .thumb + +undefined: + udfpl + +@ CHECK: error: conditional execution not supported in Thumb1 +@ CHECK: udfpl +@ CHECK: ^ + + udf #256 + +@ CHECK: error: instruction requires: arm-mode +@ CHECK: udf #256 +@ CHECK: ^ + diff --git a/test/MC/ARM/udf-thumb.s b/test/MC/ARM/udf-thumb.s new file mode 100644 index 000000000000..10b3aff1aa30 --- /dev/null +++ b/test/MC/ARM/udf-thumb.s @@ -0,0 +1,11 @@ +@ RUN: llvm-mc -triple thumbv6m-eabi -show-encoding %s | FileCheck %s + + .syntax unified + .text + .thumb + +undefined: + udf #0 + +@ CHECK: udf #0 @ encoding: [0x00,0xde] + diff --git a/test/MC/ARM/unwind-stack-diagnostics.s b/test/MC/ARM/unwind-stack-diagnostics.s new file mode 100644 index 000000000000..28d5672d3aa5 --- /dev/null +++ b/test/MC/ARM/unwind-stack-diagnostics.s @@ -0,0 +1,30 @@ +@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s + + .syntax unified + .thumb + + .text + + .global multiple_personality_disorder + .type multiple_personality_disorder,%function +multiple_personality_disorder: + .fnstart + .personality __gcc_personality_v0 + .personality __gxx_personality_v0 + .personality __gxx_personality_sj0 + .cantunwind + +@ CHECK: error: .cantunwind can't be used with .personality directive +@ CHECK: .cantunwind +@ CHECK: ^ +@ CHECK: note: .personality was specified here +@ CHECK: .personality __gcc_personality_v0 +@ CHECK: ^ +@ CHECK: note: .personality was specified here +@ CHECK: .personality __gxx_personality_v0 +@ CHECK: ^ +@ CHECK: note: .personality was specified here +@ CHECK: .personality __gxx_personality_sj0 +@ CHECK: ^ + diff --git a/test/MC/ARM/variant-diagnostics.s b/test/MC/ARM/variant-diagnostics.s new file mode 100644 index 000000000000..535ee2686f18 --- /dev/null +++ b/test/MC/ARM/variant-diagnostics.s @@ -0,0 +1,13 @@ +@ RUN: not llvm-mc -triple armv7-linux-eabi -filetype asm -o /dev/null 2>&1 %s \ +@ RUN: | FileCheck %s + + .arch armv7 + + .type invalid_variant,%function +invalid_variant: + bx target(invalid) + +@ CHECK: error: invalid variant 'invalid' +@ CHECK: bx target(invalid) +@ CHECK: ^ + diff --git a/test/MC/ARM/vfp-aliases-diagnostics.s b/test/MC/ARM/vfp-aliases-diagnostics.s new file mode 100644 index 000000000000..d1ab18e99828 --- /dev/null +++ b/test/MC/ARM/vfp-aliases-diagnostics.s @@ -0,0 +1,114 @@ +@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null %s 2>&1 \ +@ RUN: | FileCheck %s + + .syntax unified + .fpu vfp + + .type aliases,%function +aliases: + fstmfdd sp!, {s0} + fstmead sp!, {s0} + fstmdbd sp!, {s0} + fstmiad sp!, {s0} + fstmfds sp!, {d0} + fstmeas sp!, {d0} + fstmdbs sp!, {d0} + fstmias sp!, {d0} + + fldmias sp!, {d0} + fldmdbs sp!, {d0} + fldmeas sp!, {d0} + fldmfds sp!, {d0} + fldmiad sp!, {s0} + fldmdbd sp!, {s0} + fldmead sp!, {s0} + fldmfdd sp!, {s0} + + fstmeax sp!, {s0} + fldmfdx sp!, {s0} + + fstmfdx sp!, {s0} + fldmeax sp!, {s0} + +@ CHECK-LABEL: aliases +@ CHECK: error: VFP/Neon double precision register expected +@ CHECK: fstmfdd sp!, {s0} +@ CHECK: ^ +@ CHECK: error: VFP/Neon double precision register expected +@ CHECK: fstmead sp!, {s0} +@ CHECK: ^ +@ CHECK: error: VFP/Neon double precision register expected +@ CHECK: fstmdbd sp!, {s0} +@ CHECK: ^ +@ CHECK: error: VFP/Neon double precision register expected +@ CHECK: fstmiad sp!, {s0} +@ CHECK: ^ +@ CHECK: error: VFP/Neon single precision register expected +@ CHECK: fstmfds sp!, {d0} +@ CHECK: ^ +@ CHECK: error: VFP/Neon single precision register expected +@ CHECK: fstmeas sp!, {d0} +@ CHECK: ^ +@ CHECK: error: VFP/Neon single precision register expected +@ CHECK: fstmdbs sp!, {d0} +@ CHECK: ^ +@ CHECK: error: VFP/Neon single precision register expected +@ CHECK: fstmias sp!, {d0} +@ CHECK: ^ + +@ CHECK: error: VFP/Neon single precision register expected +@ CHECK: fldmias sp!, {d0} +@ CHECK: ^ +@ CHECK: error: VFP/Neon single precision register expected +@ CHECK: fldmdbs sp!, {d0} +@ CHECK: ^ +@ CHECK: error: VFP/Neon single precision register expected +@ CHECK: fldmeas sp!, {d0} +@ CHECK: ^ +@ CHECK: error: VFP/Neon single precision register expected +@ CHECK: fldmfds sp!, {d0} +@ CHECK: ^ +@ CHECK: error: VFP/Neon double precision register expected +@ CHECK: fldmiad sp!, {s0} +@ CHECK: ^ +@ CHECK: error: VFP/Neon double precision register expected +@ CHECK: fldmdbd sp!, {s0} +@ CHECK: ^ +@ CHECK: error: VFP/Neon double precision register expected +@ CHECK: fldmead sp!, {s0} +@ CHECK: ^ +@ CHECK: error: VFP/Neon double precision register expected +@ CHECK: fldmfdd sp!, {s0} +@ CHECK: ^ + +@ CHECK: error: VFP/Neon double precision register expected +@ CHECK: fstmeax sp!, {s0} +@ CHECK: ^ +@ CHECK: error: VFP/Neon double precision register expected +@ CHECK: fldmfdx sp!, {s0} +@ CHECK: ^ + +@ CHECK: error: VFP/Neon double precision register expected +@ CHECK: fstmfdx sp!, {s0} +@ CHECK: ^ +@ CHECK: error: VFP/Neon double precision register expected +@ CHECK: fldmeax sp!, {s0} +@ CHECK: ^ + + fstmiaxcs r0, {s0} + fstmiaxhs r0, {s0} + fstmiaxls r0, {s0} + fstmiaxvs r0, {s0} +@ CHECK: error: VFP/Neon double precision register expected +@ CHECK: fstmiaxcs r0, {s0} +@ CHECK: ^ +@ CHECK: error: VFP/Neon double precision register expected +@ CHECK: fstmiaxhs r0, {s0} +@ CHECK: ^ +@ CHECK: error: VFP/Neon double precision register expected +@ CHECK: fstmiaxls r0, {s0} +@ CHECK: ^ +@ CHECK: error: VFP/Neon double precision register expected +@ CHECK: fstmiaxvs r0, {s0} +@ CHECK: ^ + diff --git a/test/MC/ARM/vfp-aliases.s b/test/MC/ARM/vfp-aliases.s new file mode 100644 index 000000000000..4074feabbf18 --- /dev/null +++ b/test/MC/ARM/vfp-aliases.s @@ -0,0 +1,62 @@ +@ RUN: llvm-mc -triple armv7-eabi -filetype asm -o - %s | FileCheck %s + + .syntax unified + .fpu vfp + + .type aliases,%function +aliases: + fstmfdd sp!, {d0} + fstmead sp!, {d0} + fstmdbd sp!, {d0} + fstmiad sp!, {d0} + fstmfds sp!, {s0} + fstmeas sp!, {s0} + fstmdbs sp!, {s0} + fstmias sp!, {s0} + + fldmias sp!, {s0} + fldmdbs sp!, {s0} + fldmeas sp!, {s0} + fldmfds sp!, {s0} + fldmiad sp!, {d0} + fldmdbd sp!, {d0} + fldmead sp!, {d0} + fldmfdd sp!, {d0} + + fstmeax sp!, {d0} + fldmfdx sp!, {d0} + + fstmfdx sp!, {d0} + fldmeax sp!, {d0} + +@ CHECK-LABEL: aliases +@ CHECK: vpush {d0} +@ CHECK: vstmia sp!, {d0} +@ CHECK: vpush {d0} +@ CHECK: vstmia sp!, {d0} +@ CHECK: vpush {s0} +@ CHECK: vstmia sp!, {s0} +@ CHECK: vpush {s0} +@ CHECK: vstmia sp!, {s0} +@ CHECK: vpop {s0} +@ CHECK: vldmdb sp!, {s0} +@ CHECK: vldmdb sp!, {s0} +@ CHECK: vpop {s0} +@ CHECK: vpop {d0} +@ CHECK: vldmdb sp!, {d0} +@ CHECK: vldmdb sp!, {d0} +@ CHECK: vpop {d0} +@ CHECK: fstmiax sp!, {d0} +@ CHECK: fldmiax sp!, {d0} +@ CHECK: fstmdbx sp!, {d0} +@ CHECK: fldmdbx sp!, {d0} + + fstmiaxcs r0, {d0} + fstmiaxhs r0, {d0} + fstmiaxls r0, {d0} + fstmiaxvs r0, {d0} +@ CHECK: fstmiaxhs r0, {d0} +@ CHECK: fstmiaxhs r0, {d0} +@ CHECK: fstmiaxls r0, {d0} +@ CHECK: fstmiaxvs r0, {d0} + diff --git a/test/MC/ARM/vmov-vmvn-byte-replicate.s b/test/MC/ARM/vmov-vmvn-byte-replicate.s new file mode 100644 index 000000000000..5931160afbc5 --- /dev/null +++ b/test/MC/ARM/vmov-vmvn-byte-replicate.s @@ -0,0 +1,31 @@ +@ PR18921, "vmov" part. +@ RUN: llvm-mc -triple=armv7-linux-gnueabi -show-encoding < %s | FileCheck %s +.text + +@ CHECK: vmov.i8 d2, #0xff @ encoding: [0x1f,0x2e,0x87,0xf3] +@ CHECK: vmov.i8 q2, #0xff @ encoding: [0x5f,0x4e,0x87,0xf3] +@ CHECK: vmov.i8 d2, #0xab @ encoding: [0x1b,0x2e,0x82,0xf3] +@ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3] +@ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3] +@ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3] + +@ CHECK: vmov.i8 d2, #0x0 @ encoding: [0x10,0x2e,0x80,0xf2] +@ CHECK: vmov.i8 q2, #0x0 @ encoding: [0x50,0x4e,0x80,0xf2] +@ CHECK: vmov.i8 d2, #0x54 @ encoding: [0x14,0x2e,0x85,0xf2] +@ CHECK: vmov.i8 q2, #0x54 @ encoding: [0x54,0x4e,0x85,0xf2] +@ CHECK: vmov.i8 d2, #0x54 @ encoding: [0x14,0x2e,0x85,0xf2] +@ CHECK: vmov.i8 q2, #0x54 @ encoding: [0x54,0x4e,0x85,0xf2] + + vmov.i32 d2, #0xffffffff + vmov.i32 q2, #0xffffffff + vmov.i32 d2, #0xabababab + vmov.i32 q2, #0xabababab + vmov.i16 q2, #0xabab + vmov.i16 q2, #0xabab + + vmvn.i32 d2, #0xffffffff + vmvn.i32 q2, #0xffffffff + vmvn.i32 d2, #0xabababab + vmvn.i32 q2, #0xabababab + vmvn.i16 d2, #0xabab + vmvn.i16 q2, #0xabab diff --git a/test/MC/ARM/vmov-vmvn-illegal-cases.s b/test/MC/ARM/vmov-vmvn-illegal-cases.s new file mode 100644 index 000000000000..4609b7793551 --- /dev/null +++ b/test/MC/ARM/vmov-vmvn-illegal-cases.s @@ -0,0 +1,30 @@ +@ RUN: not llvm-mc -triple=armv7-linux-gnueabi %s 2>&1 | FileCheck %s +.text + +@ CHECK: error: invalid operand for instruction +@ CHECK: vmov.i32 d2, #0xffffffab +@ CHECK: error: invalid operand for instruction +@ CHECK: vmov.i32 q2, #0xffffffab +@ CHECK: error: invalid operand for instruction +@ CHECK: vmov.i16 q2, #0xffab +@ CHECK: error: invalid operand for instruction +@ CHECK: vmov.i16 q2, #0xffab + +@ CHECK: error: invalid operand for instruction +@ CHECK: vmvn.i32 d2, #0xffffffab +@ CHECK: error: invalid operand for instruction +@ CHECK: vmvn.i32 q2, #0xffffffab +@ CHECK: error: invalid operand for instruction +@ CHECK: vmvn.i16 q2, #0xffab +@ CHECK: error: invalid operand for instruction +@ CHECK: vmvn.i16 q2, #0xffab + + vmov.i32 d2, #0xffffffab + vmov.i32 q2, #0xffffffab + vmov.i16 q2, #0xffab + vmov.i16 q2, #0xffab + + vmvn.i32 d2, #0xffffffab + vmvn.i32 q2, #0xffffffab + vmvn.i16 q2, #0xffab + vmvn.i16 q2, #0xffab diff --git a/test/MC/ARM/vorr-vbic-illegal-cases.s b/test/MC/ARM/vorr-vbic-illegal-cases.s new file mode 100644 index 000000000000..16ab6b5bc74b --- /dev/null +++ b/test/MC/ARM/vorr-vbic-illegal-cases.s @@ -0,0 +1,42 @@ +@ RUN: not llvm-mc -triple=armv7-linux-gnueabi %s 2>&1 | FileCheck %s +.text + +@ CHECK: error: invalid operand for instruction +@ CHECK: vorr.i32 d2, #0xffffffff +@ CHECK: error: invalid operand for instruction +@ CHECK: vorr.i32 q2, #0xffffffff +@ CHECK: error: invalid operand for instruction +@ CHECK: vorr.i32 d2, #0xabababab +@ CHECK: error: invalid operand for instruction +@ CHECK: vorr.i32 q2, #0xabababab +@ CHECK: error: invalid operand for instruction +@ CHECK: vorr.i16 q2, #0xabab +@ CHECK: error: invalid operand for instruction +@ CHECK: vorr.i16 q2, #0xabab + +@ CHECK: error: invalid operand for instruction +@ CHECK: vbic.i32 d2, #0xffffffff +@ CHECK: error: invalid operand for instruction +@ CHECK: vbic.i32 q2, #0xffffffff +@ CHECK: error: invalid operand for instruction +@ CHECK: vbic.i32 d2, #0xabababab +@ CHECK: error: invalid operand for instruction +@ CHECK: vbic.i32 q2, #0xabababab +@ CHECK: error: invalid operand for instruction +@ CHECK: vbic.i16 d2, #0xabab +@ CHECK: error: invalid operand for instruction +@ CHECK: vbic.i16 q2, #0xabab + + vorr.i32 d2, #0xffffffff + vorr.i32 q2, #0xffffffff + vorr.i32 d2, #0xabababab + vorr.i32 q2, #0xabababab + vorr.i16 q2, #0xabab + vorr.i16 q2, #0xabab + + vbic.i32 d2, #0xffffffff + vbic.i32 q2, #0xffffffff + vbic.i32 d2, #0xabababab + vbic.i32 q2, #0xabababab + vbic.i16 d2, #0xabab + vbic.i16 q2, #0xabab diff --git a/test/MC/ARM/xscale-attributes.ll b/test/MC/ARM/xscale-attributes.ll deleted file mode 100644 index 718fd8fcc78b..000000000000 --- a/test/MC/ARM/xscale-attributes.ll +++ /dev/null @@ -1,39 +0,0 @@ -; RUN: llc %s -mtriple=thumbv5-linux-gnueabi -mcpu=xscale -o - | \ -; RUN: FileCheck -check-prefix=ASM %s - -; RUN: llc %s -mtriple=thumbv5-linux-gnueabi -filetype=obj \ -; RUN: -mcpu=xscale -o - | llvm-readobj -s -sd | \ -; RUN: FileCheck -check-prefix=OBJ %s - -; FIXME: The OBJ test should be a .s to .o test and the ASM test should -; be moved to test/CodeGen/ARM. - -define void @foo() nounwind { -entry: - ret void -} - -; ASM: .eabi_attribute 6, 5 -; ASM-NEXT: .eabi_attribute 8, 1 -; ASM-NEXT: .eabi_attribute 9, 1 - -; OBJ: Sections [ -; OBJ: Section { -; OBJ: Index: 4 -; OBJ-NEXT: Name: .ARM.attributes (12) -; OBJ-NEXT: Type: SHT_ARM_ATTRIBUTES -; OBJ-NEXT: Flags [ (0x0) -; OBJ-NEXT: ] -; OBJ-NEXT: Address: 0x0 -; OBJ-NEXT: Offset: 0x38 -; OBJ-NEXT: Size: 40 -; OBJ-NEXT: Link: 0 -; OBJ-NEXT: Info: 0 -; OBJ-NEXT: AddressAlignment: 1 -; OBJ-NEXT: EntrySize: 0 -; OBJ-NEXT: SectionData ( -; OBJ-NEXT: 0000: 41270000 00616561 62690001 1D000000 -; OBJ-NEXT: 0010: 05585343 414C4500 06050801 09011401 -; OBJ-NEXT: 0020: 15011703 18011901 -; OBJ-NEXT: ) -; OBJ-NEXT: } |