summaryrefslogtreecommitdiff
path: root/test/MC/Disassembler/ARM/invalid-VST1d8Twb_register-thumb.txt
diff options
context:
space:
mode:
Diffstat (limited to 'test/MC/Disassembler/ARM/invalid-VST1d8Twb_register-thumb.txt')
-rw-r--r--test/MC/Disassembler/ARM/invalid-VST1d8Twb_register-thumb.txt2
1 files changed, 1 insertions, 1 deletions
diff --git a/test/MC/Disassembler/ARM/invalid-VST1d8Twb_register-thumb.txt b/test/MC/Disassembler/ARM/invalid-VST1d8Twb_register-thumb.txt
index 2d2a62811ae9..99da8ce9d85a 100644
--- a/test/MC/Disassembler/ARM/invalid-VST1d8Twb_register-thumb.txt
+++ b/test/MC/Disassembler/ARM/invalid-VST1d8Twb_register-thumb.txt
@@ -7,7 +7,7 @@
# -------------------------------------------------------------------------------------------------
#
# A8.6.391 VST1 (multiple single elements)
-# This encoding looks like: vst1.8 {d0,d1,d2}, [r0, :128]
+# This encoding looks like: vst1.8 {d0,d1,d2}, [r0:128]
# But bits 5-4 for the alignment of 128 encoded as align = 0b10, is available only if <list>
# contains two or four registers. rdar://11220250
0x00 0xf9 0x2f 0x06