diff options
Diffstat (limited to 'test/Transforms/LoopStrengthReduce')
| -rw-r--r-- | test/Transforms/LoopStrengthReduce/2012-07-18-LimitReassociate.ll | 14 | ||||
| -rw-r--r-- | test/Transforms/LoopStrengthReduce/2013-01-05-IndBr.ll | 44 | ||||
| -rw-r--r-- | test/Transforms/LoopStrengthReduce/2013-01-14-ReuseCast.ll | 84 | ||||
| -rw-r--r-- | test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll | 101 | ||||
| -rw-r--r-- | test/Transforms/LoopStrengthReduce/X86/2008-08-14-ShadowIV.ll (renamed from test/Transforms/LoopStrengthReduce/2008-08-14-ShadowIV.ll) | 2 | ||||
| -rw-r--r-- | test/Transforms/LoopStrengthReduce/X86/2011-07-20-DoubleIV.ll (renamed from test/Transforms/LoopStrengthReduce/2011-07-20-DoubleIV.ll) | 2 | ||||
| -rw-r--r-- | test/Transforms/LoopStrengthReduce/X86/2011-12-04-loserreg.ll | 13 | ||||
| -rw-r--r-- | test/Transforms/LoopStrengthReduce/dominate-assert.ll | 2 | ||||
| -rw-r--r-- | test/Transforms/LoopStrengthReduce/exit_compare_live_range.ll | 2 | ||||
| -rw-r--r-- | test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll | 9 |
10 files changed, 236 insertions, 37 deletions
diff --git a/test/Transforms/LoopStrengthReduce/2012-07-18-LimitReassociate.ll b/test/Transforms/LoopStrengthReduce/2012-07-18-LimitReassociate.ll index 3793baccbbc1..9524be3ceee0 100644 --- a/test/Transforms/LoopStrengthReduce/2012-07-18-LimitReassociate.ll +++ b/test/Transforms/LoopStrengthReduce/2012-07-18-LimitReassociate.ll @@ -1,4 +1,4 @@ -; RUN: opt -loop-reduce -disable-output -debug-only=loop-reduce %s 2> %t +; RUN: opt -loop-reduce -disable-output -debug-only=loop-reduce < %s 2> %t ; RUN: FileCheck %s < %t ; REQUIRES: asserts ; @@ -10,15 +10,13 @@ ; CHECK: After generating reuse formulae: ; CHECK: LSR is examining the following uses: ; CHECK: LSR Use: Kind=Special -; CHECK: {{.*reg\(\{\{\{\{\{\{\{\{\{}} -; CHECK: {{.*reg\(\{\{\{\{\{\{\{\{\{}} -; CHECK: {{.*reg\(\{\{\{\{\{\{\{\{\{}} -; CHECK: {{.*reg\(\{\{\{\{\{\{\{\{\{}} -; CHECK: {{.*reg\(\{\{\{\{\{\{\{\{\{}} +; CHECK: {{.*reg\(\{.*\{.*\{.*\{.*\{.*\{.*\{.*\{.*\{}} +; CHECK: {{.*reg\(\{.*\{.*\{.*\{.*\{.*\{.*\{.*\{.*\{}} +; CHECK: {{.*reg\(\{.*\{.*\{.*\{.*\{.*\{.*\{.*\{.*\{}} +; CHECK: {{.*reg\(\{.*\{.*\{.*\{.*\{.*\{.*\{.*\{.*\{}} +; CHECK: {{.*reg\(\{.*\{.*\{.*\{.*\{.*\{.*\{.*\{.*\{}} ; CHECK-NOT:reg ; CHECK: Filtering for use -target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" -target triple = "x86_64-unknown-freebsd9" %struct.snork = type { %struct.fuga, i32, i32, i32, i32, i32, i32 } %struct.fuga = type { %struct.gork, i64 } diff --git a/test/Transforms/LoopStrengthReduce/2013-01-05-IndBr.ll b/test/Transforms/LoopStrengthReduce/2013-01-05-IndBr.ll new file mode 100644 index 000000000000..bce234cd4066 --- /dev/null +++ b/test/Transforms/LoopStrengthReduce/2013-01-05-IndBr.ll @@ -0,0 +1,44 @@ +; RUN: opt -loop-reduce -S < %s | FileCheck %s +; +; Indirect branch in the preheader crashes replaceCongruentIVs. +; rdar://12910141 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32-S128" + +; CHECK: @test +; CHECK: bb8: +; CHECK-NEXT: phi i8 +; CHECK-NEXT: phi i8 +; CHECK: ret void +define void @test() nounwind ssp { +bb: + br label %bb190 + +bb8: ; preds = %bb190, %bb11 + %tmp = phi i8 [ %tmp14, %bb11 ], [ 25, %bb190 ] + %tmp9 = phi i8 [ %tmp12, %bb11 ], [ 25, %bb190 ] + %tmp10 = add i8 %tmp, -5 + indirectbr i8* undef, [label %bb11, label %bb15] + +bb11: ; preds = %bb8 + %tmp12 = add i8 %tmp9, 1 + %tmp13 = add i8 %tmp9, -19 + %tmp14 = add i8 %tmp, 1 + indirectbr i8* undef, [label %bb8] + +bb15: ; preds = %bb8 + indirectbr i8* undef, [label %bb16] + +bb16: ; preds = %bb16, %bb15 + indirectbr i8* undef, [label %bb37, label %bb190] + + +bb37: ; preds = %bb190 + indirectbr i8* undef, [label %bb38] + +bb38: ; preds = %bb37, %bb5 + ret void + +bb190: ; preds = %bb189, %bb187 + indirectbr i8* undef, [label %bb37, label %bb8] +} diff --git a/test/Transforms/LoopStrengthReduce/2013-01-14-ReuseCast.ll b/test/Transforms/LoopStrengthReduce/2013-01-14-ReuseCast.ll new file mode 100644 index 000000000000..8fbddf8ae4c8 --- /dev/null +++ b/test/Transforms/LoopStrengthReduce/2013-01-14-ReuseCast.ll @@ -0,0 +1,84 @@ +; RUN: opt -loop-reduce -S < %s | FileCheck %s +; +; LTO of clang, which mistakenly uses no TargetLoweringInfo, causes a +; miscompile. ReuseOrCreateCast replace ptrtoint operand with undef. +; Reproducing the miscompile requires no triple, hence no "TTI". +; rdar://13007381 + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" + +; Verify that nothing uses the "dead" ptrtoint from "undef". +; CHECK: @VerifyDiagnosticConsumerTest +; CHECK: bb: +; CHECK: %0 = ptrtoint i8* undef to i64 +; CHECK-NOT: %0 +; CHECK: .lr.ph +; CHECK-NOT: %0 +; CHECK: sub i64 %7, %tmp6 +; CHECK-NOT: %0 +; CHECK: ret void +define void @VerifyDiagnosticConsumerTest() unnamed_addr nounwind uwtable align 2 { +bb: + %tmp3 = call i8* @getCharData() nounwind + %tmp4 = call i8* @getCharData() nounwind + %tmp5 = ptrtoint i8* %tmp4 to i64 + %tmp6 = ptrtoint i8* %tmp3 to i64 + %tmp7 = sub i64 %tmp5, %tmp6 + br i1 undef, label %bb87, label %.preheader + +.preheader: ; preds = %bb10, %bb + br i1 undef, label %_ZNK4llvm9StringRef4findEcm.exit42.thread, label %bb10 + +bb10: ; preds = %.preheader + br i1 undef, label %_ZNK4llvm9StringRef4findEcm.exit42, label %.preheader + +_ZNK4llvm9StringRef4findEcm.exit42: ; preds = %bb10 + br i1 undef, label %_ZNK4llvm9StringRef4findEcm.exit42.thread, label %.lr.ph + +_ZNK4llvm9StringRef4findEcm.exit42.thread: ; preds = %_ZNK4llvm9StringRef4findEcm.exit42, %.preheader + unreachable + +.lr.ph: ; preds = %_ZNK4llvm9StringRef4findEcm.exit42 + br label %bb36 + +_ZNK4llvm9StringRef4findEcm.exit.loopexit: ; preds = %bb63 + %tmp21 = icmp eq i64 %i.0.i, -1 + br i1 %tmp21, label %_ZNK4llvm9StringRef4findEcm.exit._crit_edge, label %bb36 + +_ZNK4llvm9StringRef4findEcm.exit._crit_edge: ; preds = %bb61, %_ZNK4llvm9StringRef4findEcm.exit.loopexit + unreachable + +bb36: ; preds = %_ZNK4llvm9StringRef4findEcm.exit.loopexit, %.lr.ph + %loc.063 = phi i64 [ undef, %.lr.ph ], [ %i.0.i, %_ZNK4llvm9StringRef4findEcm.exit.loopexit ] + switch i8 undef, label %bb57 [ + i8 10, label %bb48 + i8 13, label %bb48 + ] + +bb48: ; preds = %bb36, %bb36 + br label %bb58 + +bb57: ; preds = %bb36 + br label %bb58 + +bb58: ; preds = %bb57, %bb48 + %tmp59 = icmp ugt i64 %tmp7, undef + %tmp60 = select i1 %tmp59, i64 undef, i64 %tmp7 + br label %bb61 + +bb61: ; preds = %bb63, %bb58 + %i.0.i = phi i64 [ %tmp60, %bb58 ], [ %tmp67, %bb63 ] + %tmp62 = icmp eq i64 %i.0.i, %tmp7 + br i1 %tmp62, label %_ZNK4llvm9StringRef4findEcm.exit._crit_edge, label %bb63 + +bb63: ; preds = %bb61 + %tmp64 = getelementptr inbounds i8* %tmp3, i64 %i.0.i + %tmp65 = load i8* %tmp64, align 1 + %tmp67 = add i64 %i.0.i, 1 + br i1 undef, label %_ZNK4llvm9StringRef4findEcm.exit.loopexit, label %bb61 + +bb87: ; preds = %bb + ret void +} + +declare i8* @getCharData() diff --git a/test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll b/test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll index 9189d79e2fb6..ee3cc4dd78fc 100644 --- a/test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll +++ b/test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll @@ -205,18 +205,18 @@ for.end: ; preds = %for.body ; post-increment addressing, no add's or add.w's beyond the three ; mentioned. Most importantly, there should be no spills or reloads! ; -; CHECK: testNeon: -; CHECK: %.lr.ph -; CHECK-NOT: lsl.w -; CHECK-NOT: {{ldr|str|adds|add r}} -; CHECK: add.w r -; CHECK-NOT: {{ldr|str|adds|add r}} -; CHECK: add.w r -; CHECK-NOT: {{ldr|str|adds|add r}} -; CHECK: add.w r -; CHECK-NOT: {{ldr|str|adds|add r}} -; CHECK-NOT: add.w r -; CHECK: bne +; A9: testNeon: +; A9: %.lr.ph +; A9-NOT: lsl.w +; A9-NOT: {{ldr|str|adds|add r}} +; A9: add.w r +; A9-NOT: {{ldr|str|adds|add r}} +; A9: add.w r +; A9-NOT: {{ldr|str|adds|add r}} +; A9: add.w r +; A9-NOT: {{ldr|str|adds|add r}} +; A9-NOT: add.w r +; A9: bne define hidden void @testNeon(i8* %ref_data, i32 %ref_stride, i32 %limit, <16 x i8>* nocapture %data) nounwind optsize { %1 = icmp sgt i32 %limit, 0 br i1 %1, label %.lr.ph, label %45 @@ -290,3 +290,80 @@ define hidden void @testNeon(i8* %ref_data, i32 %ref_stride, i32 %limit, <16 x i } declare <1 x i64> @llvm.arm.neon.vld1.v1i64(i8*, i32) nounwind readonly + +; Handle chains in which the same offset is used for both loads and +; stores to the same array. +; rdar://11410078. +; +; A9: @testReuse +; A9: %for.body +; A9: vld1.8 {d{{[0-9]+}}}, [[BASE:[r[0-9]+]]], [[INC:r[0-9]]] +; A9: vld1.8 {d{{[0-9]+}}}, [[BASE]], [[INC]] +; A9: vld1.8 {d{{[0-9]+}}}, [[BASE]], [[INC]] +; A9: vld1.8 {d{{[0-9]+}}}, [[BASE]], [[INC]] +; A9: vld1.8 {d{{[0-9]+}}}, [[BASE]], [[INC]] +; A9: vld1.8 {d{{[0-9]+}}}, [[BASE]], [[INC]] +; A9: vld1.8 {d{{[0-9]+}}}, [[BASE]], [[INC]] +; A9: vld1.8 {d{{[0-9]+}}}, [[BASE]], {{r[0-9]}} +; A9: vst1.8 {d{{[0-9]+}}}, [[BASE]], [[INC]] +; A9: vst1.8 {d{{[0-9]+}}}, [[BASE]], [[INC]] +; A9: vst1.8 {d{{[0-9]+}}}, [[BASE]], [[INC]] +; A9: vst1.8 {d{{[0-9]+}}}, [[BASE]], [[INC]] +; A9: vst1.8 {d{{[0-9]+}}}, [[BASE]], [[INC]] +; A9: vst1.8 {d{{[0-9]+}}}, [[BASE]] +; A9: bne +define void @testReuse(i8* %src, i32 %stride) nounwind ssp { +entry: + %mul = shl nsw i32 %stride, 2 + %idx.neg = sub i32 0, %mul + %mul1 = mul nsw i32 %stride, 3 + %idx.neg2 = sub i32 0, %mul1 + %mul5 = shl nsw i32 %stride, 1 + %idx.neg6 = sub i32 0, %mul5 + %idx.neg10 = sub i32 0, %stride + br label %for.body + +for.body: ; preds = %for.body, %entry + %i.0110 = phi i32 [ 0, %entry ], [ %inc, %for.body ] + %src.addr = phi i8* [ %src, %entry ], [ %add.ptr45, %for.body ] + %add.ptr = getelementptr inbounds i8* %src.addr, i32 %idx.neg + %vld1 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8(i8* %add.ptr, i32 1) + %add.ptr3 = getelementptr inbounds i8* %src.addr, i32 %idx.neg2 + %vld2 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8(i8* %add.ptr3, i32 1) + %add.ptr7 = getelementptr inbounds i8* %src.addr, i32 %idx.neg6 + %vld3 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8(i8* %add.ptr7, i32 1) + %add.ptr11 = getelementptr inbounds i8* %src.addr, i32 %idx.neg10 + %vld4 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8(i8* %add.ptr11, i32 1) + %vld5 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8(i8* %src.addr, i32 1) + %add.ptr17 = getelementptr inbounds i8* %src.addr, i32 %stride + %vld6 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8(i8* %add.ptr17, i32 1) + %add.ptr20 = getelementptr inbounds i8* %src.addr, i32 %mul5 + %vld7 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8(i8* %add.ptr20, i32 1) + %add.ptr23 = getelementptr inbounds i8* %src.addr, i32 %mul1 + %vld8 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8(i8* %add.ptr23, i32 1) + %vadd1 = tail call <8 x i8> @llvm.arm.neon.vhaddu.v8i8(<8 x i8> %vld1, <8 x i8> %vld2) nounwind + %vadd2 = tail call <8 x i8> @llvm.arm.neon.vhaddu.v8i8(<8 x i8> %vld2, <8 x i8> %vld3) nounwind + %vadd3 = tail call <8 x i8> @llvm.arm.neon.vhaddu.v8i8(<8 x i8> %vld3, <8 x i8> %vld4) nounwind + %vadd4 = tail call <8 x i8> @llvm.arm.neon.vhaddu.v8i8(<8 x i8> %vld4, <8 x i8> %vld5) nounwind + %vadd5 = tail call <8 x i8> @llvm.arm.neon.vhaddu.v8i8(<8 x i8> %vld5, <8 x i8> %vld6) nounwind + %vadd6 = tail call <8 x i8> @llvm.arm.neon.vhaddu.v8i8(<8 x i8> %vld6, <8 x i8> %vld7) nounwind + tail call void @llvm.arm.neon.vst1.v8i8(i8* %add.ptr3, <8 x i8> %vadd1, i32 1) + tail call void @llvm.arm.neon.vst1.v8i8(i8* %add.ptr7, <8 x i8> %vadd2, i32 1) + tail call void @llvm.arm.neon.vst1.v8i8(i8* %add.ptr11, <8 x i8> %vadd3, i32 1) + tail call void @llvm.arm.neon.vst1.v8i8(i8* %src.addr, <8 x i8> %vadd4, i32 1) + tail call void @llvm.arm.neon.vst1.v8i8(i8* %add.ptr17, <8 x i8> %vadd5, i32 1) + tail call void @llvm.arm.neon.vst1.v8i8(i8* %add.ptr20, <8 x i8> %vadd6, i32 1) + %inc = add nsw i32 %i.0110, 1 + %add.ptr45 = getelementptr inbounds i8* %src.addr, i32 8 + %exitcond = icmp eq i32 %inc, 4 + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body + ret void +} + +declare <8 x i8> @llvm.arm.neon.vld1.v8i8(i8*, i32) nounwind readonly + +declare void @llvm.arm.neon.vst1.v8i8(i8*, <8 x i8>, i32) nounwind + +declare <8 x i8> @llvm.arm.neon.vhaddu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone diff --git a/test/Transforms/LoopStrengthReduce/2008-08-14-ShadowIV.ll b/test/Transforms/LoopStrengthReduce/X86/2008-08-14-ShadowIV.ll index c650d8cf76d8..9a7f4865c591 100644 --- a/test/Transforms/LoopStrengthReduce/2008-08-14-ShadowIV.ll +++ b/test/Transforms/LoopStrengthReduce/X86/2008-08-14-ShadowIV.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loop-reduce -S | grep "phi double" | count 1 +; RUN: opt < %s -loop-reduce -S -mtriple=x86_64-unknown-unknown | grep "phi double" | count 1 define void @foobar(i32 %n) nounwind { entry: diff --git a/test/Transforms/LoopStrengthReduce/2011-07-20-DoubleIV.ll b/test/Transforms/LoopStrengthReduce/X86/2011-07-20-DoubleIV.ll index 5d9ed64ef422..a932b4792586 100644 --- a/test/Transforms/LoopStrengthReduce/2011-07-20-DoubleIV.ll +++ b/test/Transforms/LoopStrengthReduce/X86/2011-07-20-DoubleIV.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loop-reduce -S | FileCheck %s +; RUN: opt < %s -loop-reduce -S -mtriple=x86_64-unknown-unknown | FileCheck %s ; ; Test LSR's OptimizeShadowIV. Handle a floating-point IV with a ; nonzero initial value. diff --git a/test/Transforms/LoopStrengthReduce/X86/2011-12-04-loserreg.ll b/test/Transforms/LoopStrengthReduce/X86/2011-12-04-loserreg.ll index 510865096272..eedfc200f48b 100644 --- a/test/Transforms/LoopStrengthReduce/X86/2011-12-04-loserreg.ll +++ b/test/Transforms/LoopStrengthReduce/X86/2011-12-04-loserreg.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s | FileCheck %s +; RUN: opt < %s -loop-reduce -S | FileCheck %s ; ; Test LSR's ability to prune formulae that refer to nonexistant ; AddRecs in other loops. @@ -15,13 +15,10 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 target triple = "x86_64-apple-darwin" ; CHECK: @test -; CHECK: # %for.body{{$}} -; dummyiv copy should be removed -; CHECK-NOT: movq -; CHECK: # %for.cond19.preheader -; dummycnt should be removed -; CHECK-NOT: incq -; CHECK: # %for.body23{{$}} +; CHECK: for.body: +; CHECK: %lsr.iv +; CHECK-NOT: %dummyout +; CHECK: ret define i64 @test(i64 %count, float* nocapture %srcrow, i32* nocapture %destrow) nounwind uwtable ssp { entry: %cmp34 = icmp eq i64 %count, 0 diff --git a/test/Transforms/LoopStrengthReduce/dominate-assert.ll b/test/Transforms/LoopStrengthReduce/dominate-assert.ll index b87bf620decf..ff8cab83137b 100644 --- a/test/Transforms/LoopStrengthReduce/dominate-assert.ll +++ b/test/Transforms/LoopStrengthReduce/dominate-assert.ll @@ -1,4 +1,4 @@ -; RUN: opt -loop-reduce %s +; RUN: opt -loop-reduce < %s ; we used to crash on this one declare i8* @_Znwm() diff --git a/test/Transforms/LoopStrengthReduce/exit_compare_live_range.ll b/test/Transforms/LoopStrengthReduce/exit_compare_live_range.ll index ad4959be340e..498be1a9a1a2 100644 --- a/test/Transforms/LoopStrengthReduce/exit_compare_live_range.ll +++ b/test/Transforms/LoopStrengthReduce/exit_compare_live_range.ll @@ -2,7 +2,7 @@ ; having overlapping live ranges that result in copies. We want the setcc ; instruction immediately before the conditional branch. ; -; RUN: opt -S -loop-reduce %s | FileCheck %s +; RUN: opt -S -loop-reduce < %s | FileCheck %s define void @foo(float* %D, i32 %E) { entry: diff --git a/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll b/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll index 96904c66e640..45aeb4e691a0 100644 --- a/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll +++ b/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll @@ -4,18 +4,17 @@ ; LSR should properly handle the post-inc offset when folding the ; non-IV operand of an icmp into the IV. -; CHECK: %4 = sub i64 %sub.ptr.lhs.cast, %sub.ptr.rhs.cast -; CHECK: %5 = lshr i64 %4, 1 -; CHECK: %6 = mul i64 %5, 2 +; CHECK: [[r1:%[a-z0-9]+]] = sub i64 %sub.ptr.lhs.cast, %sub.ptr.rhs.cast +; CHECK: [[r2:%[a-z0-9]+]] = lshr i64 [[r1]], 1 +; CHECK: [[r3:%[a-z0-9]+]] = mul i64 [[r2]], 2 ; CHECK: br label %for.body ; CHECK: for.body: -; CHECK: %lsr.iv2 = phi i64 [ %lsr.iv.next, %for.body ], [ %6, %for.body.lr.ph ] +; CHECK: %lsr.iv2 = phi i64 [ %lsr.iv.next, %for.body ], [ [[r3]], %for.body.lr.ph ] ; CHECK: %lsr.iv.next = add i64 %lsr.iv2, -2 ; CHECK: %lsr.iv.next3 = inttoptr i64 %lsr.iv.next to i16* ; CHECK: %cmp27 = icmp eq i16* %lsr.iv.next3, null target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" -target triple = "x86_64-unknown-linux-gnu" %struct.Vector2 = type { i16*, [64 x i16], i32 } |