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* Store MPIDR register in pcpu.Michal Meloun2020-11-291-1/+2
| | | | | | | | | | | | | MPIDR represents physical locality of given core and it should be used as the only viable/robust connection between cpuid (which have zero relation to cores topology) and external description (for example in FDT). It can be used for determining which interrupt is associated to given per-CPU PMU or by scheduler for determining big/little core or cluster topology. MFC after: 3 weeks Notes: svn path=/head/; revision=368161
* Remove the pre-ARMv6 and pre-INTRNG code.Michal Meloun2020-11-291-9/+0
| | | | | | | | ARM has required ARMV6+ and INTRNg for some time now, so remove always false #ifdefs and unconditionally do always true #ifdefs. Notes: svn path=/head/; revision=368141
* arm: clean up empty lines in .c and .h filesMateusz Guzik2020-09-011-1/+0
| | | | Notes: svn path=/head/; revision=365068
* arm: Implement cpu_est_clockrate for armv[67]Emmanuel Vadot2018-07-191-1/+2
| | | | Notes: svn path=/head/; revision=336476
* Implement mitigation for Spectre version 2 attacks on ARMv7.Michal Meloun2018-01-271-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Similarly as we already do for arm64, for mitigation is necessary to flush branch predictor when we: - do task switch - receive prefetch abort on non-userspace address The user can disable this mitigation by setting 'machdep.disable_bp_hardening' sysctl variable, or it can check actual system status by reading 'machdep.spectre_v2_safe' The situation is complicated by fact that: - for Cortex-A8, the BPIALL instruction is effectively NOP until the IBE bit in ACTLR is set. - for Cortex-A15, the BPIALL is always NOP. The branch predictor can be only flushed by doing ICIALLU with special bit (Enable invalidates of BTB) set in ACTLR. Since access to the ACTLR register is locked to secure monitor/firmware on most boards, they will also need update of firmware / U-boot. In worst case, when secure monitor is on-chip ROM (e.g. PandaBoard), the board is unfixable. MFC after: 2 weeks Reviewed by: imp, emaste Differential Revision: https://reviews.freebsd.org/D13931 Notes: svn path=/head/; revision=328467
* sys/arm: further adoption of SPDX licensing ID tags.Pedro F. Giffuni2017-11-271-0/+2
| | | | | | | | | | | | | | | Mainly focus on files that use BSD 2-Clause license, however the tool I was using misidentified many licenses so this was mostly a manual - error prone - task. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts. Notes: svn path=/head/; revision=326258
* - Remove 'struct vmmeter' from 'struct pcpu', leaving only global vmmeterGleb Smirnoff2017-04-171-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | in place. To do per-cpu stats, convert all fields that previously were maintained in the vmmeters that sit in pcpus to counter(9). - Since some vmmeter stats may be touched at very early stages of boot, before we have set up UMA and we can do counter_u64_alloc(), provide an early counter mechanism: o Leave one spare uint64_t in struct pcpu, named pc_early_dummy_counter. o Point counter(9) fields of vmmeter to pcpu[0].pc_early_dummy_counter, so that at early stages of boot, before counters are allocated we already point to a counter that can be safely written to. o For sparc64 that required a whole dummy pcpu[MAXCPU] array. Further related changes: - Don't include vmmeter.h into pcpu.h. - vm.stats.vm.v_swappgsout and vm.stats.vm.v_swappgsin changed to 64-bit, to match kernel representation. - struct vmmeter hidden under _KERNEL, and only vmstat(1) is an exclusion. This is based on benno@'s 4-year old patch: https://lists.freebsd.org/pipermail/freebsd-arch/2013-July/014471.html Reviewed by: kib, gallatin, marius, lidl Differential Revision: https://reviews.freebsd.org/D10156 Notes: svn path=/head/; revision=317061
* Further cleanup of per-CPU armv6 pmap data:Jason A. Harmening2017-01-261-4/+2
| | | | | | | | | | | | | | | | | | | - Replace pcpu_find(curcpu) with get_pcpu(), which is much more direct. - Remove armv4 pcpu fields which I added in r286296 but never needed to use. - armv6 pc_qmap_addr was leftover from the old armv6 pmap implementation. Rename it and put it to use in the new one. Noted by: skra Reviewed by: skra MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D9312 Notes: svn path=/head/; revision=312792
* Like r310481 for i386, move the objects used to create temporaryJason A. Harmening2017-01-221-1/+10
| | | | | | | | | | | | | | | | | mappings for armv6 pmap zero and copy operations to the MD PCPU region. Change sysmap initialization to only allocate KVA pages for CPUs that are actually present. While here, collapse CMAP3 into CMAP2 (their use was mutually exclusive anyway) and "recover" some space in PCPU padding that has always been available due to 64-byte cacheline padding. Reviewed by: skra MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D9172 Notes: svn path=/head/; revision=312610
* Remove arm's cpuconf.h, and references to it, after moving a few lines fromIan Lepore2017-01-161-2/+0
| | | | | | | | | | | | | | | | it into pmap-v4.h where they are used. Other than those few lines of support for different MMU types, nothing in cpuconf.h has been used in our code for quite a while. The file existed to set up a variety of symbols to describe the architecture. Over the past few years we have converted all of our source to use the new architecture symbols standardized by ARM Inc, and predefined by both clang and gcc. PR: 216104 Notes: svn path=/head/; revision=312292
* Make it possible to safely use TPIDRURW from userspace.Ed Schouten2016-09-221-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | On amd64, arm64 and i386, we have the possibility to switch between TLS areas in userspace. The nice thing about this is that it makes it easier to do light-weight threading, if we ever feel like doing that. On armv6, let's go into the same direction by making it possible to safely use the TPIDRURW register, which is intended for this purpose. Clean up the ARMv6 code to remove md_tp entirely. Simply add a dedicated field to the PCB to hold the value of TPIDRURW across context switches, like we do for any other register. As userspace currently uses the read-only TPIDRURO register, simply ensure that we keep both values in sync where possible. The system calls for modifying the read-only register will simply write the intended value into both registers, so that it lazily ends up in the PCB during the next context switch. Reviewed by: https://reviews.freebsd.org/D7951 Approved by: andrew Reviewed by: imp Differential Revision: https://reviews.freebsd.org/D7951 Notes: svn path=/head/; revision=306162
* Include machine/acle-compat.h in cdefs.h on arm if the compiler doesn'tIan Lepore2016-05-251-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | have ACLE support built in. The ACLE (ARM C Language Extensions) defines a set of standardized symbols which indicate the architecture version and features available. ACLE support is built in to modern compilers (both clang and gcc), but absent from gcc prior to 4.4. ARM (the company) provides the acle-compat.h header file to define the right symbols for older versions of gcc. Basically, acle-compat.h does for arm about the same thing cdefs.h does for freebsd: defines standardized macros that work no matter which compiler you use. If ARM hadn't provided this file we would have ended up with a big #ifdef __arm__ section in cdefs.h with our own compatibility shims. Remove #include <machine/acle-compat.h> from the zillion other places (an ever-growing list) that it appears. Since style(9) requires sys/types.h or sys/param.h early in the include list, and both of those lead to including cdefs.h, only a couple special cases still need to include acle-compat.h directly. Loves it: imp Notes: svn path=/head/; revision=300694
* SMP support for ARMv6/v7 HW watchpointsZbigniew Bodek2016-01-281-1/+6
| | | | | | | | | | | | | | | | | | | | | | | Use per-CPU structure to store HW watchpoints registers state for each CPU present in the system. Those registers will be restored upon wake up from the STOP state if requested by the debug_monitor code. The method is similar to the one introduced to AMD64. We store all possible 16 registers for HW watchpoints (maximum allowed by the architecture). HW breakpoints are not maintained since they are used for single stepping only. Pointed out by: kib Reviewed by: wma No strong objections from: kib Submitted by: Zbigniew Bodek <zbb@semihalf.com> Obtained from: Semihalf Sponsored by: Juniper Networks Inc. Differential Revision: https://reviews.freebsd.org/D4338 Notes: svn path=/head/; revision=294987
* ARM: Remove trailing whitespace from sys/arm/includeMichal Meloun2015-11-101-1/+1
| | | | | | | | | No functional changes. Approved by: kib (mentor) Notes: svn path=/head/; revision=290648
* Add two new pmap functions:Jason A. Harmening2015-08-041-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | vm_offset_t pmap_quick_enter_page(vm_page_t m) void pmap_quick_remove_page(vm_offset_t kva) These will create and destroy a temporary, CPU-local KVA mapping of a specified page. Guarantees: --Will not sleep and will not fail. --Safe to call under a non-sleepable lock or from an ithread Restrictions: --Not guaranteed to be safe to call from an interrupt filter or under a spin mutex on all platforms --Current implementation does not guarantee more than one page of mapping space across all platforms. MI code should not make nested calls to pmap_quick_enter_page. --MI code should not perform locking while holding onto a mapping created by pmap_quick_enter_page The idea is to use this in busdma, for bounce buffer copies as well as virtually-indexed cache maintenance on mips and arm. NOTE: the non-i386, non-amd64 implementations of these functions still need review and testing. Reviewed by: kib Approved by: kib (mentor) Differential Revision: http://reviews.freebsd.org/D3013 Notes: svn path=/head/; revision=286296
* Stop using VFP in pcpu.h when we mean ARMv6 and later.Andrew Turner2015-06-111-3/+3
| | | | Notes: svn path=/head/; revision=284265
* Remove pc_cpu, it was duplicating pc_cpuid so was unneeded.Andrew Turner2015-06-071-2/+1
| | | | Notes: svn path=/head/; revision=284109
* Rework the VFP code that handles demand-based save and restore of state.Ian Lepore2014-03-091-2/+1
| | | | | | | | | | | | | | | | | | | | | | The old code was full of complexity that would only matter if the kernel itself used the VFP hardware. Now that's reduced to either killing the userland process or panicking the kernel on an illegal VFP instruction. This removes most of the complexity from the assembler code, reducing it to just calling the save code if the outgoing thread used the VFP. The routine that stores the VFP state now takes a flag that indicates whether the hardware should be disabled after saving state. Right now it always is, but this makes the code ready to be used by get/set_mcontext() (doing so will be addressed in a future commit). Remove the arm-specific pc_vfpcthread from struct pcpu and use the MI field pc_fpcurthread instead. Reviewed by: cognet Notes: svn path=/head/; revision=262941
* Only use the CPU ID register if SMP is defined. Some non-MPCore armv6 cpu,Olivier Houchard2014-02-021-0/+4
| | | | | | | | such as the one found in the RPi, don't have it, and just hang when we try to access it. Notes: svn path=/head/; revision=261419
* Change the way pcpu and curthread are stored per-core:Olivier Houchard2014-02-021-7/+20
| | | | | | | | | | | | the old way was to store pcpu in a register, and get curthread from pcpu, which is not very atomic, and led to issues if the thread was migrated to another core between the time we got the pcpu address and the time we got curthread. Instead, we now store curthread where pcpu used to be store, and we calculate the pcpu address based on the cpu id. Notes: svn path=/head/; revision=261415
* Remove #include <machine/frame.h> from all the arm code that doesn'tIan Lepore2013-10-271-1/+0
| | | | | | | | | really need it. That would be almost everywhere it was included. Add it in a couple files that really do need it and were previously getting it by accident via another header. Notes: svn path=/head/; revision=257200
* Rename device vfp to option VFP and retire the ARM_VFP_SUPPORT option. ThisAndrew Turner2013-08-171-1/+1
| | | | | | | | | | simplifies enabling as previously both options were required to be enabled, now we only need a single option. While here enable VFP on the PandaBoard. Notes: svn path=/head/; revision=254461
* Merge from projects/counters:Gleb Smirnoff2013-04-081-3/+4
| | | | | | | | | | Pad struct pcpu so that its size is denominator of PAGE_SIZE. This is done to reduce memory waste in UMA_PCPU_ZONE zones. Sponsored by: Nginx, Inc. Notes: svn path=/head/; revision=249265
* Use get_pcpu() instead of using pcpup, as it's wrong for SMP.Olivier Houchard2013-01-091-2/+2
| | | | | | | Submitted by: Lukasz Plachno <luk@semihalf.com> Notes: svn path=/head/; revision=245202
* Merging projects/armv6, part 1Oleksandr Tymoshenko2012-08-151-10/+53
| | | | | | | | | | | | Cummulative patch of changes that are not vendor-specific: - ARMv6 and ARMv7 architecture support - ARM SMP support - VFP/Neon support - ARM Generic Interrupt Controller driver - Simplification of startup code for all platforms Notes: svn path=/head/; revision=239268
* Remove the unused field "pc_prvspace" from the MD fields for the structOlivier Houchard2008-09-111-6/+1
| | | | | | | | | | pcpu. There's not even a thing such as a "struct pcup". While I'm there, remove a comment that makes no sense for arm. Spotted out by: Mark Tinguely Notes: svn path=/head/; revision=182945
* Export 'struct pcpu' to userland w/o requiring _KERNEL. A few portsJohn Baldwin2008-08-191-0/+4
| | | | | | | | | | already define _KERNEL to get to this and I'm about to add hooks to libkvm to access per-CPU data. MFC after: 1 week Notes: svn path=/head/; revision=181875
* - PCPU_ADD is no longer spelled with LAZY_ in the middle.Jeff Roberson2007-06-061-1/+1
| | | | | | | Submitted by: attilio Notes: svn path=/head/; revision=170388
* Rework the PCPU_* (MD) interface:Attilio Rao2007-06-041-1/+2
| | | | | | | | | | | | | | | - Rename PCPU_LAZY_INC into PCPU_INC - Add the PCPU_ADD interface which just does an add on the pcpu member given a specific value. Note that for most architectures PCPU_INC and PCPU_ADD are not safe. This is a point that needs some discussions/work in the next days. Reviewed by: alc, bde Approved by: jeff (mentor) Notes: svn path=/head/; revision=170291
* Push down the implementation of PCPU_LAZY_INC() into the machine-dependentAlan Cox2007-03-111-0/+6
| | | | | | | | | | header file. Reimplement PCPU_LAZY_INC() on amd64 and i386 making it atomic with respect to interrupts. Reviewed by: bde, jhb Notes: svn path=/head/; revision=167429
* There's no need to include <machine/asmacros.h> here.Olivier Houchard2005-11-081-1/+0
| | | | Notes: svn path=/head/; revision=152189
* Directly use __pcpu for PCPU_* instead of pcpup.Olivier Houchard2004-11-041-3/+4
| | | | Notes: svn path=/head/; revision=137228
* Import FreeBSD/arm kernel bits.Olivier Houchard2004-05-141-0/+60
It only supports sa1110 (on simics) right now, but xscale support should come soon. Some of the initial work has been provided by : Stephane Potvin <sepotvin at videotron.ca> Most of this comes from NetBSD. Notes: svn path=/head/; revision=129198
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