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* Remove unused functions and variables in cpufunc.[ch].Michal Meloun2020-12-142-17/+0
| | | | Notes: svn path=/head/; revision=368635
* arm: Let the GDB stub write to SP, LR and GP registersMark Johnston2020-12-071-0/+2
| | | | | | | | | | | | This can be handy if gdb's stack unwinder fails, for example because of a bug in kgdb's trap frame unwinder. PR: 251463 Submitted by: Dmitry Salychev <dsl@mcusim.org> MFC after: 1 week Notes: svn path=/head/; revision=368414
* Store MPIDR register in pcpu.Michal Meloun2020-11-291-1/+2
| | | | | | | | | | | | | MPIDR represents physical locality of given core and it should be used as the only viable/robust connection between cpuid (which have zero relation to cores topology) and external description (for example in FDT). It can be used for determining which interrupt is associated to given per-CPU PMU or by scheduler for determining big/little core or cluster topology. MFC after: 3 weeks Notes: svn path=/head/; revision=368161
* Remove remaining fragments of code for older already ceased ARM versions.Michal Meloun2020-11-292-43/+0
| | | | Notes: svn path=/head/; revision=368154
* Remove the pre-ARMv6 and pre-INTRNG code.Michal Meloun2020-11-2922-360/+2
| | | | | | | | ARM has required ARMV6+ and INTRNg for some time now, so remove always false #ifdefs and unconditionally do always true #ifdefs. Notes: svn path=/head/; revision=368141
* Remove now unused armv4 and not-INTRNG files.Michal Meloun2020-11-287-1586/+0
| | | | Notes: svn path=/head/; revision=368126
* arm: Correctly report the size of FPA registers to GDBMark Johnston2020-11-271-2/+6
| | | | | | | | | | | | Modern ARM systems do not have an FPA unit but GDB reserves register indices for FPA registers and expects the stub to know their sizes. PR: 251022 Submitted by: Dmitry Salychev <dsl@mcusim.org> MFC after: 2 weeks Notes: svn path=/head/; revision=368108
* Remove NO_EVENTTIMERS supportMark Johnston2020-11-191-1/+0
| | | | | | | | | | | | | | The arm configs that required it have been removed from the tree. Removing this option makes the callout code easier to read and discourages developers from adding new configs without eventtimer drivers. Reviewed by: ian, imp, mav Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D27270 Notes: svn path=/head/; revision=367826
* Remove the 'nap' field from ARM's 'struct syscall_args', to bring itEdward Tomasz Napierala2020-11-051-1/+0
| | | | | | | | | | | | | in sync with (most) other architectures. No functional changes. Reviewed by: manu Tested by: mmel MFC after: 2 weeks Sponsored by: EPSRC Differential Revision: https://reviews.freebsd.org/D26604 Notes: svn path=/head/; revision=367394
* Get rid of sa->narg. It serves no purpose; use sa->callp->sy_narg instead.Edward Tomasz Napierala2020-09-271-1/+0
| | | | | | | | | Reviewed by: kib Sponsored by: DARPA Differential Revision: https://reviews.freebsd.org/D26458 Notes: svn path=/head/; revision=366205
* Add a vmparam.h constant indicating pmap support for large pages.Mark Johnston2020-09-231-0/+5
| | | | | | | | | | | Enable SHM_LARGEPAGE support on arm64. Reviewed by: alc, kib Sponsored by: Juniper Networks, Inc., Klara, Inc. Differential Revision: https://reviews.freebsd.org/D26467 Notes: svn path=/head/; revision=366090
* Sparsify the vm_page_dump bitmapD Scott Phillips2020-09-211-1/+2
| | | | | | | | | | | | | | | | | | | On Ampere Altra systems, the sparse population of RAM within the physical address space causes the vm_page_dump bitmap to be much larger than necessary, increasing the size from ~8 Mib to > 2 Gib (and overflowing `int` for the size). Changing the page dump bitmap also changes the minidump file format, so changes are also necessary in libkvm. Reviewed by: jhb Approved by: scottl (implicit) MFC after: 1 week Sponsored by: Ampere Computing, Inc. Differential Revision: https://reviews.freebsd.org/D26131 Notes: svn path=/head/; revision=365978
* Move vm_page_dump bitset array definition to MI codeD Scott Phillips2020-09-212-4/+5
| | | | | | | | | | | | | | | | | | | These definitions were repeated by all architectures, with small variations. Consolidate the common definitons in machine independent code and use bitset(9) macros for manipulation. Many opportunities for deduplication remain in the machine dependent minidump logic. The only intended functional change is increasing the bit index type to vm_pindex_t, allowing the indexing of pages with address of 8 TiB and greater. Reviewed by: kib, markj Approved by: scottl (implicit) MFC after: 1 week Sponsored by: Ampere Computing, Inc. Differential Revision: https://reviews.freebsd.org/D26129 Notes: svn path=/head/; revision=365977
* Add missing assignment forgotten in r365899Michal Meloun2020-09-201-0/+1
| | | | | | | | | Noticed by: mav MFC after: 1 month MFC with: r365899 Notes: svn path=/head/; revision=365926
* Add NetBSD compatible bus_space_peek_N() and bus_space_poke_N() functions.Michal Meloun2020-09-191-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | One problem with the bus_space_read_N() and bus_space_write_N() family of functions is that they provide no protection against exceptions which can occur when no physical hardware or device responds to the read or write cycles. In such a situation, the system typically would panic due to a kernel-mode bus error. The bus_space_peek_N() and bus_space_poke_N() family of functions provide a mechanism to handle these exceptions gracefully without the risk of crashing the system. Typical example is access to PCI(e) configuration space in bus enumeration function on badly implemented PCI(e) root complexes (RK3399 or Neoverse N1 N1SDP and/or access to PCI(e) register when device is in deep sleep state. This commit adds a real implementation for arm64 only. The remaining architectures have bus_space_peek()/bus_space_poke() emulated by using bus_space_read()/bus_space_write() (without exception handling). MFC after: 1 month Reviewed by: kib Differential Revision: https://reviews.freebsd.org/D25371 Notes: svn path=/head/; revision=365899
* Add the MEM_EXTRACT_PADDR ioctl to /dev/mem.Mark Johnston2020-09-021-1/+1
| | | | | | | | | | | | | | | This allows privileged userspace processes to find information about the physical page backing a given mapping. It is useful in applications such as DPDK which perform some of their own memory management. Reviewed by: kib, jhb (previous version) MFC after: 2 weeks Sponsored by: Juniper Networks, Inc. Sponsored by: Klara Inc. Differential Revision: https://reviews.freebsd.org/D26237 Notes: svn path=/head/; revision=365265
* arm: clean up empty lines in .c and .h filesMateusz Guzik2020-09-0118-32/+0
| | | | Notes: svn path=/head/; revision=365068
* Simplify MACHINE_ARCH to be a single string.John Baldwin2020-06-151-15/+5
| | | | | | | | | | | | | | Big endian and armv4 mean that we are now down to only two supported variants. A future change will use MACHINE_ARCH in assembly which does not support C-style string concatentation and thus needs MACHINE_ARCH defined as a single string. Reviewed by: imp Sponsored by: DARPA Differential Revision: https://reviews.freebsd.org/D25211 Notes: svn path=/head/; revision=362202
* Remove remnant of arm's ELF trampolineMitchell Horne2020-05-311-6/+0
| | | | | | | | | | | | The trampoline code used for loading gzipped a.out kernels on arm was removed in r350436. A portion of this code allowed for DDB to find the symbol tables when booting without loader(8), and some of this was untouched in the removal. Remove it now. Differential Revision: https://reviews.freebsd.org/D24950 Notes: svn path=/head/; revision=361661
* Convert arm's physmem interface to MI codeMitchell Horne2020-04-192-94/+1
| | | | | | | | | | | | | | | | | | | | | | | | | The arm_physmem interface found in arm's MD code provides a convenient set of routines for adding/excluding physical memory regions and initializing important kernel globals such as Maxmem, realmem, phys_avail[], and dump_avail[]. It is especially convenient for FDT systems, since we can use FDT parsing functions and pass the result directly to one of these physmem routines. This interface is already in use on arm and arm64, and can be used to simplify this early initialization on RISC-V as well. This requires only a couple trivial changes: - Move arm_physmem_kernel_addr to arm/machdep.c. It is unused on arm64, and manipulated entirely in arm MD code. - Convert arm32_btop/arm64_btop to atop. This is equivalently defined on all architectures. - Drop the "arm" prefix. Reviewed by: manu, emaste ("looks reasonable") MFC after: 2 weeks Differential Revision: https://reviews.freebsd.org/D24153 Notes: svn path=/head/; revision=360082
* Add a missing suffix that was causing a whole word to get loaded insteadIan Lepore2020-03-291-1/+1
| | | | | | | | | | | | of the proper 8 or 16 bits when the macro was expanded for those sizes. Fixes a hang in the armv7 kernel. Submitted by: Thomas Skibo Pointy hat: ian@ Notes: svn path=/head/; revision=359423
* Expand generic subword atomic primitivesConrad Meyer2020-03-253-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The goal of this change is to make the atomic_load_acq_{8,16}, atomic_testandset{,_acq}_long, and atomic_testandclear_long primitives available in MI-namespace. The second goal is to get this draft out of my local tree, as anything that requires a full tinderbox is a big burden out of tree. MD specifics can be refined individually afterwards. The generic implementations may not be ideal for your architecture; feel free to implement better versions. If no subword_atomic definitions are needed, the include can be removed from your arch's machine/atomic.h. Generic definitions are guarded by defined macros of the same name. To avoid picking up conflicting generic definitions, some macro defines are added to various MD machine/atomic.h to register an existing implementation. Include _atomic_subword.h in arm and arm64 machine/atomic.h. For some odd reason, KCSAN only generates some versions of primitives. Generate the _acq variants of atomic_load.*_8, atomic_load.*_16, and atomic_testandset.*_long. There are other questionably disabled primitives, but I didn't run into them, so I left them alone. KCSAN is only built for amd64 in tinderbox for now. Add atomic_subword implementations of atomic_load_acq_{8,16} implemented using masking and atomic_load_acq_32. Add generic atomic_subword implementations of atomic_testandset_long(), atomic_testandclear_long(), and atomic_testandset_acq_long(), using atomic_fcmpset_long() and atomic_fcmpset_acq_long(). On x86, add atomic_testandset_acq_long as an alias for atomic_testandset_long. Reviewed by: kevans, rlibby (previous versions both) Differential Revision: https://reviews.freebsd.org/D22963 Notes: svn path=/head/; revision=359311
* arm: Fix atomic long APIs to correct 'u_long' signednessConrad Meyer2020-03-231-9/+9
| | | | | | | | | | | | | As defined in atomic(9) and implemented on other architectures, the atomic(9) functions all act on unsigned pointers and types. Prior to this revision, arm implemented some atomic(9) 'long' sized routines with correct unsigned type, but others were incorrectly signed. Reviewed by: tinderbox Sponsored by: Dell EMC Isilon Notes: svn path=/head/; revision=359264
* Implement atomic_testandclear_{32,int,long} for 32-bit arm. Also, replaceIan Lepore2020-02-101-14/+66
| | | | | | | | the existing implementation of atomic_testandset with the same new algorithm, which uses fewer instructions and fewer registers. Notes: svn path=/head/; revision=357709
* Define MAXCPU consistently between the kernel and KLDs.Mark Johnston2020-02-051-2/+2
| | | | | | | | | | | | | | | | This reverts r177661. The change is no longer very useful since out-of-tree KLDs will be built to target SMP kernels anyway. Moveover it breaks the KBI in !SMP builds since cpuset_t's layout depends on the value of MAXCPU, and several kernel interfaces, notably smp_rendezvous_cpus(), take a cpuset_t as a parameter. PR: 243711 Reviewed by: jhb, kib Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D23512 Notes: svn path=/head/; revision=357585
* Remove old boardid/mach-types support.Warner Losh2020-02-021-64/+0
| | | | | | | | This has been long obsolete in linux and now that all armv4/5 support is gone, it can be retired too. Notes: svn path=/head/; revision=357397
* Rewrite arm kernel stack unwind code to work when unwinding through modules.Ian Lepore2019-12-151-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | The arm kernel stack unwinder has apparently never been able to unwind when the path of execution leads through a kernel module. There was code that tried to handle modules by looking for the unwind data in them, but it did so by trying to find symbols which have never existed in arm kernel modules. That caused the unwind code to panic, and because part of panic handling calls into the unwind code, that just created a recursion loop. Locating the unwind data in a loaded module requires accessing the Elf section headers to find the SHT_ARM_EXIDX section. For preloaded modules those headers are present in a metadata blob. For dynamically loaded modules, the headers are present only while the loading is in progress; the memory is freed once the module is ready to use. For that reason, there is new code in kern/link_elf.c, wrapped in #ifdef __arm__, to extract the unwind info while the headers are loaded. The values are saved into new fields in the linker_file structure which are also conditional on __arm__. In arm/unwind.c there is new code to locally cache the per-module info needed to find the unwind tables. The local cache is crafted for lockless read access, because the unwind code often needs to run in context where sleeping is not allowed. A large comment block describes the local cache list, so I won't repeat it all here. Notes: svn path=/head/; revision=355780
* Introduce vm_page_astate.Mark Johnston2019-12-101-1/+1
| | | | | | | | | | | | | | | | | This is a 32-bit structure embedded in each vm_page, consisting mostly of page queue state. The use of a structure makes it easy to store a snapshot of a page's queue state in a stack variable and use cmpset loops to update that state without requiring the page lock. This change merely adds the structure and updates references to atomic state fields. No functional change intended. Reviewed by: alc, jeff, kib Sponsored by: Netflix, Intel Differential Revision: https://reviews.freebsd.org/D22650 Notes: svn path=/head/; revision=355586
* Declare the global kernel symbols created by ldscript.arm in arm's machdep.h,Ian Lepore2019-12-061-0/+20
| | | | | | | | | | | and remove a couple scattered local declarations. Most of these aren't referenced in C code (there are some references in asm code), and they also aren't documented anywhere. This helps a bit with the latter. Notes: svn path=/head/; revision=355439
* Regularize my copyright noticeWarner Losh2019-12-043-3/+3
| | | | | | | | | | | | o Remove All Rights Reserved from my notices o imp@FreeBSD.org everywhere o regularize punctiation, eliminate date ranges o Make sure that it's clear that I don't claim All Rights reserved by listing All Rights Reserved on same line as other copyright holders (but not me). Other such holders are also listed last where it's clear. Notes: svn path=/head/; revision=355394
* Remove two obsolete comments that reference splhigh/splx.Warner Losh2019-11-211-6/+0
| | | | Notes: svn path=/head/; revision=354972
* Port r353622 to sparc64 and arm v4.Konstantin Belousov2019-10-161-0/+2
| | | | | | | | | | Noted by: alc Reviewed by: alc, jeff, markj Sponsored by: The FreeBSD Foundation Differential revision: https://reviews.freebsd.org/D22056 Notes: svn path=/head/; revision=353664
* align use of cp15_pmccntr_get with its availabilityAndriy Gapon2019-10-071-1/+1
| | | | | | | | | | | | | According to ian, the only armv6 cpu we support is the 1176, so this change is effectively a no-op. The change is just to make the code more self-consistent. The issue was noticed by a standalone module build for armv6. Reviewed by: ian MFC after: 3 weeks Notes: svn path=/head/; revision=353165
* Add 8 and 16 bit versions of atomic_cmpset and atomic_fcmpset for arm.Ian Lepore2019-10-012-100/+335
| | | | | | | | | | | | | | | | | | | | This adds 8 and 16 bit versions of the cmpset and fcmpset functions. Macros are used to generate all the flavors from the same set of instructions; the macro expansion handles the couple minor differences between each size variation (generating ldrexb/ldrexh/ldrex for 8/16/32, etc). In addition to handling new sizes, the instruction sequences used for cmpset and fcmpset are rewritten to be a bit shorter/faster, and the new sequence will not return false when *dst==*old but the store-exclusive fails because of concurrent writers. Instead, it just loops like ldrex/strex sequences normally do until it gets a non-conflicted store. The manpage allows LL/SC architectures to bogusly return false, but there's no reason to actually do so, at least on arm. Reviewed by: cognet Notes: svn path=/head/; revision=352938
* Centralize __pcpu definitions.Konstantin Belousov2019-08-292-2/+52
| | | | | | | | | | | | | | | | | | | | | | | | | Many extern struct pcpu <something>__pcpu declarations were copied/pasted in sources. The issue is that the definition is MD, but it cannot be provided by machine/pcpu.h due to actual struct pcpu defined in sys/pcpu.h later than the inclusion of machine/pcpu.h. This forced the copying when other code needed direct access to __pcpu. There is no way around it, due to machine/pcpu.h supplying part of struct pcpu fields. To work around the problem, add a new machine/pcpu_aux.h header, which should fill any needed MD definitions after struct pcpu definition is completed. This allows to remove copies of __pcpu spread around the source. Also on x86 it makes it possible to remove work arounds like OFFSETOF_CURTHREAD or clang specific warnings supressions. Reported and tested by: lwhsu, bcran Reviewed by: imp, markj (previous version) Discussed with: jhb Sponsored by: The FreeBSD Foundation Differential revision: https://reviews.freebsd.org/D21418 Notes: svn path=/head/; revision=351594
* Move phys_avail definition into MI code. It is consumed in the MI layer andJeff Roberson2019-08-161-3/+0
| | | | | | | | | | | doing so adds more flexibility with less redundant code. Reviewed by: jhb, markj, kib Sponsored by: Netflix Differential Revision: https://reviews.freebsd.org/D21250 Notes: svn path=/head/; revision=351108
* De-pollute arm's sysarch.h.Ian Lepore2019-07-101-9/+7
| | | | | | | | | | | | | | | | | Instead of including stdint.h for uintptr_t, include sys/_types.h and use __types for everything that isn't a native C keyword type. Remove the #include of cdefs.h. It appears after the include of armreg.h which has a precondition of cdefs.h being included before it, so everyone including sysarch.h is already including cdefs.h. (When armv5 support goes away, there will be no need include armreg.h here either.) Unfortunately, the unprefixed struct member names "addr" and "len" cannot be changed, because 3rd-party software is relying on them (libcompiler_rt is one known consumer). Notes: svn path=/head/; revision=349887
* Implement the ffs and fls functions, and their longer counterparts, inDoug Moore2019-05-281-0/+58
| | | | | | | | | | | | | | cpufunc, in terms of __builtin_ffs and the like, for arm32 v6 and v7 architectures, and use those, rather than the simple libkern implementations, in building arm32 kernels. Reviewed by: manu Approved by: kib, markj (mentors) Tested by: iz-rpi03_hs-karlsruhe.de, mikael.urankar_gmail.com, ian Differential Revision: https://reviews.freebsd.org/D20412 Notes: svn path=/head/; revision=348327
* Use named field's initializer when constructing <foo>_platform structure.Michal Meloun2019-03-191-9/+9
| | | | | | | | | | | | | In current code, the delay argument in FDT_PLATFORM_DEF(2) improperly initialize refs field from kobj_class structure instead of delay_count field. This causes not working DELAY() function (due to never initialized delay_count) in earlier boot stages, until the first timer was attached. MFC after: 2 weeks Notes: svn path=/head/; revision=345296
* amd64 KPTI: add control from procctl(2).Konstantin Belousov2019-03-161-0/+4
| | | | | | | | | | | | | | | | | Add the infrastructure to allow MD procctl(2) commands, and use it to introduce amd64 PTI control and reporting. PTI mode cannot be modified for existing pmap, the knob controls PTI of the new vmspace created on exec. Requested by: jhb Reviewed by: jhb, markj (previous version) Tested by: pho Sponsored by: The FreeBSD Foundation MFC after: 1 week Differential revision: https://reviews.freebsd.org/D19514 Notes: svn path=/head/; revision=345228
* Add kernel support for Intel userspace protection keys feature onKonstantin Belousov2019-02-201-0/+7
| | | | | | | | | | | | | | | | Skylake Xeons. See SDM rev. 68 Vol 3 4.6.2 Protection Keys and the description of the RDPKRU and WRPKRU instructions. Reviewed by: markj Tested by: pho Sponsored by: The FreeBSD Foundation MFC after: 2 weeks Differential revision: https://reviews.freebsd.org/D18893 Notes: svn path=/head/; revision=344353
* Implement atomic_swap_xxx() for all platforms.Hans Petter Selasky2018-12-101-0/+7
| | | | | | | | | | Differential Revision: https://reviews.freebsd.org/D18450 Reviewed by: kib@ MFC after: 3 days Sponsored by: Mellanox Technologies Notes: svn path=/head/; revision=341787
* Fix cut&paste typo in atomic_fetchadd_64().Michal Meloun2018-12-071-1/+1
| | | | | | | | Reported by: Jia-Shiun Li <jiashiun@gmail.com> MFC after: 1 week Notes: svn path=/head/; revision=341679
* Add a KPI for the delay while spinning on a spin lock.John Baldwin2018-11-051-0/+1
| | | | | | | | | | | | | Replace a call to DELAY(1) with a new cpu_lock_delay() KPI. Currently cpu_lock_delay() is defined to DELAY(1) on all platforms. However, platforms with a DELAY() implementation that uses spin locks should implement a custom cpu_lock_delay() doesn't use locks. Reviewed by: kib MFC after: 3 days Notes: svn path=/head/; revision=340164
* Move the fixed base for PIE loading on arm.Konstantin Belousov2018-11-041-1/+1
| | | | | | | | | | | | Existing base causes conflicts for direct execution of ld-elf.so.1 because default linking base for non-PIE binaries is 0x10000. Reported and tested by: Mark Millard <marklmi26-fbsd@yahoo.com> Sponsored by: The FreeBSD Foundation MFC after: 1 week Notes: svn path=/head/; revision=340136
* Consolidate identical ELF auxargs type defintions.Brooks Davis2018-10-221-32/+0
| | | | | | | | | | | | | | | All platforms except powerpc use the same values and powerpc shares a majority of them. Go ahead and declare AT_NOTELF, AT_UID, and AT_EUID in favor of the unused AT_DCACHEBSIZE, AT_ICACHEBSIZE, and AT_UCACHEBSIZE for powerpc. Reviewed by: jhb, imp Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D17397 Notes: svn path=/head/; revision=339625
* Remove the L1 and L2 xscale page defines and rename the generic macros toAndrew Turner2018-08-161-64/+9
| | | | | | | | | | the common name. While here move the macros to check these into pmap-v4.c as they're only used there. Sponsored by: DARPA, AFRL Notes: svn path=/head/; revision=337903
* Remove pmap_kenter_section from the arm pmap. It's unused.Andrew Turner2018-08-151-1/+0
| | | | | | | Sponsored by: DARPA, AFRL Notes: svn path=/head/; revision=337853
* Remove ARM_HAVE_SUPERSECTIONS. It was only supported on some XScale CPUs.Andrew Turner2018-08-151-8/+0
| | | | | | | Sponsored by: DARPA, AFRL Notes: svn path=/head/; revision=337851
* Make code and data only used within the arm pmap code as static.Andrew Turner2018-08-151-21/+0
| | | | | | | Sponsored by: DARPA, AFRL Notes: svn path=/head/; revision=337850
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