| Commit message (Collapse) | Author | Age | Files | Lines |
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Add drm support for Intel Pineview chips.
Notes:
svn path=/stable/8/; revision=206166
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Some general cleanup of scatter/gather memory allocation
- We don't need to check malloc return values with M_WAITOK
- remove variables that we don't really need
- cleanup the error paths by just calling drm_sg_cleanup()
- fix drm_sg_cleanup() to be safe to call at any time
Notes:
svn path=/stable/8/; revision=200475
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Check pointer for NULL before dereferencing it, not after.
Originally committed by: brueffer
Notes:
svn path=/stable/8/; revision=200474
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Cleanup in r600_blit
- Don't bother to assign vb until we know we have enough space
- Add variables for sx2, sy2, dx2, dy2 so that these aren't
calculated over and over, also reduce chance of errors.
- Use switch to assign color/format
Notes:
svn path=/stable/8/; revision=198797
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A bit of cleanup work on radeon_freelist_get()
* Fix the main loop to search all buffers before sleeping.
* Remove dead code
Notes:
svn path=/stable/8/; revision=198795
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Use system specified memory barriers rather than rolling our own.
Notes:
svn path=/stable/8/; revision=198794
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Fix blitter support for RS880 chips
Notes:
svn path=/stable/8/; revision=198792
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Add support for Intel G41 chipset
Notes:
svn path=/stable/8/; revision=198687
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Sync radeon drm support
This adds kernel support for r6/7xx 3D.
Notes:
svn path=/stable/8/; revision=198685
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Add a read only sysctl tracking the hw.drm.msi tunable.
Notes:
svn path=/stable/8/; revision=198682
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Clean up the handling of device minors
Notes:
svn path=/stable/8/; revision=198681
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Clean up the locking in drm_alloc_resource()
Notes:
svn path=/stable/8/; revision=198679
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Approved by: re (kib)
Notes:
svn path=/stable/8/; revision=196405
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Add support for radeon RS880 IGP chips to drm.
Approved by: re (kib)
Notes:
svn path=/stable/8/; revision=196144
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Add some additional radeon pci ids to drm.
Approved by: re (kib)
Notes:
svn path=/stable/8/; revision=196143
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The newbus lock is responsible for protecting newbus internIal structures,
device states and devclass flags. It is necessary to hold it when all
such datas are accessed. For the other operations, softc locking should
ensure enough protection to avoid races.
Newbus lock is automatically held when virtual operations on the device
and bus are invoked when loading the driver or when the suspend/resume
take place. For other 'spourious' operations trying to access/modify
the newbus topology, newbus lock needs to be automatically acquired and
dropped.
For the moment Giant is also acquired in some key point (modules subsystem)
in order to avoid problems before the 8.0 release as module handlers could
make assumptions about it. This Giant locking should go just after
the release happens.
Please keep in mind that the public interface can be expanded in order
to provide more support, if there are really necessities at some point
and also some bugs could arise as long as the patch needs a bit of
further testing.
Bump __FreeBSD_version in order to reflect the newbus lock introduction.
Reviewed by: ed, hps, jhb, imp, mav, scottl
No answer by: ariff, thompsa, yongari
Tested by: pho,
G. Trematerra <giovanni dot trematerra at gmail dot com>,
Brandon Gooch <jamesbrandongooch at gmail dot com>
Sponsored by: Yahoo! Incorporated
Approved by: re (ksmith)
Notes:
svn path=/head/; revision=196037
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Approved by: re@ (kib)
MFC after: 3 days
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svn path=/head/; revision=195501
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MFC after: 3 days
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svn path=/head/; revision=194996
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The Intel 2d driver calls modeset before reinstalling the handler on
a vt switch. This means that vblank status ends up getting cleared
after it has been setup. Restore saved values for the pipestat registers
rather than just wiping them out.
MFC after: 3 days
Notes:
svn path=/head/; revision=194986
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Small cleanup of the error paths while I'm here.
MFC after: 3 days
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svn path=/head/; revision=194969
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are enabled. This should help to reduce cases where the hardware
counter reference jumps by large amounts.
MFC after: 3 days
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svn path=/head/; revision=194966
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MFC after: 3 days
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svn path=/head/; revision=194965
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Use the vbl_lock when maniputlating the refcount. Eventually I want to
convert this to use our internal refcount code. Continue to use atomic
ops for manipulating vblank count since we access it often just for
reading.
MFC after: 3 days
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svn path=/head/; revision=194963
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MFC after: 3 days
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svn path=/head/; revision=194960
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MFC after: 3 days
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svn path=/head/; revision=194759
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MFC after: 3 days
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svn path=/head/; revision=194749
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been any consumers and likely will never be. Furthermore, we have
never enabled the code for it, so just get rid of it.
MFC after: 3 days
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svn path=/head/; revision=194748
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seems rather excessive.
MFC after: 3 days
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svn path=/head/; revision=194746
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represents the software counter. Don't currupt things here.
MFC after: 3 days
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svn path=/head/; revision=194745
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MFC after: 3 days
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svn path=/head/; revision=194741
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Intel agrees with my reading of the docs, make it so for all G4X chips.
The new register also has a 32 bit width as opposed to 24 bits. Fix
things up so that the counters roll over properly.
MFC after: 3 days
Notes:
svn path=/head/; revision=194540
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If an error does occur we would have left max_context with an incorrect
value.
MFC after: 3 days
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svn path=/head/; revision=194539
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MFC after: 3 days
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svn path=/head/; revision=194537
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This causes sis and probably a couple of other driver to panic and fail.
Tested by: cpghost <cpghost@cordula.ws>
PR: 133554
MFC after: 3 days
Notes:
svn path=/head/; revision=191274
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Submitted by: Maciej Cencora <m.cencora@gmail.com>
MFC after: 3 days
Notes:
svn path=/head/; revision=190833
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Submitted by: Maciej Cencora <m.cencora@gmail.com>
MFC after: 3 days
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svn path=/head/; revision=190831
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MFC after: 3 days
Notes:
svn path=/head/; revision=190675
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there is no reason to mess with the chip.
MFC after: 3 days
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svn path=/head/; revision=190674
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Submitted by: Christoph Mallon
MFC after: 3 days
Notes:
svn path=/head/; revision=190595
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un-cached. This got lost somewhere with all the bus_dma fixups.
MFC after: 3 days
Notes:
svn path=/head/; revision=190565
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MFC after: 3 days
Notes:
svn path=/head/; revision=190563
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I made on the last patch, it seems to upset suspend/resume and shutdown.
MFC after: 3 days
Notes:
svn path=/head/; revision=190433
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When a vt switch occurs the irq handler is uninstalled. Interrupts
and the state tracking of what was enabled/disabled wasn't working
properly. This should resolve the reports of "slow windows" after a
vt switch, among other things. The radeon 2d driver seems to work a
bit more correctly than the Intel driver. With the Intel driver,
vblank interrupts will be enabled at system startup and will only
be disabled after an additional modeset (vt switch, dpms, randr event).
With this patch, I am able to run glxgears synced to vblank and
vt switch while it is running without ill effects.
MFC after: 3 days
Notes:
svn path=/head/; revision=190401
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Make sure that we always handle it the same way.
MFC after: 3 days
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svn path=/head/; revision=190400
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memory. Track them in the appropriate structure.
MFC after: 3 days
Notes:
svn path=/head/; revision=190399
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the BUS_DMA_NOCACHE flags as being a valid flag for load instead of alloc.
Discussed with: kib
MFC after: 3 days
Notes:
svn path=/head/; revision=190282
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Found with: Coverity Prevent(tm)
CID: 2259
MFC after: 3 days
Notes:
svn path=/head/; revision=190170
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MFC after: 3 days
Notes:
svn path=/head/; revision=190166
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Found with: Coverity Prevent(tm)
CID: 2454
Notes:
svn path=/head/; revision=190164
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Found with: Coverity Prevent(tm)
CID: 2940
MFC after: 3 days
Notes:
svn path=/head/; revision=190163
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