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* MFC r216374: fix atomic_set_xxx misuse in drmAndriy Gapon2011-03-111-1/+1
| | | | Notes: svn path=/stable/7/; revision=219516
* MFC r218909:Rebecca Cran2011-02-242-2/+2
| | | | | | | | | | Fix typos - remove duplicate "the". PR: bin/154928 Submitted by: Eitan Adler <lists at eitanadler.com> Notes: svn path=/stable/7/; revision=218993
* MFC r198694,r198697Robert Noland2009-12-131-45/+26
| | | | | | | | | | | | Some general cleanup of scatter/gather memory allocation - We don't need to check malloc return values with M_WAITOK - remove variables that we don't really need - cleanup the error paths by just calling drm_sg_cleanup() - fix drm_sg_cleanup() to be safe to call at any time Notes: svn path=/stable/7/; revision=200477
* MFC 198332Robert Noland2009-12-131-1/+2
| | | | | | | | | Check pointer for NULL before dereferencing it, not after. Originally committed by: brueffer Notes: svn path=/stable/7/; revision=200476
* MFC 198696Robert Noland2009-11-021-29/+39
| | | | | | | | | | | | Cleanup in r600_blit - Don't bother to assign vb until we know we have enough space - Add variables for sx2, sy2, dx2, dy2 so that these aren't calculated over and over, also reduce chance of errors. - Use switch to assign color/format Notes: svn path=/stable/7/; revision=198798
* MFC 198695Robert Noland2009-11-021-41/+4
| | | | | | | | | | A bit of cleanup work on radeon_freelist_get() * Fix the main loop to search all buffers before sleeping. * Remove dead code Notes: svn path=/stable/7/; revision=198796
* MFC 198691Robert Noland2009-11-021-3/+3
| | | | | | | Fix blitter support for RS880 chips Notes: svn path=/stable/7/; revision=198793
* MFC r197951Robert Noland2009-10-302-1/+4
| | | | | | | Add support for Intel G41 chipset Notes: svn path=/stable/7/; revision=198688
* MFC r196470-196471,197154-197155,197603-197606Robert Noland2009-10-309-23/+3170
| | | | | | | | | Sync radeon drm support This adds kernel support for r6/7xx 3D. Notes: svn path=/stable/7/; revision=198686
* MFC r196466Robert Noland2009-10-302-0/+5
| | | | | | | Add a read only sysctl tracking the hw.drm.msi tunable. Notes: svn path=/stable/7/; revision=198683
* MFC r196464Robert Noland2009-10-301-7/+15
| | | | | | | Clean up the locking in drm_alloc_resource() Notes: svn path=/stable/7/; revision=198680
* Merge r196142Robert Noland2009-08-123-5/+19
| | | | | | | Add support for radeon RS880 IGP chips to drm. Notes: svn path=/stable/7/; revision=196146
* Merge r196141Robert Noland2009-08-121-0/+5
| | | | | | | Add some additional radeon pci ids to drm. Notes: svn path=/stable/7/; revision=196145
* MFC r195501Robert Noland2009-07-273-1/+40
| | | | | | | Add support for Radeon HD 4770 (RV740) chips. Notes: svn path=/stable/7/; revision=195913
* MFC ↵Robert Noland2009-07-2710-134/+113
| | | | | | | | | r194741,194745-194746,194748-194749,194759,194960,194963,194965-194966,194969,194986,194996 This pulls in numerous vblank related fixes from HEAD. Notes: svn path=/stable/7/; revision=195912
* Merge 194540 from HEADRobert Noland2009-06-233-7/+8
| | | | | | | | | | | | The G45 docs indicate that all G4X chips use the new framecount register. Intel agrees with my reading of the docs, make it so for all G4X chips. The new register also has a 32 bit width as opposed to 24 bits. Fix things up so that the counters roll over properly. Notes: svn path=/stable/7/; revision=194737
* Merge 194539 from HEADRobert Noland2009-06-231-25/+14
| | | | | | | | | | realloc() behaves identically to malloc when passed a NULL object pointer If an error does occur we would have left max_context with an incorrect value. Notes: svn path=/stable/7/; revision=194736
* Merge 194537 from HEADRobert Noland2009-06-231-0/+3
| | | | | | | Don't panic if drm_rmmap is called with a NULL map pointer. Notes: svn path=/stable/7/; revision=194735
* Merge 190833 from HEADRobert Noland2009-06-231-2/+5
| | | | | | | check offsets for R300_ZB_ZPASS_ADDR Notes: svn path=/stable/7/; revision=194734
* Merge 190831 from HEADRobert Noland2009-06-234-2/+11
| | | | | | | Add regs required for occlusion queries support Notes: svn path=/stable/7/; revision=194733
* Merge 190675 from HEADRobert Noland2009-06-231-0/+2
| | | | | | | Add support for RV790 (HD 4890) asics Notes: svn path=/stable/7/; revision=194732
* Merge 190674 from HEADRobert Noland2009-06-232-38/+37
| | | | | | | | A little more cleanup from AMD, if we don't have the right microcode there is no reason to mess with the chip. Notes: svn path=/stable/7/; revision=194731
* Merge 190595 from HEADRobert Noland2009-06-232-212/+131
| | | | | | | | | Simplify the radeon microcode loading. Submitted by: Christoph Mallon Notes: svn path=/stable/7/; revision=194730
* Merge 190433 from HEADRobert Noland2009-06-231-5/+8
| | | | | | | | Fix up waiting on vblank again... This reverts a last minute change that I made on the last patch, it seems to upset suspend/resume and shutdown. Notes: svn path=/stable/7/; revision=194729
* Merge 190401 from HEADRobert Noland2009-06-231-22/+31
| | | | | | | | | | | | | | | | | | | | Rework the management of vblank interrupts a bit. When a vt switch occurs the irq handler is uninstalled. Interrupts and the state tracking of what was enabled/disabled wasn't working properly. This should resolve the reports of "slow windows" after a vt switch, among other things. The radeon 2d driver seems to work a bit more correctly than the Intel driver. With the Intel driver, vblank interrupts will be enabled at system startup and will only be disabled after an additional modeset (vt switch, dpms, randr event). With this patch, I am able to run glxgears synced to vblank and vt switch while it is running without ill effects. (Still didn't fix the slow window issues on Intel) Notes: svn path=/stable/7/; revision=194728
* Merge 190400 from HEADRobert Noland2009-06-232-11/+12
| | | | | | | | Intel handled the management of the breadcrumb counter inconsistently. Make sure that we always handle it the same way. Notes: svn path=/stable/7/; revision=194727
* Merge 190170 from HEADRobert Noland2009-06-231-1/+1
| | | | | | | | | | vm_offset_t is unsigned, so compare of >= 0 is not needed. Found with: Coverity Prevent(tm) CID: 2259 Notes: svn path=/stable/7/; revision=194725
* Merge 190166 from HEADRobert Noland2009-06-231-2/+0
| | | | | | | Remove the DRM_ERROR to fix build. It didn't make any sense anyway. Notes: svn path=/stable/7/; revision=194724
* Merge 190164 from HEADRobert Noland2009-06-231-1/+1
| | | | | | | | | | Fix what appears to be a typo, and restore the registers correctly. Found with: Coverity Prevent(tm) CID: 2454 Notes: svn path=/stable/7/; revision=194723
* Merge 190163 from HEADRobert Noland2009-06-231-2/+1
| | | | | | | | | | Don't deref dev->dev_private before checking that it exists. Found with: Coverity Prevent(tm) CID: 2940 Notes: svn path=/stable/7/; revision=194722
* Merge 190125 from HEADRobert Noland2009-06-231-4/+6
| | | | | | | | Only issue the wakeup and store the counter if vblank is enabled on the pipe. Notes: svn path=/stable/7/; revision=194721
* Merge 190023 from HEADRobert Noland2009-06-233-1/+12
| | | | | | | | | Add some debugging so I can see when syscalls are being restarted consistantly. After a lengthy irc discussion it seems like we shouldn't need to worry about them, but it's nice to know about. Notes: svn path=/stable/7/; revision=194720
* Merge 190022 from HEADRobert Noland2009-06-231-19/+36
| | | | | | | | | | | | Rework vblank handling to try to resolve some reports of "slow" windows after vt switch or suspend. I can't really test this on Intel right now but I think I've heard reports of it on radeon as well. I can't break it on the radeon here. (This doesn't actually fix the "slow" window problem.) Notes: svn path=/stable/7/; revision=194719
* Merge 190021 from HEADRobert Noland2009-06-232-82/+110
| | | | | | | | | | Sync up the rest of the code that we use with what Intel is shipping -Some irq/vblank related changes that hopefully will help. -A little more cleanup while I'm here. Notes: svn path=/stable/7/; revision=194718
* Merge r190020 from HEADRobert Noland2009-06-233-15/+69
| | | | | | | Pull in some suspend / resume changes from Intel's code Notes: svn path=/stable/7/; revision=194717
* Merge 191274.Robert Noland2009-04-221-18/+21
| | | | | | | | | | | | Don't try to setup interrupts for drivers that don't support them. This causes sis and probably a couple of other driver to panic and fail. Tested by: cpghost <cpghost@cordula.ws> Approved by: re (kib) Notes: svn path=/stable/7/; revision=191404
* Merge 190565Robert Noland2009-04-021-1/+1
| | | | | | | | | | We don't know what these pages are going to be used for, they should be un-cached. This got lost somewhere with all the bus_dma fixups. Approved by: re (kib) Notes: svn path=/stable/7/; revision=190653
* Merge 190563Robert Noland2009-04-021-4/+4
| | | | | | | | | Load the right microcode for RS780 Approved by: re (kib) Notes: svn path=/stable/7/; revision=190652
* Merge 190399Robert Noland2009-04-023-10/+9
| | | | | | | | | | The GART allocations are a propery of the gart, not of scatter-gather memory. Track them in the appropriate structure. Approved by: re (kib) Notes: svn path=/stable/7/; revision=190649
* Merge 190124Robert Noland2009-04-021-0/+2
| | | | | | | | | Add a couple of radeon pci ids. Approved by: re (kib) Notes: svn path=/stable/7/; revision=190648
* Merge 190123,190282Robert Noland2009-04-022-6/+6
| | | | | | | | | | Fix up the flags to bus_dmamem again. The man page incorrectly showed the BUS_DMA_NOCACHE flags as being a valid flag for load instead of alloc. Approved by: re (kib) Notes: svn path=/stable/7/; revision=190647
* Merge 189915Robert Noland2009-03-201-2/+6
| | | | | | | | | Add support for matching solely on vendor id. We will use this method with nouveau Notes: svn path=/stable/7/; revision=190135
* Merge 189914,189916Robert Noland2009-03-201-1/+7
| | | | | | | | Improve the debugging output of drm_mmap Cast to (unsigned long) to make printf happy on i386 Notes: svn path=/stable/7/; revision=190134
* Merge 189913Robert Noland2009-03-201-0/+4
| | | | | | | | | Add list_for_each_prev to our linux compatibility. We need this for nouveau Notes: svn path=/stable/7/; revision=190133
* Merge 189912Robert Noland2009-03-201-1/+1
| | | | | | | Minor code cleanup Notes: svn path=/stable/7/; revision=190132
* Merge 189911Robert Noland2009-03-201-1/+1
| | | | | | | We can have more than 3 pci resources Notes: svn path=/stable/7/; revision=190131
* Merge 189910Robert Noland2009-03-201-6/+12
| | | | | | | Cast register maps and offsets to vm_offset_t Notes: svn path=/stable/7/; revision=190130
* Merge 189909Robert Noland2009-03-201-2/+2
| | | | | | | Change the logic around to match ati_pcigart. Notes: svn path=/stable/7/; revision=190129
* Merge 189908Robert Noland2009-03-201-1/+1
| | | | | | | | | Use flsl() here rather than ffsl() I discovered that we were computing page_order differently than linux. Notes: svn path=/stable/7/; revision=190128
* Merge 189899Robert Noland2009-03-191-0/+1
| | | | | | | Use the right MSI_REARM for RS600. Notes: svn path=/stable/7/; revision=190018
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