| Commit message (Collapse) | Author | Age | Files | Lines |
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Tested on DragonBoard 410c.
Reviewed by: andrew
Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D13972
Notes:
svn path=/head/; revision=328132
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Found with devel/coccinelle.
Notes:
svn path=/head/; revision=297793
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This is needed with the pl011 driver. Before this change it would default
to a shift of 0, however the hardware places the registers at 4-byte
addresses meaning the value should be 2.
This patch fixes this for the pl011 when configured using the fdt. The
other drivers have a default value of 0 to keep this a no-op.
MFC after: 1 week
Notes:
svn path=/head/; revision=281438
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uart implementations, and export them using the new linker-set mechanism.
Differential Revision: https://reviews.freebsd.org/D1993
Submitted by: Michal Meloun
Notes:
svn path=/head/; revision=279724
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It is working on IFC6410 board which has Qualcomm Snapdragon SoC.
Approved by: stas (mentor)
Notes:
svn path=/head/; revision=272399
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