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path: root/sys/dev/uart/uart_dev_pl011.c
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* uart: clean up empty lines in .c and .h filesMateusz Guzik2020-09-011-2/+0
| | | | Notes: svn path=/head/; revision=365142
* Add quirk for ignoring SPCR AccessWidth values on the PL011 UARTEd Maste2019-04-151-2/+3
| | | | | | | | | | | | | | | | | | The SPCR table on the Lenovo HR330A Ampere eMAG server indicates 8-bit access, but 32-bit access is required for the PL011 to work. PL011 on SBSA platforms always supports 32-bit access (and that was hardcoded here before my EC2 fix), let's use 32-bit access for PL011 and 32BIT interface types. Tested by emaste on Ampere eMAG and Cavium/Marvell ThunderX2. Submitted by: Greg V <greg@unrelenting.technology> Reviewed by: andrew, imp (earlier) Differential Revision: https://reviews.freebsd.org/D19507 Notes: svn path=/head/; revision=346228
* add snps IP uart support / genaralize UARTMatt Macy2018-08-191-3/+3
| | | | | | | | | | | | | | | | This is an amalgam of a patch by Doug Ambrisko to generalize uart_acpi_find_device, imp moving the ACPI table to uart_dev_ns8250.c and advice by jhb to work around a bug in the EPYC 3151 BIOS (the BIOS incorrectly marks the serial ports as disabled) Reviewed by: imp MFC after: 8 weeks Differential Revision: https://reviews.freebsd.org/D16432 Notes: svn path=/head/; revision=338074
* The Arm pl011 driver assumes it's running a devicetree based system.Andrew Turner2018-02-281-9/+31
| | | | | | | | | | | | | | It calls OF_* functions to check if it needs to implement workarounds. This may not be the case on arm64 where we support both FDT and ACPI. Fix this by checking if we are booting on FDT before calling these checks. Reviewed by: ian Sponsored by: DARPA, AFRL Sponsored by: Cavium (Hardware) Differential Revision: https://reviews.freebsd.org/D14515 Notes: svn path=/head/; revision=330111
* Teach the Arm pl011 driver to attach to a SBSA uart. This is defined inAndrew Turner2018-02-251-0/+1
| | | | | | | | | | | the Server Base System Architecture to be a subset of the pl011 r1p5. As we don't use the removed features it is safe to just attach to the existing driver as is. Sponsored by: DARPA, AFRL Notes: svn path=/head/; revision=329991
* Rename the FDT compat_data array to a bus-specific name.Andrew Turner2018-02-251-2/+2
| | | | | | | Sponsored by: DARPA, AFRL Notes: svn path=/head/; revision=329990
* Do pass removing some write-only variables from the kernel.Alexander Kabaev2017-12-251-2/+0
| | | | | | | | | | | | This reduces noise when kernel is compiled by newer GCC versions, such as one used by external toolchain ports. Reviewed by: kib, andrew(sys/arm and sys/arm64), emaste(partial), erj(partial) Reviewed by: jhb (sys/dev/pci/* sys/kern/vfs_aio.c and sys/kern/kern_synch.c) Differential Revision: https://reviews.freebsd.org/D10385 Notes: svn path=/head/; revision=327173
* sys/dev: further adoption of SPDX licensing ID tags.Pedro F. Giffuni2017-11-271-0/+2
| | | | | | | | | | | | | | | Mainly focus on files that use BSD 2-Clause license, however the tool I was using misidentified many licenses so this was mostly a manual - error prone - task. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts. Notes: svn path=/head/; revision=326255
* Extend the pl011 small-fifos fix to other SoCs that indicate rev 5Ian Lepore2017-03-111-13/+27
| | | | | | | | | | | | | | | | | | | | | hardware but lack the larger fifos rev 5 hardware should have. The linux world (where our FDT data comes from) solved this by adding a new property to pl011 nodes, "arm,primecell-periphid". When this property is present, its values override the values in the hardware periphid registers. For pl011 rev 5 hardware with small fifos, they override the id so that it appears to be rev 4 hardware. The driver now uses the new property when present. It also continues to check the device compat string, to handle older fdt data that may still be in use on existing systems (on RPi systems it is common to update system software without updating fdt data which is part of the boot firmware). Reviewed by: imp Notes: svn path=/head/; revision=315090
* Handle fifo size differences between older and newer revs of pl011 hardware.Ian Lepore2017-03-081-10/+39
| | | | | | | | | | | | | | | | | | Starting with rev 5 (which is inexplicably indicated by a version number of '3' in the Peripheral ID register), the pl011 doubled the size of the rx and tx fifos, to 32 bytes, so read the ID register and set the size variables in the softc accordingly. An interesting wrinkle in this otherwise-simple concept is that the bcm2835 SoC, used in Raspberry Pi systems among others, has the rev 5 pl011 hardware, but somehow also has the older 16-byte fifos. We check the FDT data to see if the hardware is part of a bcm283x system and use the smaller size if so. Thanks to jchandra@ for pointing out that newer hardware has bigger fifos. Notes: svn path=/head/; revision=314917
* Reconfigure the fifo watermark levels on the pl011 uart to interrupt whenIan Lepore2017-03-041-2/+27
| | | | | | | the fifos are 3/4 full (rc) or empty (tx). Notes: svn path=/head/; revision=314682
* Fix bugs exposed by the recent enabling of FIFOs in the pl011 uart. TheseIan Lepore2017-03-041-4/+5
| | | | | | | | | | | | | | | | | | | | | have been in the code all along, but were masked by having a fifo depth of one byte at the hardware level, so everything kinda worked by accident. The hardware interrupts when the TX fifo is half empty, so set sc->sc_txfifosz to 8 bytes (half the hardware fifo size) to match. This eliminates dropped characters on output. Restructure the read loop to consume all the bytes in the fifo by using the "rx fifo empty" bit of the flags register rather than the "rx ready" bit of the interrupt status register. The rx-ready interrupt is cleared when the number of bytes in the fifo fall below the interrupt trigger level, leaving the fifo half full every time receive routine was called. Now it loops until the fifo is completely empty every time (including when the function is called due to a receive timeout as well as for fifo-full). Notes: svn path=/head/; revision=314681
* Enable pl011 UART FIFOsJayachandran C.2017-02-261-16/+8
| | | | | | | | | | | | The pl011 UART has a 16 entry Tx FIFO and a 16 entry Rx FIFO that have not been used so far. Update the driver to enable the FIFOs and use them in transmit and receive. Reviewed by: andrew Differential Revision: https://reviews.freebsd.org/D8819 Notes: svn path=/head/; revision=314318
* Fix whitespace issues in pl011 uart driverJayachandran C.2016-12-191-7/+7
| | | | | | | | Fix up trailing whitespace introduced by r310190. While there, fix a couple of earlier whitespace errors as well. Notes: svn path=/head/; revision=310289
* Simplify interrupt mask programming in pl011 uartJayachandran C.2016-12-171-22/+23
| | | | | | | | | | | | Remove unused fields from uart_pl011_softc. Add an interrupt mask field to the softc and use it to set the interrupt mask register. There should be no functional change introduced here except in the grab and ungrab functions. In these functions, we now disable and enable all interrupts rather than just the receive interrupt. Notes: svn path=/head/; revision=310190
* Fix interrupt clear in pl011 uart receive functionJayachandran C.2016-11-291-2/+2
| | | | | | | | | | | | | Clear the interrupt state before reading the input char from the input FIFO. In the current code there is a window between the read to the data register and the write to the the ICR, during which an input char will not cause an interrupt. This fixes the issue by which the serial port input on QEMU freezes when using the emulated pl011 serial port. Notes: svn path=/head/; revision=309276
* Include the missing accommon.h from the ACPI uart code.Andrew Turner2016-11-211-0/+1
| | | | | | | | Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation Notes: svn path=/head/; revision=308939
* Add support to find the arm64 serial using the ACPI tables. This uses theAndrew Turner2016-11-211-5/+8
| | | | | | | | | | Serial Port Console Redirection Table to find the device to use. Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation Notes: svn path=/head/; revision=308938
* Add support for arm64 to uart_dev_acpi by using the _HID property to findAndrew Turner2016-07-211-0/+19
| | | | | | | | | | | | the uart class to use in a similar way as the fdt driver. Obtained from: ABT Systems Ltd MFC after: 1 month Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D7248 Notes: svn path=/head/; revision=303133
* Add support for the uart classes to set their default register shift value.Andrew Turner2015-04-111-1/+2
| | | | | | | | | | | | | | This is needed with the pl011 driver. Before this change it would default to a shift of 0, however the hardware places the registers at 4-byte addresses meaning the value should be 2. This patch fixes this for the pl011 when configured using the fdt. The other drivers have a default value of 0 to keep this a no-op. MFC after: 1 week Notes: svn path=/head/; revision=281438
* Move the uart_class definitions and fdt compat data into the individualIan Lepore2015-03-071-1/+8
| | | | | | | | | | uart implementations, and export them using the new linker-set mechanism. Differential Revision: https://reviews.freebsd.org/D1993 Submitted by: Michal Meloun Notes: svn path=/head/; revision=279724
* Fix the pl011 driver to work when the uart will write in zero cycles. ThisAndrew Turner2015-03-031-5/+13
| | | | | | | | | | | | is the case, depending on the options, in some of the ARM hardware simulators. In these cases we don't get an interrupt so will need to schedule the task to write more data to the uart. MFC after: 1 week Sponsored by: The FreeBSD Foundation Notes: svn path=/head/; revision=279561
* Enable 'receive timeout' interrupt allowing us to notRuslan Bukin2015-02-241-10/+25
| | | | | | | | | | | loose 'rx buffer full' event. This fixes operation on ARMv8 Foundation Model. Sponsored by: DARPA, AFRL Notes: svn path=/head/; revision=279239
* Make PL011 UART to wait on putc only when TX FIFO is fullZbigniew Bodek2014-11-121-1/+3
| | | | | | | | | | | | | | | Instead of waiting for empty TX FIFO it is more reasonable to block on full FIFO. As soon as FIFO slot is free the character can be transmitted. In case of TX FIFO disabled, TXFF bit indicates that transmit register is not empty. Obtained from: Semihalf Reviewed by: andrew, emaste Sponsored by: The FreeBSD Foundation Notes: svn path=/head/; revision=274451
* Introduce grab and ungrab upcalls. When the kernel desires to grab theWarner Losh2014-01-191-0/+29
| | | | | | | | | | | | | | | console, it calls the grab functions. These functions should turn off the RX interrupts, and any others that interfere. This makes mountroot prompt work again. If there's more generalized need other than prompting, many of these routines should be expanded to do those new things. Should have been part of r260889, but waasn't due to command line typo. Reviewed by: bde (with reservations) Notes: svn path=/head/; revision=260890
* Calculate the baud rate divisor rather than using a hard-coded value.Ian Lepore2013-10-201-5/+5
| | | | | | | Submitted by: Steven Lawrance <stl@koffein.net> Notes: svn path=/head/; revision=256815
* Fix low-level uart drivers that set their fifo sizes in the softc too late.Ian Lepore2013-04-011-3/+3
| | | | | | | | | | | | uart(4) allocates send and receiver buffers in attach() before it calls the low-level driver's attach routine. Many low-level drivers set the fifo sizes in their attach routine, which is too late. Other drivers set them in the probe() routine, so that they're available when uart(4) allocates buffers. This fixes the ones that were setting the values too late by moving the code to probe(). Notes: svn path=/head/; revision=248965
* Separate interrupts enable/disable logic from setting port parameters.Oleksandr Tymoshenko2012-10-301-6/+13
| | | | | | | | Otherwise setting baud rate in TTY mode effectively disables TX/RX interrupts and renders port unusable. Notes: svn path=/head/; revision=242333
* Add PrimeCell UART (PL011) driverOleksandr Tymoshenko2012-08-301-0/+436
Obtained from: Semihalf Notes: svn path=/head/; revision=239919
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