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* Enable vmspace sharing on SMP. Major changes are,Luoqi Chen1999-04-281-113/+54
| | | | | | | | | | | | | | | | | | | | - %fs register is added to trapframe and saved/restored upon kernel entry/exit. - Per-cpu pages are no longer mapped at the same virtual address. - Each cpu now has a separate gdt selector table. A new segment selector is added to point to per-cpu pages, per-cpu global variables are now accessed through this new selector (%fs). The selectors in gdt table are rearranged for cache line optimization. - fask_vfork is now on as default for both UP and SMP. - Some aio code cleanup. Reviewed by: Alan Cox <alc@cs.rice.edu> John Dyson <dyson@iquest.net> Julian Elischer <julian@whistel.com> Bruce Evans <bde@zeta.org.au> David Greenman <dg@root.com> Notes: svn path=/head/; revision=46129
* Backout early start of APs since it caused some machines to hang.Tor Egge1999-04-131-4/+1
| | | | Notes: svn path=/head/; revision=45643
* Add prototype for wait_ap().Tor Egge1999-04-111-1/+4
| | | | Notes: svn path=/head/; revision=45566
* Let BSP wait until all APs are initialized.Tor Egge1999-04-101-1/+4
| | | | Notes: svn path=/head/; revision=45562
* Disable the mtrr copy calls, it doesn't work with the i686_mem.c stuff.Peter Wemm1999-04-071-1/+7
| | | | | | | This should make it compile/link again. Notes: svn path=/head/; revision=45436
* The magic "no-cpu" cpu number is 0xff. Don't misrepresent cpuBruce Evans1999-03-051-3/+3
| | | | | | | | | numbers as chars or use bogus casts in an attempt to unmisrepresnt them. In top, don't assume that 0xff is the only negative cpu number when cpu numbers are (mis)represented. Notes: svn path=/head/; revision=44487
* Don't call assign_apic_irq with a value for irq that is out of range.Tor Egge1999-02-261-2/+2
| | | | Notes: svn path=/head/; revision=44289
* Introduce machine-dependent macro pgtok() to convert page count to numberLuoqi Chen1999-02-191-5/+5
| | | | | | | | of kilobytes. Its definition for each architecture could be optimized to avoid potential numerical overflows. Notes: svn path=/head/; revision=44157
* Hide access to vmspace:vm_pmap with inline function vmspace_pmap(). ThisLuoqi Chen1999-02-191-3/+2
| | | | | | | | | | is the preparation step for moving pmap storage out of vmspace proper. Reviewed by: Alan Cox <alc@cs.rice.edu> Matthew Dillion <dillon@apollo.backplane.com> Notes: svn path=/head/; revision=44146
* Fix warnings in preparation for adding -Wall -Wcast-qual to theMatthew Dillon1999-01-281-2/+2
| | | | | | | kernel compile Notes: svn path=/head/; revision=43314
* Make more messages conditional on bootverboseJordan K. Hubbard1999-01-201-3/+5
| | | | Notes: svn path=/head/; revision=42880
* Silence warnings.Eivind Eklund1999-01-121-3/+3
| | | | Notes: svn path=/head/; revision=42543
* The "easy" fixes for compiling the kernel -Wunused: remove unreferenced staticArchie Cobbs1998-12-071-2/+1
| | | | | | | and local variables, goto labels, and functions declared but not defined. Notes: svn path=/head/; revision=41591
* Attempt to handle interrupts delivered to all IO APICs by using the firstTor Egge1998-11-261-2/+17
| | | | | | | IO APIC with a sufficient number of pins. Notes: svn path=/head/; revision=41367
* Staticize.Eivind Eklund1998-11-261-3/+3
| | | | Notes: svn path=/head/; revision=41362
* mp_machdep.c: Set a vector to boot code (PC-98).KATO Takenori1998-10-101-4/+4
| | | | | | | locore.s: Tell the bios to warmboot next time (PC-98). Notes: svn path=/head/; revision=40179
* PC-98 doesn't have CMOS ram.KATO Takenori1998-10-101-2/+8
| | | | Notes: svn path=/head/; revision=40169
* BIOS ROM base address is 0xe8000 on PC-98.KATO Takenori1998-10-081-1/+6
| | | | Notes: svn path=/head/; revision=40067
* Maintain a mapping from irq number to (ioapic number, int pin) tuple,Tor Egge1998-09-061-14/+115
| | | | | | | | | | | | | | | and use this when masking/unmasking interrupts. Maintain a mapping from (iopaic number, int pin) tuple to irq number, and use this when configuring devices and programming the ioapics. Previous code assumed that irq number was equal to int pin number, and that the ioapic number was 0. Don't let an AP enter _cpu_switch before all local apics are initialized. Notes: svn path=/head/; revision=38888
* Fixed printf format errors. Only one left in LINT on i386's.Bruce Evans1998-08-241-2/+2
| | | | Notes: svn path=/head/; revision=38505
* Presently there is only one `currentldt' variable for all cpusMike Smith1998-08-181-1/+5
| | | | | | | | | | | | | | | in a SMP system. Unexpected things could happen if each cpu has a different ldt setting and one cpu tries to use value of currentldt set by another cpu. The fix is to move currentldt to the per-cpu area. It includes patches I filed in PR i386/6219 which are also user ldt related. PR: i386/7591, i386/6219 Submitted by: Luoqi Chen <luoqi@watermarkgroup.com> Notes: svn path=/head/; revision=38422
* pmap.c:Bruce Evans1998-08-161-4/+4
| | | | | | | | | | | | | | | | | | | | Cast pointers to (vm_offset_t) instead of to (u_long) (as before) or to (uintptr_t)(void *) (as would be more correct). Don't cast vm_offset_t's to (u_long) just to do arithmetic on them. mp_machdep.c: Cast pointers to (uintptr_t) instead of to (u_long). Don't forget to cast pointers to (void *) first or to recover from integral possible integral promotions, although this is too much work for machine-dependent code. vm code generally avoids warnings for pointer vs long size mismatches by using vm_offset_t to represent pointers; pmap.c often uses plain `unsigned int' instead of vm_offset_t and didn't use u_long elsewhere, but this style was messed up by code apparently imported from mp_machdep.c. Notes: svn path=/head/; revision=38349
* Add forwarding of roundrobin to other cpus. This gives a more regularTor Egge1998-05-171-10/+48
| | | | | | | | | | | | | | update of cpu usage as shown by top when one process is cpu bound (no system calls) while the system is otherwise idle (except for top). Don't attempt to switch to the BSP in boot(). If the system was idle when an interrupt caused a panic, this won't work. Instead, switch to the BSP in cpu_reset. Remove some spurious forward_statclock/forward_hardclock warnings. Notes: svn path=/head/; revision=36135
* For SMP, use prv_PPAGE1/prv_PMAP1 instead of PADDR1/PMAP1.Tor Egge1998-05-171-1/+3
| | | | | | | | get_ptbase and pmap_pte_quick no longer generates IPIs. This should reduce the number of IPIs during heavy paging. Notes: svn path=/head/; revision=36125
* Attempt to set write combining mode for graphics devices.John Dyson1998-05-111-59/+5
| | | | Notes: svn path=/head/; revision=35932
* Use real types for the SMP pages being allocated rather than arrays ofPeter Wemm1998-04-061-17/+11
| | | | | | | | | ints. Remove some no longer needed casts. Initialize the per-cpu global data area using the structs rather than knowing too much about layout, alignment, etc. Notes: svn path=/head/; revision=35077
* Make a kernel version of the timer* functions called timerval* to bePoul-Henning Kamp1998-04-061-3/+3
| | | | | | | | | more consistent. OK'ed by: bde Notes: svn path=/head/; revision=35058
* Add two workarounds for broken MP tables:Tor Egge1998-04-011-2/+49
| | | | | | | | | | | | | | | | - Attempt to handle PCI devices where the interrupt is an ISA/EISA interrupt according to the mp table. - Attempt to handle multiple IO APIC pins connected to the same PCI or ISA/EISA interrupt source. Print a warning if this happens, since performance is suboptimal. This workaround is only used for PCI devices. With these two workarounds, the -SMP kernel is capable of running on my Asus P/I-P65UP5 motherboard when version 1.4 of the MP table is disabled. Notes: svn path=/head/; revision=34990
* The APs now reload the interrupt descriptor table pointer afterTor Egge1998-03-071-1/+6
| | | | | | | | | | | | f00f_hack has run. Use the global r_idt descriptor in f00f_hack when in SMP mode, so the APs find the relocated interrupt descriptor table. Submitted by: Partially from David A Adkins <adkin003@tc.umn.edu> Notes: svn path=/head/; revision=34197
* When entering the apic version of slow interrupt handler, levelTor Egge1998-03-031-1/+60
| | | | | | | | | | | | interrupts are masked, and EOI is sent iff the corresponding ISR bit is set in the local apic. If the CPU cannot obtain the interrupt service lock (currently the global kernel lock) the interrupt is forwarded to the CPU holding that lock. Clock interrupts now have higher priority than other slow interrupts. Notes: svn path=/head/; revision=34021
* Forward the signal if the process runs on a different CPU. This reducesTor Egge1998-03-031-2/+54
| | | | | | | | | | | the signal handling latency for cpu-bound processes that performs very few system calls. The IPI for forcing an additional software trap is no longer dependent upon BETTER_CLOCK being defined. Notes: svn path=/head/; revision=34020
* Reduce timeout before assuming that forwarding of hardclock or softclockTor Egge1998-03-031-7/+11
| | | | | | | | failed. Don't complain on forwarding failure, unless BETTER_CLOCK_DIAGNOSTIC is defined. Notes: svn path=/head/; revision=34019
* 1) Use a more consistent page wait methodology.John Dyson1998-03-011-2/+2
| | | | | | | | | | | | | | | | 2) Do not unnecessarily force page blocking when paging pages out. 3) Further improve swap pager performance and correctness, including fixing the paging in progress deadlock (except in severe I/O error conditions.) 4) Enable vfs_ioopt=1 as a default. 5) Fix and enable the page prezeroing in SMP mode. All in all, SMP systems especially should show a significant improvement in "snappyness." Notes: svn path=/head/; revision=33936
* Staticize.Eivind Eklund1998-02-091-5/+7
| | | | Notes: svn path=/head/; revision=33181
* Add support for low resolution SMP kernel profiling.Tor Egge1997-12-151-1/+6
| | | | | | | | | | | | | | | - A nonprofiling version of s_lock (called s_lock_np) is used by mcount. - When profiling is active, more registers are clobbered in seemingly simple assembly routines. This means that some callers needed to save/restore extra registers. - The stack pointer must have space for a 'fake' return address in idle, to avoid stack underflow. Notes: svn path=/head/; revision=31723
* Don't forward hardclock or statclock to stopped cpus. Disable forwardingTor Egge1997-12-151-10/+17
| | | | | | | when a panic has occured. Notes: svn path=/head/; revision=31720
* Add needed #include.Tor Egge1997-12-121-1/+4
| | | | | | | Problem found by: Bruce Evans <bde@zeta.org.au> Notes: svn path=/head/; revision=31689
* The improvements to clock statistics by Tor EggeSteve Passe1997-12-081-1/+315
| | | | | | | | | | Wrappered and enabled by the define BETTER_CLOCK (on by default in smpyests.h) Reviewed by: smp@csn.net Submitted by: Tor Egge <Tor.Egge@idi.ntnu.no> Notes: svn path=/head/; revision=31639
* Use UPAGES when setting up private pages for SMP (which includes idle stack).Tor Egge1997-11-071-7/+7
| | | | Notes: svn path=/head/; revision=31030
* Removed unused #includes.Bruce Evans1997-10-281-2/+1
| | | | Notes: svn path=/head/; revision=30813
* Try and fix some style problemsPeter Wemm1997-10-121-15/+18
| | | | Notes: svn path=/head/; revision=30343
* Convert the VM86 option from a global option to an option only dependedPeter Wemm1997-10-101-1/+2
| | | | | | | | on by the files that use it. Changing the VM86 option now only causes a recompile of a dozen files or so rather than the entire kernel. Notes: svn path=/head/; revision=30265
* It is possible that MB's with really broken bios's not set up more ofJohn Dyson1997-10-061-0/+8
| | | | | | | the mtrr registers. This just fills in more of the registers. Notes: svn path=/head/; revision=30136
* Make sure that the memory type registers are the same for each CPUJohn Dyson1997-10-051-1/+53
| | | | | | | | | in a P6 SMP system. Some MB bios'es don't set the registers up correctly for the AP's. Additionally, set the memory between 0xa0000 and 0xbffff as write combining. Notes: svn path=/head/; revision=30112
* Implement the parts needed for VM86 under SMP.Peter Wemm1997-09-211-7/+11
| | | | Notes: svn path=/head/; revision=29663
* Add support for more than 1 page of idle process stack on SMP systems.John Dyson1997-09-211-14/+24
| | | | Notes: svn path=/head/; revision=29655
* General cleanup of the lock pushdown code. They are grouped and enabledSteve Passe1997-09-071-9/+13
| | | | | | | | | | | | from machine/smptests.h: #define PUSHDOWN_LEVEL_1 #define PUSHDOWN_LEVEL_2 #define PUSHDOWN_LEVEL_3 #define PUSHDOWN_LEVEL_4_NOT Notes: svn path=/head/; revision=29213
* Cleanup.Steve Passe1997-09-011-8/+10
| | | | Notes: svn path=/head/; revision=28999
* Move closer to supporting VM86 under SMP.Bruce Evans1997-09-011-1/+9
| | | | | | | | | LINT now compiles but doesn't link. Other link-time breakage for LINT is now visible (SMP is incompatible with SIMPLELOCK_DEBUG). Submitted by: jlemon Notes: svn path=/head/; revision=28984
* Debug version of simple_lock. This will store the CPU id of theSteve Passe1997-08-311-20/+11
| | | | | | | | | | | | | holding CPU along with the lock. When a CPU fails to get the lock it compares its own id to the holder id. If they are the same it panic()s, as simple locks are binary, and this would cause a deadlock. Controlled by smptests.h: SL_DEBUG, ON by default. Some minor cleanup. Notes: svn path=/head/; revision=28951