From 4a16efa3e43e35f0cc9efe3a67f620f0017c3d36 Mon Sep 17 00:00:00 2001
From: Dimitry Andric <dim@FreeBSD.org>
Date: Mon, 8 Apr 2013 18:41:23 +0000
Subject: Vendor import of llvm trunk r178860:
 http://llvm.org/svn/llvm-project/llvm/trunk@178860

---
 bindings/python/llvm/tests/test_disassembler.py | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

(limited to 'bindings/python/llvm/tests/test_disassembler.py')

diff --git a/bindings/python/llvm/tests/test_disassembler.py b/bindings/python/llvm/tests/test_disassembler.py
index 545e8668b6c9..46d12f705626 100644
--- a/bindings/python/llvm/tests/test_disassembler.py
+++ b/bindings/python/llvm/tests/test_disassembler.py
@@ -1,6 +1,6 @@
 from .base import TestBase
 
-from ..disassembler import Disassembler
+from ..disassembler import Disassembler, Option_UseMarkup
 
 class TestDisassembler(TestBase):
     def test_instantiate(self):
@@ -26,3 +26,14 @@ class TestDisassembler(TestBase):
 
         self.assertEqual(instructions[0], (0, 3, '\tjcxz\t-127'))
         self.assertEqual(instructions[1], (3, 2, '\taddl\t%eax, %edi'))
+
+    def test_set_options(self):
+        sequence = '\x10\x40\x2d\xe9'
+        triple = 'arm-linux-android'
+
+        disassembler = Disassembler(triple)
+        disassembler.set_options(Option_UseMarkup)
+        count, s = disassembler.get_instruction(sequence)
+        print s
+        self.assertEqual(count, 4)
+        self.assertEqual(s, '\tpush\t{<reg:r4>, <reg:lr>}')
-- 
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