From a7fe922b98bb45be7dce7c1cfe668ec27eeddc74 Mon Sep 17 00:00:00 2001 From: Dimitry Andric Date: Wed, 17 Aug 2016 19:33:52 +0000 Subject: Vendor import of llvm release_39 branch r278877: https://llvm.org/svn/llvm-project/llvm/branches/release_39@278877 --- lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'lib/Target/AMDGPU/SIMachineFunctionInfo.cpp') diff --git a/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp b/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp index 4d12a1ef9a93..848be32cd515 100644 --- a/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp +++ b/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp @@ -203,7 +203,8 @@ SIMachineFunctionInfo::SpilledReg SIMachineFunctionInfo::getSpilledReg ( Spill.Lane = Lane; if (!LaneVGPRs.count(LaneVGPRIdx)) { - unsigned LaneVGPR = TRI->findUnusedRegister(MRI, &AMDGPU::VGPR_32RegClass); + unsigned LaneVGPR = TRI->findUnusedRegister(MRI, &AMDGPU::VGPR_32RegClass, + *MF); if (LaneVGPR == AMDGPU::NoRegister) // We have no VGPRs left for spilling SGPRs. -- cgit v1.3