From 687a64222b4c87c825258d4dfeb1f0794e8cb300 Mon Sep 17 00:00:00 2001
From: Dimitry Andric <dim@FreeBSD.org>
Date: Tue, 11 Jun 2019 18:16:27 +0000
Subject: Vendor import of llvm release_80 branch r363030:
 https://llvm.org/svn/llvm-project/llvm/branches/release_80@363030

---
 lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp | 8 ++++++++
 1 file changed, 8 insertions(+)

(limited to 'lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp')

diff --git a/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp b/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
index 26869f250823..cce239cac970 100644
--- a/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
+++ b/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
@@ -61,6 +61,14 @@ extern "C" void LLVMInitializePowerPCDisassembler() {
                                          createPPCLEDisassembler);
 }
 
+static DecodeStatus DecodePCRel24BranchTarget(MCInst &Inst, unsigned Imm,
+                                              uint64_t Addr,
+                                              const void *Decoder) {
+  int32_t Offset = SignExtend32<24>(Imm);
+  Inst.addOperand(MCOperand::createImm(Offset));
+  return MCDisassembler::Success;
+}
+
 // FIXME: These can be generated by TableGen from the existing register
 // encoding values!
 
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