From 71d5a2540a98c81f5bcaeb48805e0e2881f530ef Mon Sep 17 00:00:00 2001 From: Dimitry Andric Date: Sun, 16 Apr 2017 16:01:22 +0000 Subject: Vendor import of llvm trunk r300422: https://llvm.org/svn/llvm-project/llvm/trunk@300422 --- .../ADCE/delete-profiling-calls-to-constant.ll | 6 +- test/Transforms/AddDiscriminators/basic.ll | 2 +- test/Transforms/AddDiscriminators/call-nested.ll | 2 +- test/Transforms/AddDiscriminators/call.ll | 14 +- test/Transforms/AddDiscriminators/diamond.ll | 4 +- test/Transforms/AddDiscriminators/first-only.ll | 2 +- test/Transforms/AddDiscriminators/inlined.ll | 4 +- .../AddDiscriminators/memcpy-discriminator.ll | 104 ++ test/Transforms/AddDiscriminators/multiple.ll | 4 +- test/Transforms/AddDiscriminators/oneline.ll | 14 +- .../ArgumentPromotion/2008-07-02-array-indexing.ll | 25 +- .../ArgumentPromotion/aggregate-promote.ll | 43 +- test/Transforms/ArgumentPromotion/attrs.ll | 59 +- test/Transforms/ArgumentPromotion/byval-2.ll | 1 + test/Transforms/ArgumentPromotion/byval.ll | 1 + .../ArgumentPromotion/callgraph-update.ll | 23 - test/Transforms/ArgumentPromotion/chained.ll | 32 +- test/Transforms/ArgumentPromotion/control-flow.ll | 28 +- test/Transforms/ArgumentPromotion/control-flow2.ll | 1 + test/Transforms/ArgumentPromotion/crash.ll | 82 +- test/Transforms/ArgumentPromotion/dbg.ll | 3 +- test/Transforms/ArgumentPromotion/fp80.ll | 1 + test/Transforms/ArgumentPromotion/inalloca.ll | 1 + test/Transforms/ArgumentPromotion/pr27568.ll | 1 + test/Transforms/ArgumentPromotion/profile.ll | 23 + test/Transforms/ArgumentPromotion/reserve-tbaa.ll | 3 +- test/Transforms/ArgumentPromotion/sret.ll | 1 + test/Transforms/ArgumentPromotion/tail.ll | 1 + test/Transforms/ArgumentPromotion/variadic.ll | 1 + test/Transforms/AtomicExpand/SPARC/libcalls.ll | 44 +- test/Transforms/BBVectorize/X86/loop1.ll | 2 +- test/Transforms/BBVectorize/X86/wr-aliases.ll | 8 +- test/Transforms/BBVectorize/loop1.ll | 2 +- test/Transforms/BDCE/basic.ll | 38 + .../CodeGenPrepare/AMDGPU/no-sink-addrspacecast.ll | 2 +- .../NVPTX/bypass-slow-div-special-cases.ll | 216 +++ test/Transforms/CodeGenPrepare/X86/computedgoto.ll | 294 ++++ .../Transforms/CodeGenPrepare/X86/sink-addrmode.ll | 26 +- .../CodeGenPrepare/X86/sink-addrspacecast.ll | 8 +- test/Transforms/CodeGenPrepare/basic.ll | 42 +- .../Transforms/CodeGenPrepare/builtin-condition.ll | 20 +- test/Transforms/CodeGenPrepare/section.ll | 22 + test/Transforms/ConstProp/loads.ll | 4 +- test/Transforms/ConstantHoisting/X86/ehpad.ll | 62 + test/Transforms/ConstantMerge/dont-merge.ll | 38 + test/Transforms/ConstantMerge/merge-dbg.ll | 32 + test/Transforms/Coroutines/ArgAddr.ll | 4 +- test/Transforms/Coroutines/coro-frame.ll | 61 + test/Transforms/Coroutines/coro-spill-after-phi.ll | 60 + test/Transforms/Coroutines/coro-split-00.ll | 4 +- test/Transforms/Coroutines/coro-split-01.ll | 4 +- test/Transforms/Coroutines/coro-split-02.ll | 4 +- test/Transforms/Coroutines/coro-split-dbg.ll | 8 +- test/Transforms/Coroutines/coro-split-eh.ll | 145 ++ test/Transforms/Coroutines/ex0.ll | 4 +- test/Transforms/Coroutines/ex1.ll | 4 +- test/Transforms/Coroutines/ex2.ll | 4 +- test/Transforms/Coroutines/ex3.ll | 4 +- test/Transforms/Coroutines/ex4.ll | 4 +- test/Transforms/Coroutines/ex5.ll | 4 +- test/Transforms/Coroutines/no-suspend.ll | 10 +- test/Transforms/Coroutines/phi-coro-end.ll | 4 +- test/Transforms/Coroutines/restart-trigger.ll | 4 +- .../CorrelatedValuePropagation/alloca.ll | 8 +- .../Transforms/CorrelatedValuePropagation/basic.ll | 4 +- test/Transforms/DeadArgElim/call_profile.ll | 22 + test/Transforms/DeadStoreElimination/dominate.ll | 6 +- test/Transforms/DeadStoreElimination/lifetime.ll | 10 +- .../DeadStoreElimination/operand-bundles.ll | 12 + test/Transforms/EarlyCSE/readnone-mayunwind.ll | 15 + test/Transforms/FunctionAttrs/nonnull.ll | 146 +- test/Transforms/FunctionImport/funcimport.ll | 16 +- test/Transforms/FunctionImport/unnamed-globals.ll | 10 + test/Transforms/GVN/PRE/rle-addrspace-cast.ll | 2 +- test/Transforms/GVN/PRE/rle.ll | 4 +- test/Transforms/GVN/cond_br2.ll | 8 +- test/Transforms/GVN/debugloc.ll | 77 + test/Transforms/GVN/fence.ll | 20 + test/Transforms/GVN/invariant.group.ll | 6 +- test/Transforms/GVN/lifetime-simple.ll | 8 +- test/Transforms/GVNHoist/hoist-inline.ll | 38 + test/Transforms/GVNHoist/hoist-pr31891.ll | 83 + test/Transforms/GVNHoist/hoist-very-busy.ll | 55 + test/Transforms/GVNHoist/ld_hoist1.ll | 64 + test/Transforms/GVNHoist/ld_hoist_st_sink.ll | 84 + test/Transforms/GVNHoist/pr29034.ll | 4 +- test/Transforms/GlobalDCE/crash-assertingvh.ll | 24 + test/Transforms/GlobalOpt/2009-03-05-dbg.ll | 2 +- .../GlobalOpt/externally-initialized-aggregate.ll | 4 +- test/Transforms/GlobalSplit/basic.ll | 20 +- test/Transforms/IPConstantProp/naked-return.ll | 3 +- test/Transforms/IRCE/bad-loop-structure.ll | 45 + .../IndVarSimplify/2011-11-01-lftrptr.ll | 4 +- .../IndVarSimplify/AMDGPU/no-widen-to-i64.ll | 6 +- test/Transforms/IndVarSimplify/exit_value_test2.ll | 8 +- test/Transforms/IndVarSimplify/pr32045.ll | 39 + .../IndVarSimplify/replace-sdiv-by-udiv.ll | 130 ++ test/Transforms/InferAddressSpaces/AMDGPU/basic.ll | 173 +++ test/Transforms/InferAddressSpaces/AMDGPU/icmp.ll | 160 ++ .../AMDGPU/infer-address-space.ll | 175 +++ .../InferAddressSpaces/AMDGPU/intrinsics.ll | 146 ++ .../InferAddressSpaces/AMDGPU/lit.local.cfg | 3 + .../InferAddressSpaces/AMDGPU/mem-intrinsics.ll | 134 ++ .../AMDGPU/old-pass-regressions.ll | 143 ++ .../Transforms/InferAddressSpaces/AMDGPU/select.ll | 264 ++++ .../InferAddressSpaces/AMDGPU/volatile.ll | 140 ++ .../InferAddressSpaces/NVPTX/bug31948.ll | 24 + .../InferAddressSpaces/NVPTX/lit.local.cfg | 2 + test/Transforms/Inline/AArch64/gep-cost.ll | 30 + test/Transforms/Inline/AArch64/lit.local.cfg | 2 + test/Transforms/Inline/alloca-bonus.ll | 8 +- test/Transforms/Inline/arg-attr-propagation.ll | 50 + test/Transforms/Inline/bfi-update.ll | 93 ++ .../Inline/cgscc-incremental-invalidate.ll | 111 ++ test/Transforms/Inline/cgscc-invalidate.ll | 32 +- test/Transforms/Inline/clear-analyses.ll | 32 + test/Transforms/Inline/crash-lifetime-marker.ll | 4 +- test/Transforms/Inline/function-count-update-2.ll | 33 + test/Transforms/Inline/function-count-update-3.ll | 78 + test/Transforms/Inline/function-count-update.ll | 50 + test/Transforms/Inline/inline-cold-callee.ll | 1 - test/Transforms/Inline/inline-cold-callsite.ll | 54 + test/Transforms/Inline/inline-hot-callsite-2.ll | 56 + test/Transforms/Inline/inline-hot-callsite.ll | 2 +- test/Transforms/Inline/inline_stats.ll | 3 + test/Transforms/Inline/internal-scc-members.ll | 31 + test/Transforms/Inline/last-call-bonus.ll | 52 + test/Transforms/Inline/lifetime-no-datalayout.ll | 4 +- test/Transforms/Inline/lifetime.ll | 40 +- test/Transforms/Inline/monster_scc.ll | 460 ++++++ .../Inline/optimization-remarks-with-hotness.ll | 3 +- test/Transforms/Inline/optimization-remarks.ll | 3 +- test/Transforms/Inline/prof-update.ll | 39 + test/Transforms/InstCombine/2008-01-29-AddICmp.ll | 85 -- .../InstCombine/2008-05-22-NegValVector.ll | 6 + .../Transforms/InstCombine/2008-11-20-DivMulRem.ll | 67 - .../InstCombine/2009-03-20-AShrOverShift.ll | 9 - test/Transforms/InstCombine/2012-07-25-LoadPart.ll | 4 +- test/Transforms/InstCombine/X86FsubCmpCombine.ll | 181 +++ test/Transforms/InstCombine/add-sitofp.ll | 12 +- test/Transforms/InstCombine/add.ll | 179 ++- test/Transforms/InstCombine/alloca.ll | 4 +- .../InstCombine/amdgcn-demanded-vector-elts.ll | 322 ++++ test/Transforms/InstCombine/amdgcn-intrinsics.ll | 903 +++++++++++ test/Transforms/InstCombine/and-or-icmps.ll | 172 ++- test/Transforms/InstCombine/and.ll | 216 ++- test/Transforms/InstCombine/and2.ll | 87 +- test/Transforms/InstCombine/apint-shift.ll | 249 ++- test/Transforms/InstCombine/apint-sub.ll | 2 +- test/Transforms/InstCombine/assume.ll | 4 +- test/Transforms/InstCombine/bitcast-bigendian.ll | 33 +- test/Transforms/InstCombine/bitcast.ll | 147 +- test/Transforms/InstCombine/bitreverse-fold.ll | 14 + .../InstCombine/bitreverse-known-bits.ll | 51 + test/Transforms/InstCombine/bswap-fold.ll | 211 +-- .../InstCombine/builtin-object-size-offset.ll | 12 +- .../InstCombine/builtin-object-size-ptr.ll | 8 +- test/Transforms/InstCombine/call-guard.ll | 32 + test/Transforms/InstCombine/call_nonnull_arg.ll | 4 +- .../InstCombine/cast-call-combine-prof.ll | 53 + test/Transforms/InstCombine/compare-alloca.ll | 8 +- test/Transforms/InstCombine/compare-unescaped.ll | 2 +- test/Transforms/InstCombine/consecutive-fences.ll | 47 + test/Transforms/InstCombine/constant-fold-math.ll | 8 - test/Transforms/InstCombine/convergent.ll | 2 +- test/Transforms/InstCombine/deadcode.ll | 8 +- test/Transforms/InstCombine/debuginfo-dce.ll | 106 ++ .../InstCombine/double-float-shrink-2.ll | 445 +++++- .../InstCombine/element-atomic-memcpy-to-loads.ll | 92 ++ test/Transforms/InstCombine/exact.ll | 4 +- test/Transforms/InstCombine/fabs-libcall.ll | 21 + test/Transforms/InstCombine/fabs.ll | 75 +- test/Transforms/InstCombine/fast-math.ll | 23 + test/Transforms/InstCombine/fcmp.ll | 203 ++- .../Transforms/InstCombine/float-shrink-compare.ll | 381 +++-- test/Transforms/InstCombine/fma.ll | 9 +- test/Transforms/InstCombine/getelementptr.ll | 38 + test/Transforms/InstCombine/icmp-add.ll | 247 +++ test/Transforms/InstCombine/icmp-shl-nsw.ll | 186 ++- test/Transforms/InstCombine/icmp.ll | 231 ++- .../InstCombine/insert-extract-shuffle.ll | 10 +- test/Transforms/InstCombine/intrinsics.ll | 23 +- test/Transforms/InstCombine/lifetime-asan.ll | 12 +- test/Transforms/InstCombine/lifetime.ll | 40 +- test/Transforms/InstCombine/load-cmp.ll | 2 +- test/Transforms/InstCombine/lshr.ll | 102 ++ test/Transforms/InstCombine/malloc-free-delete.ll | 8 +- test/Transforms/InstCombine/max-of-nots.ll | 22 + test/Transforms/InstCombine/memcmp-1.ll | 43 +- test/Transforms/InstCombine/memcpy-addrspace.ll | 85 ++ test/Transforms/InstCombine/memcpy-from-global.ll | 4 +- test/Transforms/InstCombine/memcpy-to-load.ll | 6 +- test/Transforms/InstCombine/memset_chk-1.ll | 8 +- test/Transforms/InstCombine/minmax-fold.ll | 157 +- test/Transforms/InstCombine/narrow-switch.ll | 46 +- test/Transforms/InstCombine/narrow.ll | 140 ++ test/Transforms/InstCombine/not-fcmp.ll | 13 - test/Transforms/InstCombine/not.ll | 104 +- test/Transforms/InstCombine/nvvm-intrins.ll | 471 ++++++ test/Transforms/InstCombine/objsize.ll | 102 +- test/Transforms/InstCombine/or.ll | 188 ++- test/Transforms/InstCombine/phi-select-constant.ll | 57 + .../Transforms/InstCombine/phi-select-constexpr.ll | 19 - test/Transforms/InstCombine/pow-1.ll | 6 +- test/Transforms/InstCombine/pr17827.ll | 4 +- test/Transforms/InstCombine/pr19420.ll | 54 +- .../Transforms/InstCombine/pr31990_wrong_memcpy.ll | 26 + test/Transforms/InstCombine/prefetch-load.ll | 34 + test/Transforms/InstCombine/preserved-analyses.ll | 33 + test/Transforms/InstCombine/readnone-maythrow.ll | 34 + test/Transforms/InstCombine/rem.ll | 544 ++++--- test/Transforms/InstCombine/select-bitext.ll | 6 +- test/Transforms/InstCombine/select-cmp-br.ll | 342 +++-- test/Transforms/InstCombine/select.ll | 50 +- test/Transforms/InstCombine/select_meta.ll | 32 +- test/Transforms/InstCombine/shift-sra.ll | 137 +- test/Transforms/InstCombine/shift.ll | 253 ++- test/Transforms/InstCombine/shufflevec-bitcast.ll | 16 + test/Transforms/InstCombine/signext.ll | 17 + test/Transforms/InstCombine/sitofp.ll | 190 ++- test/Transforms/InstCombine/srem.ll | 8 - test/Transforms/InstCombine/stpcpy_chk-1.ll | 8 +- test/Transforms/InstCombine/strcpy_chk-1.ll | 10 +- test/Transforms/InstCombine/sub-xor.ll | 10 - test/Transforms/InstCombine/sub.ll | 444 +++++- test/Transforms/InstCombine/trunc.ll | 73 +- test/Transforms/InstCombine/type_pun.ll | 98 +- test/Transforms/InstCombine/urem.ll | 50 - test/Transforms/InstCombine/vararg.ll | 12 +- test/Transforms/InstCombine/vec_demanded_elts.ll | 19 +- test/Transforms/InstCombine/vec_sext.ll | 2 +- test/Transforms/InstCombine/vector-casts.ll | 106 +- test/Transforms/InstCombine/vector-srem.ll | 13 - test/Transforms/InstCombine/vector-urem.ll | 8 - .../InstCombine/vector_insertelt_shuffle.ll | 109 +- test/Transforms/InstCombine/win-math.ll | 35 +- test/Transforms/InstCombine/x86-avx2.ll | 24 + test/Transforms/InstCombine/x86-avx512.ll | 864 +++++------ test/Transforms/InstCombine/x86-muldq.ll | 160 +- test/Transforms/InstCombine/x86-pack.ll | 366 +++++ test/Transforms/InstCombine/x86-pshufb.ll | 42 + test/Transforms/InstCombine/x86-vpermil.ll | 68 + test/Transforms/InstCombine/xor.ll | 186 ++- test/Transforms/InstCombine/xor2.ll | 28 +- test/Transforms/InstCombine/zero-point-zero-add.ll | 2 +- test/Transforms/InstCombine/zext-or-icmp.ll | 30 + test/Transforms/InstCombine/zext-phi.ll | 32 + test/Transforms/InstCombine/zext.ll | 2 +- test/Transforms/InstMerge/ld_hoist1.ll | 64 - test/Transforms/InstMerge/ld_hoist_st_sink.ll | 84 - test/Transforms/InstSimplify/AndOrXor.ll | 22 + test/Transforms/InstSimplify/addsub.ll | 78 + test/Transforms/InstSimplify/assume.ll | 60 +- test/Transforms/InstSimplify/bitreverse.ll | 31 + test/Transforms/InstSimplify/div.ll | 56 +- test/Transforms/InstSimplify/fdiv.ll | 22 +- .../InstSimplify/floating-point-arithmetic.ll | 54 + test/Transforms/InstSimplify/icmp-constant.ll | 155 ++ test/Transforms/InstSimplify/mul.ll | 11 + test/Transforms/InstSimplify/rem.ll | 84 +- test/Transforms/InstSimplify/select.ll | 3 +- test/Transforms/InstSimplify/shift-knownbits.ll | 43 + test/Transforms/InstSimplify/shufflevector.ll | 212 +++ .../AArch64/interleaved-accesses.ll | 209 +++ .../InterleavedAccess/ARM/interleaved-accesses.ll | 292 +++- test/Transforms/JumpThreading/crash-assertingvh.ll | 19 - test/Transforms/JumpThreading/guards.ll | 183 +++ test/Transforms/JumpThreading/thread-loads.ll | 225 ++- test/Transforms/LICM/atomics.ll | 148 +- test/Transforms/LICM/constexpr.ll | 2 +- test/Transforms/LICM/hoist-bitcast-load.ll | 3 +- test/Transforms/LICM/hoist-deref-load.ll | 3 +- test/Transforms/LICM/hoist-fast-fdiv.ll | 34 + test/Transforms/LICM/hoist-nounwind.ll | 2 +- test/Transforms/LICM/hoist-round.ll | 5 +- test/Transforms/LICM/hoisting.ll | 173 ++- test/Transforms/LICM/loopsink.ll | 1 + test/Transforms/LICM/opt-remarks.ll | 2 +- test/Transforms/LICM/pr32129.ll | 18 + test/Transforms/LICM/scalar-promote-unwind.ll | 263 ++++ test/Transforms/LICM/scalar-promote.ll | 413 +++++ test/Transforms/LICM/scalar_promote-unwind.ll | 72 - test/Transforms/LICM/scalar_promote.ll | 386 ----- test/Transforms/LICM/sink.ll | 2 + test/Transforms/LICM/unrolled-deeply-nested.ll | 76 + test/Transforms/LoadCombine/deadcode.ll | 39 + test/Transforms/LoadCombine/load-combine-aa.ll | 26 +- .../LoadStoreVectorizer/AMDGPU/aa-metadata.ll | 2 +- .../AMDGPU/adjust-alloca-alignment.ll | 19 +- .../LoadStoreVectorizer/AMDGPU/extended-index.ll | 10 +- .../LoadStoreVectorizer/AMDGPU/insertion-point.ll | 4 +- .../AMDGPU/interleaved-mayalias-store.ll | 2 +- .../AMDGPU/merge-stores-private.ll | 192 ++- .../LoadStoreVectorizer/AMDGPU/merge-stores.ll | 80 +- .../LoadStoreVectorizer/AMDGPU/merge-vectors.ll | 10 +- .../AMDGPU/missing-alignment.ll | 4 +- .../LoadStoreVectorizer/AMDGPU/multiple_tails.ll | 4 +- .../AMDGPU/no-implicit-float.ll | 2 +- .../LoadStoreVectorizer/AMDGPU/optnone.ll | 4 +- .../LoadStoreVectorizer/AMDGPU/pointer-elements.ll | 38 +- .../AMDGPU/store_with_aliasing_load.ll | 2 +- .../AMDGPU/weird-type-accesses.ll | 32 +- .../LoadStoreVectorizer/X86/load-width.ll | 38 + test/Transforms/LoopDeletion/invalidation.ll | 42 + .../LoopDeletion/multiple-exit-conditions.ll | 2 +- test/Transforms/LoopDeletion/multiple-exits.ll | 92 +- .../diagnostics-with-hotness-lazy-BFI.ll | 88 -- test/Transforms/LoopIdiom/unroll.ll | 2 +- test/Transforms/LoopLoadElim/backward.ll | 1 + test/Transforms/LoopLoadElim/forward.ll | 1 + test/Transforms/LoopPredication/basic.ll | 571 +++++++ test/Transforms/LoopPredication/nested.ll | 160 ++ test/Transforms/LoopPredication/visited.ll | 140 ++ test/Transforms/LoopRotate/phi-dbgvalue.ll | 79 + test/Transforms/LoopSimplify/dbg-loc.ll | 7 + .../LoopStrengthReduce/AMDGPU/atomics.ll | 87 ++ .../different-addrspace-addressing-mode-loops.ll | 8 +- .../AMDGPU/different-addrspace-crash.ll | 31 + .../AMDGPU/lsr-postinc-pos-addrspace.ll | 8 +- .../AMDGPU/preserve-addrspace-assert.ll | 2 +- .../LoopStrengthReduce/ARM/ivchain-ARM.ll | 1 - .../Transforms/LoopStrengthReduce/X86/canonical.ll | 65 + .../X86/incorrect-offset-scaling.ll | 48 + .../LoopStrengthReduce/X86/ivchain-X86.ll | 2 - .../LoopStrengthReduce/X86/lsr-insns-1.ll | 52 + .../LoopStrengthReduce/X86/lsr-insns-2.ll | 58 + .../LoopStrengthReduce/X86/nested-loop.ll | 65 + .../LoopStrengthReduce/X86/sibling-loops.ll | 97 ++ .../LoopStrengthReduce/quadradic-exit-value.ll | 54 - .../Transforms/LoopUnroll/AMDGPU/unroll-barrier.ll | 2 +- .../LoopUnroll/AMDGPU/unroll-for-private.ll | 154 ++ test/Transforms/LoopUnroll/basic.ll | 1 + test/Transforms/LoopUnroll/epilog_const_phi.ll | 65 + test/Transforms/LoopUnroll/full-unroll-bad-cost.ll | 1 + test/Transforms/LoopUnroll/full-unroll-crashers.ll | 1 + .../LoopUnroll/full-unroll-heuristics-2.ll | 1 + .../LoopUnroll/full-unroll-heuristics-cmp.ll | 1 + .../LoopUnroll/full-unroll-heuristics-dce.ll | 1 + .../LoopUnroll/full-unroll-heuristics-geps.ll | 1 + .../LoopUnroll/full-unroll-heuristics-phi-prop.ll | 1 + .../LoopUnroll/full-unroll-heuristics.ll | 10 + .../LoopUnroll/full-unroll-keep-first-exit.ll | 1 + .../LoopUnroll/partial-unroll-const-bounds.ll | 10 +- .../Transforms/LoopUnroll/peel-loop-irreducible.ll | 36 + test/Transforms/LoopUnroll/peel-loop-not-forced.ll | 53 + test/Transforms/LoopUnroll/peel-loop-pgo.ll | 2 +- test/Transforms/LoopUnroll/peel-loop.ll | 2 +- test/Transforms/LoopUnroll/peel-loop2.ll | 61 + test/Transforms/LoopUnroll/pr31718.ll | 55 + test/Transforms/LoopUnroll/revisit.ll | 156 ++ test/Transforms/LoopUnroll/runtime-loop.ll | 3 + test/Transforms/LoopUnroll/runtime-loop1.ll | 3 + test/Transforms/LoopUnroll/runtime-loop2.ll | 7 +- test/Transforms/LoopUnroll/runtime-loop3.ll | 3 +- test/Transforms/LoopUnroll/runtime-loop5.ll | 10 +- test/Transforms/LoopUnroll/unloop.ll | 2 +- .../Transforms/LoopUnroll/unroll-heuristics-pgo.ll | 4 +- test/Transforms/LoopUnroll/unroll-pragmas.ll | 24 +- .../LoopUnroll/update-loop-info-in-subloops.ll | 1 + .../LoopUnswitch/AMDGPU/divergent-unswitch.ll | 85 ++ test/Transforms/LoopUnswitch/AMDGPU/lit.local.cfg | 2 + test/Transforms/LoopUnswitch/basictest.ll | 211 +++ test/Transforms/LoopUnswitch/cold-loop.ll | 52 - test/Transforms/LoopUnswitch/copy-metadata.ll | 4 +- test/Transforms/LoopUnswitch/crash.ll | 2 +- .../LoopUnswitch/simplify-with-nonvalness.ll | 58 + test/Transforms/LoopUnswitch/trivial-unswitch.ll | 46 +- .../LoopVectorize/AArch64/aarch64-predication.ll | 82 +- .../AArch64/first-order-recurrence.ll | 341 ----- .../LoopVectorize/AArch64/induction-trunc.ll | 30 + .../LoopVectorize/AArch64/interleaved-vs-scalar.ll | 38 + .../LoopVectorize/AArch64/interleaved_cost.ll | 226 ++- .../AArch64/loop-vectorization-factors.ll | 23 +- test/Transforms/LoopVectorize/AArch64/pr31900.ll | 37 + .../AArch64/smallest-and-widest-types.ll | 33 + test/Transforms/LoopVectorize/AMDGPU/lit.local.cfg | 2 + .../AMDGPU/unroll-in-loop-vectorizer.ll | 28 + .../LoopVectorize/ARM/interleaved_cost.ll | 164 +- .../SystemZ/branch-for-predicated-block.ll | 38 + .../Transforms/LoopVectorize/SystemZ/lit.local.cfg | 2 + .../SystemZ/load-store-scalarization-cost.ll | 33 + .../SystemZ/mem-interleaving-costs.ll | 70 + test/Transforms/LoopVectorize/X86/avx512.ll | 2 +- .../LoopVectorize/X86/consecutive-ptr-uniforms.ll | 43 +- .../LoopVectorize/X86/gather-vs-interleave.ll | 41 + .../LoopVectorize/X86/int128_no_gather.ll | 4 +- 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b/test/Transforms/ADCE/delete-profiling-calls-to-constant.ll index a61e8f8caccb..804b3dd67f2a 100644 --- a/test/Transforms/ADCE/delete-profiling-calls-to-constant.ll +++ b/test/Transforms/ADCE/delete-profiling-calls-to-constant.ll @@ -1,5 +1,5 @@ -; RUN: opt < %s -adce | FileCheck %s -; RUN: opt < %s -passes=adce | FileCheck %s +; RUN: opt < %s -adce -S | FileCheck %s +; RUN: opt < %s -passes=adce -S | FileCheck %s ; Verify that a call to instrument a constant is deleted. @@ -7,7 +7,7 @@ @__profd_foo = private global { i64, i64, i64*, i8*, i8*, i32, [1 x i16] } { i64 6699318081062747564, i64 0, i64* getelementptr inbounds ([1 x i64], [1 x i64]* @__profc_foo, i32 0, i32 0), i8* bitcast (i32 ()* @foo to i8*), i8* null, i32 1, [1 x i16] [i16 1] }, section "__llvm_prf_data", align 8 define i32 @foo() { -; CHECK-NOT: __llvm_profile_instrument_target +; CHECK-NOT: call void @__llvm_profile_instrument_target entry: tail call void @__llvm_profile_instrument_target(i64 ptrtoint (i32 (i32)* @bar to i64), i8* bitcast ({ i64, i64, i64*, i8*, i8*, i32, [1 x i16] }* @__profd_foo to i8*), i32 0) %call = tail call i32 @bar(i32 21) diff --git a/test/Transforms/AddDiscriminators/basic.ll b/test/Transforms/AddDiscriminators/basic.ll index 801eda2b0665..a781c0d409bc 100644 --- a/test/Transforms/AddDiscriminators/basic.ll +++ b/test/Transforms/AddDiscriminators/basic.ll @@ -58,5 +58,5 @@ attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointe ; CHECK: ![[FOO:[0-9]+]] = distinct !DISubprogram(name: "foo" ; CHECK: ![[BLOCK:[0-9]+]] = distinct !DILexicalBlock(scope: ![[FOO]],{{.*}} line: 3) ; CHECK: ![[THEN]] = !DILocation(line: 3, scope: ![[BLOCKFILE:[0-9]+]]) -; CHECK: ![[BLOCKFILE]] = !DILexicalBlockFile(scope: ![[BLOCK]],{{.*}} discriminator: 1) +; CHECK: ![[BLOCKFILE]] = !DILexicalBlockFile(scope: ![[BLOCK]],{{.*}} discriminator: 2) ; CHECK: ![[END]] = !DILocation(line: 4, scope: ![[FOO]]) diff --git a/test/Transforms/AddDiscriminators/call-nested.ll b/test/Transforms/AddDiscriminators/call-nested.ll index 481d6f260047..4d5145abafe1 100644 --- a/test/Transforms/AddDiscriminators/call-nested.ll +++ b/test/Transforms/AddDiscriminators/call-nested.ll @@ -47,4 +47,4 @@ attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no- !14 = !DILocation(line: 4, column: 3, scope: !4) ; CHECK: ![[CALL2]] = !DILocation(line: 4, column: 10, scope: ![[CALL2BLOCK:[0-9]+]]) -; CHECK: ![[CALL2BLOCK]] = !DILexicalBlockFile({{.*}} discriminator: 1) +; CHECK: ![[CALL2BLOCK]] = !DILexicalBlockFile({{.*}} discriminator: 2) diff --git a/test/Transforms/AddDiscriminators/call.ll b/test/Transforms/AddDiscriminators/call.ll index 847a6ad4dc3a..49aca5a488f5 100644 --- a/test/Transforms/AddDiscriminators/call.ll +++ b/test/Transforms/AddDiscriminators/call.ll @@ -5,7 +5,7 @@ ; #1 void bar(); ; #2 ; #3 void foo() { -; #4 bar();bar()/*discriminator 1*/;bar()/*discriminator 2*/; +; #4 bar();bar()/*discriminator 2*/;bar()/*discriminator 4*/; ; #5 } ; Function Attrs: uwtable @@ -14,8 +14,8 @@ define void @_Z3foov() #0 !dbg !4 { ; CHECK: call void @_Z3barv(), !dbg ![[CALL0:[0-9]+]] %a = alloca [100 x i8], align 16 %b = bitcast [100 x i8]* %a to i8* - call void @llvm.lifetime.start(i64 100, i8* %b), !dbg !11 - call void @llvm.lifetime.end(i64 100, i8* %b), !dbg !11 + call void @llvm.lifetime.start.p0i8(i64 100, i8* %b), !dbg !11 + call void @llvm.lifetime.end.p0i8(i64 100, i8* %b), !dbg !11 call void @_Z3barv(), !dbg !11 ; CHECK: call void @_Z3barv(), !dbg ![[CALL1:[0-9]+]] call void @_Z3barv(), !dbg !12 @@ -24,8 +24,8 @@ define void @_Z3foov() #0 !dbg !4 { } declare void @_Z3barv() #1 -declare void @llvm.lifetime.start(i64, i8* nocapture) nounwind argmemonly -declare void @llvm.lifetime.end(i64, i8* nocapture) nounwind argmemonly +declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) nounwind argmemonly +declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) nounwind argmemonly attributes #0 = { uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" } @@ -49,6 +49,6 @@ attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no- !13 = !DILocation(line: 5, column: 1, scope: !4) ; CHECK: ![[CALL1]] = !DILocation(line: 4, column: 9, scope: ![[CALL1BLOCK:[0-9]+]]) -; CHECK: ![[CALL1BLOCK]] = !DILexicalBlockFile({{.*}} discriminator: 1) +; CHECK: ![[CALL1BLOCK]] = !DILexicalBlockFile({{.*}} discriminator: 2) ; CHECK: ![[CALL2]] = !DILocation(line: 4, column: 15, scope: ![[CALL2BLOCK:[0-9]+]]) -; CHECK: ![[CALL2BLOCK]] = !DILexicalBlockFile({{.*}} discriminator: 2) +; CHECK: ![[CALL2BLOCK]] = !DILexicalBlockFile({{.*}} discriminator: 4) diff --git a/test/Transforms/AddDiscriminators/diamond.ll b/test/Transforms/AddDiscriminators/diamond.ll index b3afe7285472..307e95f41e18 100644 --- a/test/Transforms/AddDiscriminators/diamond.ll +++ b/test/Transforms/AddDiscriminators/diamond.ll @@ -10,7 +10,7 @@ ; #6 } ; bar(5): discriminator 0 -; bar(3): discriminator 1 +; bar(3): discriminator 2 ; Function Attrs: uwtable define void @_Z3fooi(i32 %i) #0 !dbg !4 { @@ -69,4 +69,4 @@ attributes #2 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no- !20 = !DILocation(line: 6, column: 1, scope: !4) ; CHECK: ![[ELSE]] = !DILocation(line: 5, column: 18, scope: ![[ELSEBLOCK:[0-9]+]]) -; CHECK: ![[ELSEBLOCK]] = !DILexicalBlockFile({{.*}} discriminator: 1) +; CHECK: ![[ELSEBLOCK]] = !DILexicalBlockFile({{.*}} discriminator: 2) diff --git a/test/Transforms/AddDiscriminators/first-only.ll b/test/Transforms/AddDiscriminators/first-only.ll index 1bd8dae5d05c..dd2117a5b187 100644 --- a/test/Transforms/AddDiscriminators/first-only.ll +++ b/test/Transforms/AddDiscriminators/first-only.ll @@ -69,7 +69,7 @@ attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointe !12 = !DILocation(line: 3, scope: !13) !13 = distinct !DILexicalBlock(line: 3, column: 0, file: !1, scope: !11) -; CHECK: !DILexicalBlockFile(scope: ![[BLOCK2:[0-9]+]],{{.*}} discriminator: 1) +; CHECK: !DILexicalBlockFile(scope: ![[BLOCK2:[0-9]+]],{{.*}} discriminator: 2) !14 = !DILocation(line: 4, scope: !13) ; CHECK: ![[BLOCK2]] = distinct !DILexicalBlock(scope: ![[BLOCK1]],{{.*}} line: 3) diff --git a/test/Transforms/AddDiscriminators/inlined.ll b/test/Transforms/AddDiscriminators/inlined.ll index 2e8ea97348d0..226e903ee212 100644 --- a/test/Transforms/AddDiscriminators/inlined.ll +++ b/test/Transforms/AddDiscriminators/inlined.ll @@ -62,8 +62,8 @@ attributes #3 = { nounwind readnone } !12 = distinct !DISubprogram(name: "g", scope: !1, file: !1, line: 1, type: !8, isLocal: false, isDefinition: true, scopeLine: 1, isOptimized: true, unit: !0, variables: !2) !13 = distinct !DILocation(line: 1, column: 17, scope: !14) ; CHECK: ![[BF:.*]] = !DILexicalBlockFile(scope: ![[LB1:[0-9]+]], -; CHECK-SAME: discriminator: 1) -!14 = !DILexicalBlockFile(scope: !15, file: !1, discriminator: 1) +; CHECK-SAME: discriminator: 2) +!14 = !DILexicalBlockFile(scope: !15, file: !1, discriminator: 2) ; CHECK: ![[LB1]] = distinct !DILexicalBlock(scope: ![[LB2:[0-9]+]], ; CHECK-SAME: line: 1, column: 16) !15 = distinct !DILexicalBlock(scope: !16, file: !1, line: 1, column: 16) diff --git a/test/Transforms/AddDiscriminators/memcpy-discriminator.ll b/test/Transforms/AddDiscriminators/memcpy-discriminator.ll new file mode 100644 index 000000000000..00642d29502e --- /dev/null +++ b/test/Transforms/AddDiscriminators/memcpy-discriminator.ll @@ -0,0 +1,104 @@ +; RUN: opt < %s -add-discriminators -sroa -S | FileCheck %s + +target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" + +; Test case obtained from the following C code: + +; struct A { +; int field1; +; short field2; +; }; +; +; struct B { +; struct A field1; +; int field2; +; }; +; +; +; extern struct B g_b; +; extern int bar(struct B b, int c); +; +; int foo(int cond) { +; int result = cond ? bar(g_b, 33) : 42; +; return result; +; } + +; In this test, global variable g_b is passed by copy to function bar. That +; copy is located on the stack (see alloca %g_b.coerce), and it is initialized +; by a memcpy call. +; +; SROA would split alloca %g_b.coerce into two (smaller disjoint) slices: +; slice [0,8) and slice [8, 12). Users of the original alloca are rewritten +; as users of the new alloca slices. +; In particular, the memcpy is rewritten by SROA as two load/store pairs. +; +; Later on, mem2reg successfully promotes the new alloca slices to registers, +; and loads %3 and %5 are made redundant by the loads obtained from the memcpy +; intrinsic expansion. +; +; If pass AddDiscriminators doesn't assign a discriminator to the intrinsic +; memcpy call, then the loads obtained from the memcpy expansion would not have +; a correct discriminator. +; +; This test checks that the two new loads inserted by SROA in %cond.true +; correctly reference a debug location with a non-zero discriminator. This test +; also checks that the same discriminator is used by all instructions from +; basic block %cond.true. + +%struct.B = type { %struct.A, i32 } +%struct.A = type { i32, i16 } + +@g_b = external global %struct.B, align 4 + +define i32 @foo(i32 %cond) #0 !dbg !5 { +entry: + %g_b.coerce = alloca { i64, i32 }, align 4 + %tobool = icmp ne i32 %cond, 0, !dbg !7 + br i1 %tobool, label %cond.true, label %cond.end, !dbg !7 + +cond.true: +; CHECK-LABEL: cond.true: +; CHECK: load i64, {{.*}}, !dbg ![[LOC:[0-9]+]] +; CHECK-NEXT: load i32, {{.*}}, !dbg ![[LOC]] +; CHECK-NEXT: %call = call i32 @bar({{.*}}), !dbg ![[LOC]] +; CHECK-NEXT: br label %cond.end, !dbg ![[BR_LOC:[0-9]+]] + +; CHECK-DAG: ![[LOC]] = !DILocation(line: 16, column: 23, scope: ![[SCOPE:[0-9]+]]) +; CHECK-DAG: ![[SCOPE]] = !DILexicalBlockFile({{.*}}, discriminator: 2) +; CHECK-DAG: ![[BR_LOC]] = !DILocation(line: 16, column: 16, scope: ![[SCOPE]]) + + %0 = bitcast { i64, i32 }* %g_b.coerce to i8*, !dbg !8 + %1 = bitcast %struct.B* @g_b to i8*, !dbg !8 + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* %1, i64 12, i32 4, i1 false), !dbg !8 + %2 = getelementptr inbounds { i64, i32 }, { i64, i32 }* %g_b.coerce, i32 0, i32 0, !dbg !8 + %3 = load i64, i64* %2, align 4, !dbg !8 + %4 = getelementptr inbounds { i64, i32 }, { i64, i32 }* %g_b.coerce, i32 0, i32 1, !dbg !8 + %5 = load i32, i32* %4, align 4, !dbg !8 + %call = call i32 @bar(i64 %3, i32 %5, i32 33), !dbg !8 + br label %cond.end, !dbg !7 + +cond.end: ; preds = %entry, %cond.true + %cond1 = phi i32 [ %call, %cond.true ], [ 42, %entry ], !dbg !7 + ret i32 %cond1, !dbg !9 +} + +declare i32 @bar(i64, i32, i32) + +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i32, i1) #1 + +attributes #0 = { noinline nounwind uwtable } +attributes #1 = { argmemonly nounwind } + +!llvm.dbg.cu = !{!0} +!llvm.module.flags = !{!3, !4} + +!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, isOptimized: false, runtimeVersion: 0, emissionKind: LineTablesOnly, enums: !2) +!1 = !DIFile(filename: "test.c", directory: ".") +!2 = !{} +!3 = !{i32 2, !"Dwarf Version", i32 4} +!4 = !{i32 2, !"Debug Info Version", i32 3} +!5 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 15, type: !6, isLocal: false, isDefinition: true, scopeLine: 15, flags: DIFlagPrototyped, isOptimized: false, unit: !0, variables: !2) +!6 = !DISubroutineType(types: !2) +!7 = !DILocation(line: 16, column: 16, scope: !5) +!8 = !DILocation(line: 16, column: 23, scope: !5) +!9 = !DILocation(line: 17, column: 3, scope: !5) diff --git a/test/Transforms/AddDiscriminators/multiple.ll b/test/Transforms/AddDiscriminators/multiple.ll index 387689caddff..b4c353cf00f1 100644 --- a/test/Transforms/AddDiscriminators/multiple.ll +++ b/test/Transforms/AddDiscriminators/multiple.ll @@ -67,6 +67,6 @@ attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointe !12 = !DILocation(line: 4, scope: !4) ; CHECK: ![[THEN]] = !DILocation(line: 3, scope: ![[THENBLOCK:[0-9]+]]) -; CHECK: ![[THENBLOCK]] = !DILexicalBlockFile(scope: ![[SCOPE:[0-9]+]],{{.*}} discriminator: 1) +; CHECK: ![[THENBLOCK]] = !DILexicalBlockFile(scope: ![[SCOPE:[0-9]+]],{{.*}} discriminator: 2) ; CHECK: ![[ELSE]] = !DILocation(line: 3, scope: ![[ELSEBLOCK:[0-9]+]]) -; CHECK: ![[ELSEBLOCK]] = !DILexicalBlockFile(scope: ![[SCOPE]],{{.*}} discriminator: 2) +; CHECK: ![[ELSEBLOCK]] = !DILexicalBlockFile(scope: ![[SCOPE]],{{.*}} discriminator: 4) diff --git a/test/Transforms/AddDiscriminators/oneline.ll b/test/Transforms/AddDiscriminators/oneline.ll index aa52ae42ee47..724574a24ddf 100644 --- a/test/Transforms/AddDiscriminators/oneline.ll +++ b/test/Transforms/AddDiscriminators/oneline.ll @@ -7,9 +7,9 @@ ; #3 } ; i == 3: discriminator 0 -; i == 5: discriminator 1 -; return 100: discriminator 2 -; return 99: discriminator 3 +; i == 5: discriminator 2 +; return 100: discriminator 4 +; return 99: discriminator 6 define i32 @_Z3fooi(i32 %i) #0 !dbg !4 { %1 = alloca i32, align 4 @@ -91,11 +91,11 @@ attributes #1 = { nounwind readnone } ; CHECK: ![[F:.*]] = distinct !DISubprogram(name: "foo", ; CHECK: ![[IF:.*]] = distinct !DILexicalBlock(scope: ![[F]],{{.*}}line: 2, column: 7) ; CHECK: ![[THEN1]] = !DILocation(line: 2, column: 17, scope: ![[THENBLOCK:[0-9]+]]) -; CHECK: ![[THENBLOCK]] = !DILexicalBlockFile(scope: ![[IF]],{{.*}} discriminator: 1) +; CHECK: ![[THENBLOCK]] = !DILexicalBlockFile(scope: ![[IF]],{{.*}} discriminator: 2) ; CHECK: ![[THEN2]] = !DILocation(line: 2, column: 19, scope: ![[THENBLOCK]]) ; CHECK: ![[THEN3]] = !DILocation(line: 2, column: 7, scope: ![[BRBLOCK:[0-9]+]]) -; CHECK: ![[BRBLOCK]] = !DILexicalBlockFile(scope: ![[F]],{{.*}} discriminator: 1) +; CHECK: ![[BRBLOCK]] = !DILexicalBlockFile(scope: ![[F]],{{.*}} discriminator: 2) ; CHECK: ![[ELSE]] = !DILocation(line: 2, column: 25, scope: ![[ELSEBLOCK:[0-9]+]]) -; CHECK: ![[ELSEBLOCK]] = !DILexicalBlockFile(scope: ![[IF]],{{.*}} discriminator: 2) +; CHECK: ![[ELSEBLOCK]] = !DILexicalBlockFile(scope: ![[IF]],{{.*}} discriminator: 4) ; CHECK: ![[COMBINE]] = !DILocation(line: 2, column: 42, scope: ![[COMBINEBLOCK:[0-9]+]]) -; CHECK: ![[COMBINEBLOCK]] = !DILexicalBlockFile(scope: ![[IF]],{{.*}} discriminator: 3) +; CHECK: ![[COMBINEBLOCK]] = !DILexicalBlockFile(scope: ![[IF]],{{.*}} discriminator: 6) diff --git a/test/Transforms/ArgumentPromotion/2008-07-02-array-indexing.ll b/test/Transforms/ArgumentPromotion/2008-07-02-array-indexing.ll index 267a6c045974..fac84d092df3 100644 --- a/test/Transforms/ArgumentPromotion/2008-07-02-array-indexing.ll +++ b/test/Transforms/ArgumentPromotion/2008-07-02-array-indexing.ll @@ -1,25 +1,30 @@ -; RUN: opt < %s -argpromotion -S > %t -; RUN: cat %t | grep "define.*@callee(.*i32\*" +; RUN: opt < %s -argpromotion -S | FileCheck %s ; PR2498 ; This test tries to convince argpromotion about promoting the load from %A + 2, ; because there is a load of %A in the entry block define internal i32 @callee(i1 %C, i32* %A) { +; CHECK-LABEL: define internal i32 @callee( +; CHECK: i1 %C, i32* %A) entry: - ; Unconditonally load the element at %A - %A.0 = load i32, i32* %A - br i1 %C, label %T, label %F + ; Unconditonally load the element at %A + %A.0 = load i32, i32* %A + br i1 %C, label %T, label %F + T: - ret i32 %A.0 + ret i32 %A.0 + F: - ; Load the element at offset two from %A. This should not be promoted! - %A.2 = getelementptr i32, i32* %A, i32 2 - %R = load i32, i32* %A.2 - ret i32 %R + ; Load the element at offset two from %A. This should not be promoted! + %A.2 = getelementptr i32, i32* %A, i32 2 + %R = load i32, i32* %A.2 + ret i32 %R } define i32 @foo() { +; CHECK-LABEL: define i32 @foo %X = call i32 @callee(i1 false, i32* null) ; [#uses=1] +; CHECK: call i32 @callee(i1 false, i32* null) ret i32 %X } diff --git a/test/Transforms/ArgumentPromotion/aggregate-promote.ll b/test/Transforms/ArgumentPromotion/aggregate-promote.ll index 3f521bace7f3..b0bab7784edb 100644 --- a/test/Transforms/ArgumentPromotion/aggregate-promote.ll +++ b/test/Transforms/ArgumentPromotion/aggregate-promote.ll @@ -1,24 +1,31 @@ -; RUN: opt < %s -argpromotion -instcombine -S | not grep load -target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" +; RUN: opt < %s -argpromotion -S | FileCheck %s +; RUN: opt < %s -passes=argpromotion -S | FileCheck %s -%QuadTy = type { i32, i32, i32, i32 } -@G = constant %QuadTy { - i32 0, - i32 0, - i32 17, - i32 25 } ; <%QuadTy*> [#uses=1] +%T = type { i32, i32, i32, i32 } +@G = constant %T { i32 0, i32 0, i32 17, i32 25 } -define internal i32 @test(%QuadTy* %P) { - %A = getelementptr %QuadTy, %QuadTy* %P, i64 0, i32 3 ; [#uses=1] - %B = getelementptr %QuadTy, %QuadTy* %P, i64 0, i32 2 ; [#uses=1] - %a = load i32, i32* %A ; [#uses=1] - %b = load i32, i32* %B ; [#uses=1] - %V = add i32 %a, %b ; [#uses=1] - ret i32 %V +define internal i32 @test(%T* %p) { +; CHECK-LABEL: define internal i32 @test( +; CHECK: i32 %{{.*}}, i32 %{{.*}}) +entry: + %a.gep = getelementptr %T, %T* %p, i64 0, i32 3 + %b.gep = getelementptr %T, %T* %p, i64 0, i32 2 + %a = load i32, i32* %a.gep + %b = load i32, i32* %b.gep +; CHECK-NOT: load + %v = add i32 %a, %b + ret i32 %v +; CHECK: ret i32 } define i32 @caller() { - %V = call i32 @test( %QuadTy* @G ) ; [#uses=1] - ret i32 %V +; CHECK-LABEL: define i32 @caller( +entry: + %v = call i32 @test(%T* @G) +; CHECK: %[[B_GEP:.*]] = getelementptr %T, %T* @G, i64 0, i32 2 +; CHECK: %[[B:.*]] = load i32, i32* %[[B_GEP]] +; CHECK: %[[A_GEP:.*]] = getelementptr %T, %T* @G, i64 0, i32 3 +; CHECK: %[[A:.*]] = load i32, i32* %[[A_GEP]] +; CHECK: call i32 @test(i32 %[[B]], i32 %[[A]]) + ret i32 %v } - diff --git a/test/Transforms/ArgumentPromotion/attrs.ll b/test/Transforms/ArgumentPromotion/attrs.ll index 46128f93c240..29cef50fe802 100644 --- a/test/Transforms/ArgumentPromotion/attrs.ll +++ b/test/Transforms/ArgumentPromotion/attrs.ll @@ -1,25 +1,52 @@ -; RUN: opt < %s -argpromotion -S | grep zeroext +; RUN: opt < %s -argpromotion -S | FileCheck %s +; RUN: opt < %s -passes=argpromotion -S | FileCheck %s - %struct.ss = type { i32, i64 } +%struct.ss = type { i32, i64 } -define internal void @f(%struct.ss* byval %b, i32* byval %X, i32 %i) nounwind { +; Don't drop 'byval' on %X here. +define internal void @f(%struct.ss* byval %b, i32* byval %X, i32 %i) nounwind { +; CHECK-LABEL: define internal void @f( +; CHECK: i32 %[[B0:.*]], i64 %[[B1:.*]], i32* byval %X, i32 %i) entry: - %tmp = getelementptr %struct.ss, %struct.ss* %b, i32 0, i32 0 - %tmp1 = load i32, i32* %tmp, align 4 - %tmp2 = add i32 %tmp1, 1 - store i32 %tmp2, i32* %tmp, align 4 +; CHECK: %[[B:.*]] = alloca %struct.ss +; CHECK: %[[B_GEP0:.*]] = getelementptr %struct.ss, %struct.ss* %[[B]], i32 0, i32 0 +; CHECK: store i32 %[[B0]], i32* %[[B_GEP0]] +; CHECK: %[[B_GEP1:.*]] = getelementptr %struct.ss, %struct.ss* %[[B]], i32 0, i32 1 +; CHECK: store i64 %[[B1]], i64* %[[B_GEP1]] - store i32 0, i32* %X - ret void + %tmp = getelementptr %struct.ss, %struct.ss* %b, i32 0, i32 0 +; CHECK: %[[TMP:.*]] = getelementptr %struct.ss, %struct.ss* %[[B]], i32 0, i32 0 + %tmp1 = load i32, i32* %tmp, align 4 +; CHECK: %[[TMP1:.*]] = load i32, i32* %[[TMP]] + %tmp2 = add i32 %tmp1, 1 +; CHECK: %[[TMP2:.*]] = add i32 %[[TMP1]], 1 + store i32 %tmp2, i32* %tmp, align 4 +; CHECK: store i32 %[[TMP2]], i32* %[[TMP]] + + store i32 0, i32* %X +; CHECK: store i32 0, i32* %X + ret void } +; Also make sure we don't drop the call zeroext attribute. define i32 @test(i32* %X) { +; CHECK-LABEL: define i32 @test( entry: - %S = alloca %struct.ss ; <%struct.ss*> [#uses=4] - %tmp1 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 0 ; [#uses=1] - store i32 1, i32* %tmp1, align 8 - %tmp4 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 1 ; [#uses=1] - store i64 2, i64* %tmp4, align 4 - call void @f( %struct.ss* byval %S, i32* byval %X, i32 zeroext 0) - ret i32 0 + %S = alloca %struct.ss +; CHECK: %[[S:.*]] = alloca %struct.ss + %tmp1 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 0 + store i32 1, i32* %tmp1, align 8 +; CHECK: store i32 1 + %tmp4 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 1 + store i64 2, i64* %tmp4, align 4 +; CHECK: store i64 2 + + call void @f( %struct.ss* byval %S, i32* byval %X, i32 zeroext 0) +; CHECK: %[[S_GEP0:.*]] = getelementptr %struct.ss, %struct.ss* %[[S]], i32 0, i32 0 +; CHECK: %[[S0:.*]] = load i32, i32* %[[S_GEP0]] +; CHECK: %[[S_GEP1:.*]] = getelementptr %struct.ss, %struct.ss* %[[S]], i32 0, i32 1 +; CHECK: %[[S1:.*]] = load i64, i64* %[[S_GEP1]] +; CHECK: call void @f(i32 %[[S0]], i64 %[[S1]], i32* byval %X, i32 zeroext 0) + + ret i32 0 } diff --git a/test/Transforms/ArgumentPromotion/byval-2.ll b/test/Transforms/ArgumentPromotion/byval-2.ll index 6c0288f5f989..3e1fee8badd9 100644 --- a/test/Transforms/ArgumentPromotion/byval-2.ll +++ b/test/Transforms/ArgumentPromotion/byval-2.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -argpromotion -S | FileCheck %s +; RUN: opt < %s -passes=argpromotion -S | FileCheck %s ; Arg promotion eliminates the struct argument. ; FIXME: Should it eliminate the i32* argument? diff --git a/test/Transforms/ArgumentPromotion/byval.ll b/test/Transforms/ArgumentPromotion/byval.ll index b091b09a3597..58475fc89607 100644 --- a/test/Transforms/ArgumentPromotion/byval.ll +++ b/test/Transforms/ArgumentPromotion/byval.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -argpromotion -S | FileCheck %s +; RUN: opt < %s -passes=argpromotion -S | FileCheck %s target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" diff --git a/test/Transforms/ArgumentPromotion/callgraph-update.ll b/test/Transforms/ArgumentPromotion/callgraph-update.ll deleted file mode 100644 index 989043d7ea58..000000000000 --- a/test/Transforms/ArgumentPromotion/callgraph-update.ll +++ /dev/null @@ -1,23 +0,0 @@ -; RUN: opt < %s -argpromotion -simplifycfg -constmerge | llvm-dis -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "i386-apple-darwin10.0" - -%struct.VEC2 = type { double, double, double } -%struct.VERTEX = type { %struct.VEC2, %struct.VERTEX*, %struct.VERTEX* } -%struct.edge_rec = type { %struct.VERTEX*, %struct.edge_rec*, i32, i8* } - -declare %struct.edge_rec* @alloc_edge() nounwind ssp - -define i64 @build_delaunay(%struct.VERTEX* %tree, %struct.VERTEX* %extra) nounwind ssp { -entry: - br i1 undef, label %bb11, label %bb12 - -bb11: ; preds = %bb10 - %a = call %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=0] - ret i64 123 - -bb12: ; preds = %bb10 - %b = call %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=1] - %c = ptrtoint %struct.edge_rec* %b to i64 - ret i64 %c -} diff --git a/test/Transforms/ArgumentPromotion/chained.ll b/test/Transforms/ArgumentPromotion/chained.ll index 6ba2e8d48694..028c6c426e52 100644 --- a/test/Transforms/ArgumentPromotion/chained.ll +++ b/test/Transforms/ArgumentPromotion/chained.ll @@ -1,17 +1,27 @@ -; RUN: opt < %s -argpromotion -instcombine -S | not grep load -target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" +; RUN: opt < %s -argpromotion -S | FileCheck %s +; RUN: opt < %s -passes=argpromotion -S | FileCheck %s -@G1 = constant i32 0 ; [#uses=1] -@G2 = constant i32* @G1 ; [#uses=1] +@G1 = constant i32 0 +@G2 = constant i32* @G1 -define internal i32 @test(i32** %X) { - %Y = load i32*, i32** %X ; [#uses=1] - %X.upgrd.1 = load i32, i32* %Y ; [#uses=1] - ret i32 %X.upgrd.1 +define internal i32 @test(i32** %x) { +; CHECK-LABEL: define internal i32 @test( +; CHECK: i32 %{{.*}}) +entry: + %y = load i32*, i32** %x + %z = load i32, i32* %y +; CHECK-NOT: load + ret i32 %z +; CHECK: ret i32 } -define i32 @caller(i32** %P) { - %X = call i32 @test( i32** @G2 ) ; [#uses=1] - ret i32 %X +define i32 @caller() { +; CHECK-LABEL: define i32 @caller() +entry: + %x = call i32 @test(i32** @G2) +; CHECK: %[[Y:.*]] = load i32*, i32** @G2 +; CHECK: %[[Z:.*]] = load i32, i32* %[[Y]] +; CHECK: call i32 @test(i32 %[[Z]]) + ret i32 %x } diff --git a/test/Transforms/ArgumentPromotion/control-flow.ll b/test/Transforms/ArgumentPromotion/control-flow.ll index cdff36eb83c0..c3fe0c00e877 100644 --- a/test/Transforms/ArgumentPromotion/control-flow.ll +++ b/test/Transforms/ArgumentPromotion/control-flow.ll @@ -1,19 +1,27 @@ -; RUN: opt < %s -argpromotion -S | \ -; RUN: not grep "load i32* null" +; RUN: opt < %s -argpromotion -S | FileCheck %s +; RUN: opt < %s -passes=argpromotion -S | FileCheck %s +; Don't promote around control flow. define internal i32 @callee(i1 %C, i32* %P) { - br i1 %C, label %T, label %F +; CHECK-LABEL: define internal i32 @callee( +; CHECK: i1 %C, i32* %P) +entry: + br i1 %C, label %T, label %F -T: ; preds = %0 - ret i32 17 +T: + ret i32 17 -F: ; preds = %0 - %X = load i32, i32* %P ; [#uses=1] - ret i32 %X +F: + %X = load i32, i32* %P + ret i32 %X } define i32 @foo() { - %X = call i32 @callee( i1 true, i32* null ) ; [#uses=1] - ret i32 %X +; CHECK-LABEL: define i32 @foo( +entry: +; CHECK-NOT: load i32, i32* null + %X = call i32 @callee(i1 true, i32* null) +; CHECK: call i32 @callee(i1 true, i32* null) + ret i32 %X } diff --git a/test/Transforms/ArgumentPromotion/control-flow2.ll b/test/Transforms/ArgumentPromotion/control-flow2.ll index 7413f46a860f..b75a32ddb331 100644 --- a/test/Transforms/ArgumentPromotion/control-flow2.ll +++ b/test/Transforms/ArgumentPromotion/control-flow2.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -argpromotion -S | FileCheck %s +; RUN: opt < %s -passes=argpromotion -S | FileCheck %s ; CHECK: load i32, i32* %A target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" diff --git a/test/Transforms/ArgumentPromotion/crash.ll b/test/Transforms/ArgumentPromotion/crash.ll index d3f412da14d9..d46a48101e78 100644 --- a/test/Transforms/ArgumentPromotion/crash.ll +++ b/test/Transforms/ArgumentPromotion/crash.ll @@ -1,61 +1,73 @@ -; RUN: opt -inline -argpromotion < %s -; rdar://7879828 +; RUN: opt -S < %s -inline -argpromotion | FileCheck %s +; RUN: opt -S < %s -passes=inline,argpromotion | FileCheck %s -define void @foo() personality i32 (...)* @__gxx_personality_v0 { - invoke void @foo2() - to label %if.end432 unwind label %for.end520 +%S = type { %S* } -if.end432: +; Inlining should nuke the invoke (and any inlined calls) here even with +; argument promotion running along with it. +define void @zot() personality i32 (...)* @wibble { +; CHECK-LABEL: define void @zot() personality i32 (...)* @wibble +; CHECK-NOT: call +; CHECK-NOT: invoke +bb: + invoke void @hoge() + to label %bb1 unwind label %bb2 + +bb1: unreachable -for.end520: - %exn = landingpad {i8*, i32} - cleanup +bb2: + %tmp = landingpad { i8*, i32 } + cleanup unreachable } -define internal void @foo2() ssp { - %call7 = call fastcc i8* @foo3(i1 (i8*)* @foo4) - %call58 = call fastcc i8* @foo3(i1 (i8*)* @foo5) +define internal void @hoge() { +bb: + %tmp = call fastcc i8* @spam(i1 (i8*)* @eggs) + %tmp1 = call fastcc i8* @spam(i1 (i8*)* @barney) unreachable } -define internal fastcc i8* @foo3(i1 (i8*)* %Pred) { -entry: +define internal fastcc i8* @spam(i1 (i8*)* %arg) { +bb: unreachable } -define internal i1 @foo4(i8* %O) nounwind { -entry: - %call = call zeroext i1 @foo5(i8* %O) ; [#uses=0] +define internal i1 @eggs(i8* %arg) { +bb: + %tmp = call zeroext i1 @barney(i8* %arg) unreachable } -define internal i1 @foo5(i8* %O) nounwind { -entry: +define internal i1 @barney(i8* %arg) { +bb: ret i1 undef } +define i32 @test_inf_promote_caller(i32 %arg) { +; CHECK-LABEL: define i32 @test_inf_promote_caller( +bb: + %tmp = alloca %S + %tmp1 = alloca %S + %tmp2 = call i32 @test_inf_promote_callee(%S* %tmp, %S* %tmp1) +; CHECK: call i32 @test_inf_promote_callee(%S* %{{.*}}, %S* %{{.*}}) -; PR8932 - infinite promotion. -%0 = type { %0* } - -define i32 @test2(i32 %a) { -init: - %0 = alloca %0 - %1 = alloca %0 - %2 = call i32 @"clay_assign(Chain, Chain)"(%0* %0, %0* %1) ret i32 0 } -define internal i32 @"clay_assign(Chain, Chain)"(%0* %c, %0* %d) { -init: - %0 = getelementptr %0, %0* %d, i32 0, i32 0 - %1 = load %0*, %0** %0 - %2 = getelementptr %0, %0* %c, i32 0, i32 0 - %3 = load %0*, %0** %2 - %4 = call i32 @"clay_assign(Chain, Chain)"(%0* %3, %0* %1) +define internal i32 @test_inf_promote_callee(%S* %arg, %S* %arg1) { +; CHECK-LABEL: define internal i32 @test_inf_promote_callee( +; CHECK: %S* %{{.*}}, %S* %{{.*}}) +bb: + %tmp = getelementptr %S, %S* %arg1, i32 0, i32 0 + %tmp2 = load %S*, %S** %tmp + %tmp3 = getelementptr %S, %S* %arg, i32 0, i32 0 + %tmp4 = load %S*, %S** %tmp3 + %tmp5 = call i32 @test_inf_promote_callee(%S* %tmp4, %S* %tmp2) +; CHECK: call i32 @test_inf_promote_callee(%S* %{{.*}}, %S* %{{.*}}) + ret i32 0 } -declare i32 @__gxx_personality_v0(...) +declare i32 @wibble(...) diff --git a/test/Transforms/ArgumentPromotion/dbg.ll b/test/Transforms/ArgumentPromotion/dbg.ll index 3d353db105fd..61b7c1843e48 100644 --- a/test/Transforms/ArgumentPromotion/dbg.ll +++ b/test/Transforms/ArgumentPromotion/dbg.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -argpromotion -S | FileCheck %s +; RUN: opt < %s -passes=argpromotion -S | FileCheck %s declare void @sink(i32) @@ -23,6 +24,6 @@ define void @caller(i32** %Y) { !0 = !{i32 2, !"Debug Info Version", i32 3} !1 = !DILocation(line: 8, scope: !2) -!2 = distinct !DISubprogram(name: "test", line: 3, isLocal: true, isDefinition: true, virtualIndex: 6, flags: DIFlagPrototyped, isOptimized: false, unit: !3, scopeLine: 3, scope: null) +!2 = distinct !DISubprogram(name: "test", file: !5, line: 3, isLocal: true, isDefinition: true, virtualIndex: 6, flags: DIFlagPrototyped, isOptimized: false, unit: !3, scopeLine: 3, scope: null) !3 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, producer: "clang version 3.5.0 ", isOptimized: false, emissionKind: LineTablesOnly, file: !5) !5 = !DIFile(filename: "test.c", directory: "") diff --git a/test/Transforms/ArgumentPromotion/fp80.ll b/test/Transforms/ArgumentPromotion/fp80.ll index 84ef603de82c..bd780fa21aeb 100644 --- a/test/Transforms/ArgumentPromotion/fp80.ll +++ b/test/Transforms/ArgumentPromotion/fp80.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -argpromotion -S | FileCheck %s +; RUN: opt < %s -passes=argpromotion -S | FileCheck %s target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" diff --git a/test/Transforms/ArgumentPromotion/inalloca.ll b/test/Transforms/ArgumentPromotion/inalloca.ll index 5bf57c8ff465..7ea3b4e42777 100644 --- a/test/Transforms/ArgumentPromotion/inalloca.ll +++ b/test/Transforms/ArgumentPromotion/inalloca.ll @@ -1,4 +1,5 @@ ; RUN: opt %s -argpromotion -sroa -S | FileCheck %s +; RUN: opt %s -passes='argpromotion,function(sroa)' -S | FileCheck %s target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" diff --git a/test/Transforms/ArgumentPromotion/pr27568.ll b/test/Transforms/ArgumentPromotion/pr27568.ll index 648317aee0da..1496780748da 100644 --- a/test/Transforms/ArgumentPromotion/pr27568.ll +++ b/test/Transforms/ArgumentPromotion/pr27568.ll @@ -1,4 +1,5 @@ ; RUN: opt -S -argpromotion < %s | FileCheck %s +; RUN: opt -S -passes=argpromotion < %s | FileCheck %s target triple = "x86_64-pc-windows-msvc" define internal void @callee(i8*) { diff --git a/test/Transforms/ArgumentPromotion/profile.ll b/test/Transforms/ArgumentPromotion/profile.ll new file mode 100644 index 000000000000..f667f9ea2c2a --- /dev/null +++ b/test/Transforms/ArgumentPromotion/profile.ll @@ -0,0 +1,23 @@ +; RUN: opt -argpromotion -mem2reg -S < %s | FileCheck %s +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" + +; Checks if !prof metadata is corret in deadargelim. + +define void @caller() #0 { + %x = alloca i32 + store i32 42, i32* %x + call void @promote_i32_ptr(i32* %x), !prof !0 +; CHECK: call void @promote_i32_ptr(i32 42), !prof ![[PROF:[0-9]]] + ret void +} + +define internal void @promote_i32_ptr(i32* %xp) { + %x = load i32, i32* %xp + call void @use_i32(i32 %x) + ret void +} + +declare void @use_i32(i32) + +; CHECK: ![[PROF]] = !{!"branch_weights", i32 30} +!0 = !{!"branch_weights", i32 30} diff --git a/test/Transforms/ArgumentPromotion/reserve-tbaa.ll b/test/Transforms/ArgumentPromotion/reserve-tbaa.ll index 3c8ed79eeb29..3a3aa44b2a98 100644 --- a/test/Transforms/ArgumentPromotion/reserve-tbaa.ll +++ b/test/Transforms/ArgumentPromotion/reserve-tbaa.ll @@ -1,4 +1,5 @@ -; RUN: opt < %s -argpromotion -S +; RUN: opt < %s -argpromotion -S | FileCheck %s +; RUN: opt < %s -passes=argpromotion -S | FileCheck %s ; PR17906 ; When we promote two arguments in a single function with different types, diff --git a/test/Transforms/ArgumentPromotion/sret.ll b/test/Transforms/ArgumentPromotion/sret.ll index 8e5521f48d10..55fc036f1775 100644 --- a/test/Transforms/ArgumentPromotion/sret.ll +++ b/test/Transforms/ArgumentPromotion/sret.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -argpromotion -S | FileCheck %s +; RUN: opt < %s -passes=argpromotion -S | FileCheck %s target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64-pc-windows-msvc" diff --git a/test/Transforms/ArgumentPromotion/tail.ll b/test/Transforms/ArgumentPromotion/tail.ll index 2ea387cd2645..93de60afe915 100644 --- a/test/Transforms/ArgumentPromotion/tail.ll +++ b/test/Transforms/ArgumentPromotion/tail.ll @@ -1,4 +1,5 @@ ; RUN: opt %s -argpromotion -S -o - | FileCheck %s +; RUN: opt %s -passes=argpromotion -S -o - | FileCheck %s ; PR14710 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" diff --git a/test/Transforms/ArgumentPromotion/variadic.ll b/test/Transforms/ArgumentPromotion/variadic.ll index 0e03882d3b20..034f853883fd 100644 --- a/test/Transforms/ArgumentPromotion/variadic.ll +++ b/test/Transforms/ArgumentPromotion/variadic.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -argpromotion -S | FileCheck %s +; RUN: opt < %s -passes=argpromotion -S | FileCheck %s ; Unused arguments from variadic functions cannot be eliminated as that changes ; their classiciation according to the SysV amd64 ABI. Clang and other frontends diff --git a/test/Transforms/AtomicExpand/SPARC/libcalls.ll b/test/Transforms/AtomicExpand/SPARC/libcalls.ll index afab7a39b278..fc6aade8708a 100644 --- a/test/Transforms/AtomicExpand/SPARC/libcalls.ll +++ b/test/Transforms/AtomicExpand/SPARC/libcalls.ll @@ -43,11 +43,11 @@ define i16 @test_exchange_i16(i16* %arg, i16 %val) { ; CHECK: %1 = bitcast i16* %arg to i8* ; CHECK: %2 = alloca i16, align 2 ; CHECK: %3 = bitcast i16* %2 to i8* -; CHECK: call void @llvm.lifetime.start(i64 2, i8* %3) +; CHECK: call void @llvm.lifetime.start.p0i8(i64 2, i8* %3) ; CHECK: store i16 %old, i16* %2, align 2 ; CHECK: %4 = call zeroext i1 @__atomic_compare_exchange_2(i8* %1, i8* %3, i16 %new, i32 5, i32 0) ; CHECK: %5 = load i16, i16* %2, align 2 -; CHECK: call void @llvm.lifetime.end(i64 2, i8* %3) +; CHECK: call void @llvm.lifetime.end.p0i8(i64 2, i8* %3) ; CHECK: %6 = insertvalue { i16, i1 } undef, i16 %5, 0 ; CHECK: %7 = insertvalue { i16, i1 } %6, i1 %4, 1 ; CHECK: %ret = extractvalue { i16, i1 } %7, 0 @@ -76,10 +76,10 @@ define i16 @test_add_i16(i16* %arg, i16 %val) { ; CHECK: %1 = bitcast i128* %arg to i8* ; CHECK: %2 = alloca i128, align 8 ; CHECK: %3 = bitcast i128* %2 to i8* -; CHECK: call void @llvm.lifetime.start(i64 16, i8* %3) +; CHECK: call void @llvm.lifetime.start.p0i8(i64 16, i8* %3) ; CHECK: call void @__atomic_load(i32 16, i8* %1, i8* %3, i32 5) ; CHECK: %4 = load i128, i128* %2, align 8 -; CHECK: call void @llvm.lifetime.end(i64 16, i8* %3) +; CHECK: call void @llvm.lifetime.end.p0i8(i64 16, i8* %3) ; CHECK: ret i128 %4 define i128 @test_load_i128(i128* %arg) { %ret = load atomic i128, i128* %arg seq_cst, align 16 @@ -90,10 +90,10 @@ define i128 @test_load_i128(i128* %arg) { ; CHECK: %1 = bitcast i128* %arg to i8* ; CHECK: %2 = alloca i128, align 8 ; CHECK: %3 = bitcast i128* %2 to i8* -; CHECK: call void @llvm.lifetime.start(i64 16, i8* %3) +; CHECK: call void @llvm.lifetime.start.p0i8(i64 16, i8* %3) ; CHECK: store i128 %val, i128* %2, align 8 ; CHECK: call void @__atomic_store(i32 16, i8* %1, i8* %3, i32 5) -; CHECK: call void @llvm.lifetime.end(i64 16, i8* %3) +; CHECK: call void @llvm.lifetime.end.p0i8(i64 16, i8* %3) ; CHECK: ret void define void @test_store_i128(i128* %arg, i128 %val) { store atomic i128 %val, i128* %arg seq_cst, align 16 @@ -104,15 +104,15 @@ define void @test_store_i128(i128* %arg, i128 %val) { ; CHECK: %1 = bitcast i128* %arg to i8* ; CHECK: %2 = alloca i128, align 8 ; CHECK: %3 = bitcast i128* %2 to i8* -; CHECK: call void @llvm.lifetime.start(i64 16, i8* %3) +; CHECK: call void @llvm.lifetime.start.p0i8(i64 16, i8* %3) ; CHECK: store i128 %val, i128* %2, align 8 ; CHECK: %4 = alloca i128, align 8 ; CHECK: %5 = bitcast i128* %4 to i8* -; CHECK: call void @llvm.lifetime.start(i64 16, i8* %5) +; CHECK: call void @llvm.lifetime.start.p0i8(i64 16, i8* %5) ; CHECK: call void @__atomic_exchange(i32 16, i8* %1, i8* %3, i8* %5, i32 5) -; CHECK: call void @llvm.lifetime.end(i64 16, i8* %3) +; CHECK: call void @llvm.lifetime.end.p0i8(i64 16, i8* %3) ; CHECK: %6 = load i128, i128* %4, align 8 -; CHECK: call void @llvm.lifetime.end(i64 16, i8* %5) +; CHECK: call void @llvm.lifetime.end.p0i8(i64 16, i8* %5) ; CHECK: ret i128 %6 define i128 @test_exchange_i128(i128* %arg, i128 %val) { %ret = atomicrmw xchg i128* %arg, i128 %val seq_cst @@ -123,16 +123,16 @@ define i128 @test_exchange_i128(i128* %arg, i128 %val) { ; CHECK: %1 = bitcast i128* %arg to i8* ; CHECK: %2 = alloca i128, align 8 ; CHECK: %3 = bitcast i128* %2 to i8* -; CHECK: call void @llvm.lifetime.start(i64 16, i8* %3) +; CHECK: call void @llvm.lifetime.start.p0i8(i64 16, i8* %3) ; CHECK: store i128 %old, i128* %2, align 8 ; CHECK: %4 = alloca i128, align 8 ; CHECK: %5 = bitcast i128* %4 to i8* -; CHECK: call void @llvm.lifetime.start(i64 16, i8* %5) +; CHECK: call void @llvm.lifetime.start.p0i8(i64 16, i8* %5) ; CHECK: store i128 %new, i128* %4, align 8 ; CHECK: %6 = call zeroext i1 @__atomic_compare_exchange(i32 16, i8* %1, i8* %3, i8* %5, i32 5, i32 0) -; CHECK: call void @llvm.lifetime.end(i64 16, i8* %5) +; CHECK: call void @llvm.lifetime.end.p0i8(i64 16, i8* %5) ; CHECK: %7 = load i128, i128* %2, align 8 -; CHECK: call void @llvm.lifetime.end(i64 16, i8* %3) +; CHECK: call void @llvm.lifetime.end.p0i8(i64 16, i8* %3) ; CHECK: %8 = insertvalue { i128, i1 } undef, i128 %7, 0 ; CHECK: %9 = insertvalue { i128, i1 } %8, i1 %6, 1 ; CHECK: %ret = extractvalue { i128, i1 } %9, 0 @@ -157,15 +157,15 @@ define i128 @test_cmpxchg_i128(i128* %arg, i128 %old, i128 %new) { ; CHECK: %new = add i128 %loaded, %val ; CHECK: %4 = bitcast i128* %arg to i8* ; CHECK: %5 = bitcast i128* %1 to i8* -; CHECK: call void @llvm.lifetime.start(i64 16, i8* %5) +; CHECK: call void @llvm.lifetime.start.p0i8(i64 16, i8* %5) ; CHECK: store i128 %loaded, i128* %1, align 8 ; CHECK: %6 = bitcast i128* %2 to i8* -; CHECK: call void @llvm.lifetime.start(i64 16, i8* %6) +; CHECK: call void @llvm.lifetime.start.p0i8(i64 16, i8* %6) ; CHECK: store i128 %new, i128* %2, align 8 ; CHECK: %7 = call zeroext i1 @__atomic_compare_exchange(i32 16, i8* %4, i8* %5, i8* %6, i32 5, i32 5) -; CHECK: call void @llvm.lifetime.end(i64 16, i8* %6) +; CHECK: call void @llvm.lifetime.end.p0i8(i64 16, i8* %6) ; CHECK: %8 = load i128, i128* %1, align 8 -; CHECK: call void @llvm.lifetime.end(i64 16, i8* %5) +; CHECK: call void @llvm.lifetime.end.p0i8(i64 16, i8* %5) ; CHECK: %9 = insertvalue { i128, i1 } undef, i128 %8, 0 ; CHECK: %10 = insertvalue { i128, i1 } %9, i1 %7, 1 ; CHECK: %success = extractvalue { i128, i1 } %10, 1 @@ -204,12 +204,12 @@ define void @test_store_double(double* %arg, double %val) { ; CHECK: %1 = bitcast i16** %arg to i8* ; CHECK: %2 = alloca i16*, align 4 ; CHECK: %3 = bitcast i16** %2 to i8* -; CHECK: call void @llvm.lifetime.start(i64 4, i8* %3) +; CHECK: call void @llvm.lifetime.start.p0i8(i64 4, i8* %3) ; CHECK: store i16* %old, i16** %2, align 4 ; CHECK: %4 = ptrtoint i16* %new to i32 ; CHECK: %5 = call zeroext i1 @__atomic_compare_exchange_4(i8* %1, i8* %3, i32 %4, i32 5, i32 2) ; CHECK: %6 = load i16*, i16** %2, align 4 -; CHECK: call void @llvm.lifetime.end(i64 4, i8* %3) +; CHECK: call void @llvm.lifetime.end.p0i8(i64 4, i8* %3) ; CHECK: %7 = insertvalue { i16*, i1 } undef, i16* %6, 0 ; CHECK: %8 = insertvalue { i16*, i1 } %7, i1 %5, 1 ; CHECK: %ret = extractvalue { i16*, i1 } %8, 0 @@ -227,10 +227,10 @@ define i16* @test_cmpxchg_ptr(i16** %arg, i16* %old, i16* %new) { ; CHECK: %1 = bitcast fp128* %arg to i8* ; CHECK: %2 = alloca fp128, align 8 ; CHECK: %3 = bitcast fp128* %2 to i8* -; CHECK: call void @llvm.lifetime.start(i64 16, i8* %3) +; CHECK: call void @llvm.lifetime.start.p0i8(i64 16, i8* %3) ; CHECK: store fp128 %val, fp128* %2, align 8 ; CHECK: call void @__atomic_store(i32 16, i8* %1, i8* %3, i32 5) -; CHECK: call void @llvm.lifetime.end(i64 16, i8* %3) +; CHECK: call void @llvm.lifetime.end.p0i8(i64 16, i8* %3) ; CHECK: ret void define void @test_store_fp128(fp128* %arg, fp128 %val) { store atomic fp128 %val, fp128* %arg seq_cst, align 16 diff --git a/test/Transforms/BBVectorize/X86/loop1.ll b/test/Transforms/BBVectorize/X86/loop1.ll index 551fbd73eb27..a533713609a7 100644 --- a/test/Transforms/BBVectorize/X86/loop1.ll +++ b/test/Transforms/BBVectorize/X86/loop1.ll @@ -1,7 +1,7 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -bb-vectorize -bb-vectorize-req-chain-depth=3 -instcombine -gvn -S | FileCheck %s -; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -basicaa -loop-unroll -unroll-threshold=45 -unroll-allow-partial -bb-vectorize -bb-vectorize-req-chain-depth=3 -instcombine -gvn -S | FileCheck %s -check-prefix=CHECK-UNRL +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -basicaa -loop-unroll -unroll-partial-threshold=45 -unroll-allow-partial -bb-vectorize -bb-vectorize-req-chain-depth=3 -instcombine -gvn -S | FileCheck %s -check-prefix=CHECK-UNRL ; The second check covers the use of alias analysis (with loop unrolling). define void @test1(double* noalias %out, double* noalias %in1, double* noalias %in2) nounwind uwtable { diff --git a/test/Transforms/BBVectorize/X86/wr-aliases.ll b/test/Transforms/BBVectorize/X86/wr-aliases.ll index a6ea27fc3ecb..e34414988f32 100644 --- a/test/Transforms/BBVectorize/X86/wr-aliases.ll +++ b/test/Transforms/BBVectorize/X86/wr-aliases.ll @@ -14,7 +14,7 @@ declare fastcc void @_ZL12printQBezier7QBezier(%class.QBezier.15* byval nocaptur declare void @llvm.lifetime.start(i64, i8* nocapture) #0 ; Function Attrs: nounwind -declare void @llvm.lifetime.end(i64, i8* nocapture) #0 +declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) #0 define void @main_arrayctor.cont([10 x %class.QBezier.15]* %beziers, %class.QBezier.15* %agg.tmp.i, %class.QBezier.15* %agg.tmp55.i, %class.QBezier.15* %agg.tmp56.i) { newFuncRoot: @@ -134,9 +134,9 @@ arrayctor.cont: ; preds = %newFuncRoot call fastcc void @_ZL12printQBezier7QBezier(%class.QBezier.15* byval align 8 %agg.tmp55.i) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %v2, i8* %v3, i64 64, i32 8, i1 false) call fastcc void @_ZL12printQBezier7QBezier(%class.QBezier.15* byval align 8 %agg.tmp56.i) - call void @llvm.lifetime.end(i64 64, i8* %v0) - call void @llvm.lifetime.end(i64 64, i8* %v1) - call void @llvm.lifetime.end(i64 64, i8* %v2) + call void @llvm.lifetime.end.p0i8(i64 64, i8* %v0) + call void @llvm.lifetime.end.p0i8(i64 64, i8* %v1) + call void @llvm.lifetime.end.p0i8(i64 64, i8* %v2) br label %arrayctor.cont.ret.exitStub } diff --git a/test/Transforms/BBVectorize/loop1.ll b/test/Transforms/BBVectorize/loop1.ll index 7e7b603116fc..8ff5953cf46a 100644 --- a/test/Transforms/BBVectorize/loop1.ll +++ b/test/Transforms/BBVectorize/loop1.ll @@ -1,7 +1,7 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; RUN: opt < %s -bb-vectorize -bb-vectorize-req-chain-depth=3 -bb-vectorize-ignore-target-info -instcombine -gvn -S | FileCheck %s -; RUN: opt < %s -dont-improve-non-negative-phi-bits=false -basicaa -loop-unroll -unroll-threshold=45 -unroll-allow-partial -bb-vectorize -bb-vectorize-req-chain-depth=3 -bb-vectorize-ignore-target-info -instcombine -gvn -S | FileCheck %s -check-prefix=CHECK-UNRL +; RUN: opt < %s -dont-improve-non-negative-phi-bits=false -basicaa -loop-unroll -unroll-threshold=45 -unroll-partial-threshold=45 -unroll-allow-partial -bb-vectorize -bb-vectorize-req-chain-depth=3 -bb-vectorize-ignore-target-info -instcombine -gvn -S | FileCheck %s -check-prefix=CHECK-UNRL ; The second check covers the use of alias analysis (with loop unrolling). define void @test1(double* noalias %out, double* noalias %in1, double* noalias %in2) nounwind uwtable { diff --git a/test/Transforms/BDCE/basic.ll b/test/Transforms/BDCE/basic.ll index 6e748c69a16e..6132c5d797fc 100644 --- a/test/Transforms/BDCE/basic.ll +++ b/test/Transforms/BDCE/basic.ll @@ -135,6 +135,44 @@ entry: ; Function Attrs: nounwind readnone declare i32 @llvm.bswap.i32(i32) #0 +; Function Attrs: nounwind readnone +define signext i32 @tim(i32 signext %x) #0 { +entry: + %call = tail call signext i32 @foo(i32 signext 5) #0 + %and = and i32 %call, 536870912 + %or = or i32 %and, %x + %call1 = tail call signext i32 @foo(i32 signext 3) #0 + %and2 = and i32 %call1, 1073741824 + %or3 = or i32 %or, %and2 + %call4 = tail call signext i32 @foo(i32 signext 2) #0 + %and5 = and i32 %call4, 16 + %or6 = or i32 %or3, %and5 + %call7 = tail call signext i32 @foo(i32 signext 1) #0 + %and8 = and i32 %call7, 32 + %or9 = or i32 %or6, %and8 + %call10 = tail call signext i32 @foo(i32 signext 0) #0 + %and11 = and i32 %call10, 64 + %or12 = or i32 %or9, %and11 + %call13 = tail call signext i32 @foo(i32 signext 4) #0 + %and14 = and i32 %call13, 128 + %or15 = or i32 %or12, %and14 + %bs = tail call i32 @llvm.bitreverse.i32(i32 %or15) #0 + %shr = ashr i32 %bs, 4 + ret i32 %shr + +; CHECK-LABEL: @tim +; CHECK-NOT: tail call signext i32 @foo(i32 signext 5) +; CHECK-NOT: tail call signext i32 @foo(i32 signext 3) +; CHECK: tail call signext i32 @foo(i32 signext 2) +; CHECK: tail call signext i32 @foo(i32 signext 1) +; CHECK: tail call signext i32 @foo(i32 signext 0) +; CHECK: tail call signext i32 @foo(i32 signext 4) +; CHECK: ret i32 +} + +; Function Attrs: nounwind readnone +declare i32 @llvm.bitreverse.i32(i32) #0 + ; Function Attrs: nounwind readnone define signext i32 @tar2(i32 signext %x) #0 { entry: diff --git a/test/Transforms/CodeGenPrepare/AMDGPU/no-sink-addrspacecast.ll b/test/Transforms/CodeGenPrepare/AMDGPU/no-sink-addrspacecast.ll index 6cec253bbf9b..2bcb3a9d1e3d 100644 --- a/test/Transforms/CodeGenPrepare/AMDGPU/no-sink-addrspacecast.ll +++ b/test/Transforms/CodeGenPrepare/AMDGPU/no-sink-addrspacecast.ll @@ -5,7 +5,7 @@ ; ASC-NOT: ptrtoint ; ASC-NOT: inttoptr -define void @test_sink_ptrtoint_asc(float addrspace(1)* nocapture %arg, float addrspace(1)* nocapture readonly %arg1, float addrspace(3)* %arg2) #0 { +define amdgpu_kernel void @test_sink_ptrtoint_asc(float addrspace(1)* nocapture %arg, float addrspace(1)* nocapture readonly %arg1, float addrspace(3)* %arg2) #0 { bb: %tmp = getelementptr inbounds float, float addrspace(3)* %arg2, i32 16 %tmp2 = tail call i32 @llvm.amdgcn.workitem.id.x() #1 diff --git a/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-special-cases.ll b/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-special-cases.ll new file mode 100644 index 000000000000..dfa81b54cc3d --- /dev/null +++ b/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-special-cases.ll @@ -0,0 +1,216 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt -S -codegenprepare < %s | FileCheck %s + +target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64" +target triple = "nvptx64-nvidia-cuda" + +; No bypassing should be done in apparently unsuitable cases. +define void @Test_no_bypassing(i32 %a, i64 %b, i64* %retptr) { +; CHECK-LABEL: @Test_no_bypassing( +; CHECK-NEXT: [[A_1:%.*]] = zext i32 [[A:%.*]] to i64 +; CHECK-NEXT: [[A_2:%.*]] = sub i64 -1, [[A_1]] +; CHECK-NEXT: [[RES:%.*]] = srem i64 [[A_2]], [[B:%.*]] +; CHECK-NEXT: store i64 [[RES]], i64* [[RETPTR:%.*]] +; CHECK-NEXT: ret void +; + %a.1 = zext i32 %a to i64 + ; %a.2 is always negative so the division cannot be bypassed. + %a.2 = sub i64 -1, %a.1 + %res = srem i64 %a.2, %b + store i64 %res, i64* %retptr + ret void +} + +; No OR instruction is needed if one of the operands (divisor) is known +; to fit into 32 bits. +define void @Test_check_one_operand(i64 %a, i32 %b, i64* %retptr) { +; CHECK-LABEL: @Test_check_one_operand( +; CHECK-NEXT: [[B_1:%.*]] = zext i32 [[B:%.*]] to i64 +; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[A:%.*]], -4294967296 +; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 0 +; CHECK-NEXT: br i1 [[TMP2]], label [[TMP3:%.*]], label [[TMP8:%.*]] +; CHECK: [[TMP4:%.*]] = trunc i64 [[B_1]] to i32 +; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[A]] to i32 +; CHECK-NEXT: [[TMP6:%.*]] = udiv i32 [[TMP5]], [[TMP4]] +; CHECK-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 +; CHECK-NEXT: br label [[TMP10:%.*]] +; CHECK: [[TMP9:%.*]] = sdiv i64 [[A]], [[B_1]] +; CHECK-NEXT: br label [[TMP10]] +; CHECK: [[TMP11:%.*]] = phi i64 [ [[TMP7]], [[TMP3]] ], [ [[TMP9]], [[TMP8]] ] +; CHECK-NEXT: store i64 [[TMP11]], i64* [[RETPTR:%.*]] +; CHECK-NEXT: ret void +; + %b.1 = zext i32 %b to i64 + %res = sdiv i64 %a, %b.1 + store i64 %res, i64* %retptr + ret void +} + +; If both operands are known to fit into 32 bits, then replace the division +; in-place without CFG modification. +define void @Test_check_none(i64 %a, i32 %b, i64* %retptr) { +; CHECK-LABEL: @Test_check_none( +; CHECK-NEXT: [[A_1:%.*]] = and i64 [[A:%.*]], 4294967295 +; CHECK-NEXT: [[B_1:%.*]] = zext i32 [[B:%.*]] to i64 +; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[A_1]] to i32 +; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[B_1]] to i32 +; CHECK-NEXT: [[TMP3:%.*]] = udiv i32 [[TMP1]], [[TMP2]] +; CHECK-NEXT: [[TMP4:%.*]] = zext i32 [[TMP3]] to i64 +; CHECK-NEXT: store i64 [[TMP4]], i64* [[RETPTR:%.*]] +; CHECK-NEXT: ret void +; + %a.1 = and i64 %a, 4294967295 + %b.1 = zext i32 %b to i64 + %res = udiv i64 %a.1, %b.1 + store i64 %res, i64* %retptr + ret void +} + +; In case of unsigned long division with a short dividend, +; the long division is not needed any more. +define void @Test_special_case(i32 %a, i64 %b, i64* %retptr) { +; CHECK-LABEL: @Test_special_case( +; CHECK-NEXT: [[A_1:%.*]] = zext i32 [[A:%.*]] to i64 +; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i64 [[A_1]], [[B:%.*]] +; CHECK-NEXT: br i1 [[TMP1]], label [[TMP2:%.*]], label [[TMP9:%.*]] +; CHECK: [[TMP3:%.*]] = trunc i64 [[B]] to i32 +; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[A_1]] to i32 +; CHECK-NEXT: [[TMP5:%.*]] = udiv i32 [[TMP4]], [[TMP3]] +; CHECK-NEXT: [[TMP6:%.*]] = urem i32 [[TMP4]], [[TMP3]] +; CHECK-NEXT: [[TMP7:%.*]] = zext i32 [[TMP5]] to i64 +; CHECK-NEXT: [[TMP8:%.*]] = zext i32 [[TMP6]] to i64 +; CHECK-NEXT: br label [[TMP9]] +; CHECK: [[TMP10:%.*]] = phi i64 [ [[TMP7]], [[TMP2]] ], [ 0, [[TMP0:%.*]] ] +; CHECK-NEXT: [[TMP11:%.*]] = phi i64 [ [[TMP8]], [[TMP2]] ], [ [[A_1]], [[TMP0]] ] +; CHECK-NEXT: [[RES:%.*]] = add i64 [[TMP10]], [[TMP11]] +; CHECK-NEXT: store i64 [[RES]], i64* [[RETPTR:%.*]] +; CHECK-NEXT: ret void +; + %a.1 = zext i32 %a to i64 + %div = udiv i64 %a.1, %b + %rem = urem i64 %a.1, %b + %res = add i64 %div, %rem + store i64 %res, i64* %retptr + ret void +} + + +; Do not bypass a division if one of the operands looks like a hash value. +define void @Test_dont_bypass_xor(i64 %a, i64 %b, i64 %l, i64* %retptr) { +; CHECK-LABEL: @Test_dont_bypass_xor( +; CHECK-NEXT: [[C:%.*]] = xor i64 [[A:%.*]], [[B:%.*]] +; CHECK-NEXT: [[RES:%.*]] = udiv i64 [[C]], [[L:%.*]] +; CHECK-NEXT: store i64 [[RES]], i64* [[RETPTR:%.*]] +; CHECK-NEXT: ret void +; + %c = xor i64 %a, %b + %res = udiv i64 %c, %l + store i64 %res, i64* %retptr + ret void +} + +define void @Test_dont_bypass_phi_xor(i64 %a, i64 %b, i64 %l, i64* %retptr) { +; CHECK-LABEL: @Test_dont_bypass_phi_xor( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[B:%.*]], 0 +; CHECK-NEXT: br i1 [[CMP]], label [[MERGE:%.*]], label [[XORPATH:%.*]] +; CHECK: xorpath: +; CHECK-NEXT: [[C:%.*]] = xor i64 [[A:%.*]], [[B]] +; CHECK-NEXT: br label [[MERGE]] +; CHECK: merge: +; CHECK-NEXT: [[E:%.*]] = phi i64 [ undef, [[ENTRY:%.*]] ], [ [[C]], [[XORPATH]] ] +; CHECK-NEXT: [[RES:%.*]] = sdiv i64 [[E]], [[L:%.*]] +; CHECK-NEXT: store i64 [[RES]], i64* [[RETPTR:%.*]] +; CHECK-NEXT: ret void +; +entry: + %cmp = icmp eq i64 %b, 0 + br i1 %cmp, label %merge, label %xorpath + +xorpath: + %c = xor i64 %a, %b + br label %merge + +merge: + %e = phi i64 [ undef, %entry ], [ %c, %xorpath ] + %res = sdiv i64 %e, %l + store i64 %res, i64* %retptr + ret void +} + +define void @Test_dont_bypass_mul_long_const(i64 %a, i64 %l, i64* %retptr) { +; CHECK-LABEL: @Test_dont_bypass_mul_long_const( +; CHECK-NEXT: [[C:%.*]] = mul i64 [[A:%.*]], 5229553307 +; CHECK-NEXT: [[RES:%.*]] = urem i64 [[C]], [[L:%.*]] +; CHECK-NEXT: store i64 [[RES]], i64* [[RETPTR:%.*]] +; CHECK-NEXT: ret void +; + %c = mul i64 %a, 5229553307 ; the constant doesn't fit 32 bits + %res = urem i64 %c, %l + store i64 %res, i64* %retptr + ret void +} + +define void @Test_bypass_phi_mul_const(i64 %a, i64 %b, i64* %retptr) { +; CHECK-LABEL: @Test_bypass_phi_mul_const( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[A_MUL:%.*]] = mul nsw i64 [[A:%.*]], 34806414968801 +; CHECK-NEXT: [[P:%.*]] = icmp sgt i64 [[A]], [[B:%.*]] +; CHECK-NEXT: br i1 [[P]], label [[BRANCH:%.*]], label [[MERGE:%.*]] +; CHECK: branch: +; CHECK-NEXT: br label [[MERGE]] +; CHECK: merge: +; CHECK-NEXT: [[LHS:%.*]] = phi i64 [ 42, [[BRANCH]] ], [ [[A_MUL]], [[ENTRY:%.*]] ] +; CHECK-NEXT: [[TMP0:%.*]] = or i64 [[LHS]], [[B]] +; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], -4294967296 +; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 0 +; CHECK-NEXT: br i1 [[TMP2]], label [[TMP3:%.*]], label [[TMP8:%.*]] +; CHECK: [[TMP4:%.*]] = trunc i64 [[B]] to i32 +; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[LHS]] to i32 +; CHECK-NEXT: [[TMP6:%.*]] = udiv i32 [[TMP5]], [[TMP4]] +; CHECK-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 +; CHECK-NEXT: br label [[TMP10:%.*]] +; CHECK: [[TMP9:%.*]] = sdiv i64 [[LHS]], [[B]] +; CHECK-NEXT: br label [[TMP10]] +; CHECK: [[TMP11:%.*]] = phi i64 [ [[TMP7]], [[TMP3]] ], [ [[TMP9]], [[TMP8]] ] +; CHECK-NEXT: store i64 [[TMP11]], i64* [[RETPTR:%.*]] +; CHECK-NEXT: ret void +; +entry: + %a.mul = mul nsw i64 %a, 34806414968801 + %p = icmp sgt i64 %a, %b + br i1 %p, label %branch, label %merge + +branch: + br label %merge + +merge: + %lhs = phi i64 [ 42, %branch ], [ %a.mul, %entry ] + %res = sdiv i64 %lhs, %b + store i64 %res, i64* %retptr + ret void +} + +define void @Test_bypass_mul_short_const(i64 %a, i64 %l, i64* %retptr) { +; CHECK-LABEL: @Test_bypass_mul_short_const( +; CHECK-NEXT: [[C:%.*]] = mul i64 [[A:%.*]], -42 +; CHECK-NEXT: [[TMP1:%.*]] = or i64 [[C]], [[L:%.*]] +; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[TMP1]], -4294967296 +; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[TMP2]], 0 +; CHECK-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP9:%.*]] +; CHECK: [[TMP5:%.*]] = trunc i64 [[L]] to i32 +; CHECK-NEXT: [[TMP6:%.*]] = trunc i64 [[C]] to i32 +; CHECK-NEXT: [[TMP7:%.*]] = urem i32 [[TMP6]], [[TMP5]] +; CHECK-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 +; CHECK-NEXT: br label [[TMP11:%.*]] +; CHECK: [[TMP10:%.*]] = urem i64 [[C]], [[L]] +; CHECK-NEXT: br label [[TMP11]] +; CHECK: [[TMP12:%.*]] = phi i64 [ [[TMP8]], [[TMP4]] ], [ [[TMP10]], [[TMP9]] ] +; CHECK-NEXT: store i64 [[TMP12]], i64* [[RETPTR:%.*]] +; CHECK-NEXT: ret void +; + %c = mul i64 %a, -42 + %res = urem i64 %c, %l + store i64 %res, i64* %retptr + ret void +} diff --git a/test/Transforms/CodeGenPrepare/X86/computedgoto.ll b/test/Transforms/CodeGenPrepare/X86/computedgoto.ll new file mode 100644 index 000000000000..00a4df9b2c59 --- /dev/null +++ b/test/Transforms/CodeGenPrepare/X86/computedgoto.ll @@ -0,0 +1,294 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt -codegenprepare -S < %s | FileCheck %s +target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" +target triple = "x86_64-unknown-linux-gnu" + +declare void @use(i32) local_unnamed_addr +declare void @useptr([2 x i8*]*) local_unnamed_addr + +; CHECK: @simple.targets = constant [2 x i8*] [i8* blockaddress(@simple, %bb0), i8* blockaddress(@simple, %bb1)], align 16 +@simple.targets = constant [2 x i8*] [i8* blockaddress(@simple, %bb0), i8* blockaddress(@simple, %bb1)], align 16 + +; CHECK: @multi.targets = constant [2 x i8*] [i8* blockaddress(@multi, %bb0), i8* blockaddress(@multi, %bb1)], align 16 +@multi.targets = constant [2 x i8*] [i8* blockaddress(@multi, %bb0), i8* blockaddress(@multi, %bb1)], align 16 + +; CHECK: @loop.targets = constant [2 x i8*] [i8* blockaddress(@loop, %bb0), i8* blockaddress(@loop, %bb1)], align 16 +@loop.targets = constant [2 x i8*] [i8* blockaddress(@loop, %bb0), i8* blockaddress(@loop, %bb1)], align 16 + +; CHECK: @nophi.targets = constant [2 x i8*] [i8* blockaddress(@nophi, %bb0), i8* blockaddress(@nophi, %bb1)], align 16 +@nophi.targets = constant [2 x i8*] [i8* blockaddress(@nophi, %bb0), i8* blockaddress(@nophi, %bb1)], align 16 + +; CHECK: @noncritical.targets = constant [2 x i8*] [i8* blockaddress(@noncritical, %bb0), i8* blockaddress(@noncritical, %bb1)], align 16 +@noncritical.targets = constant [2 x i8*] [i8* blockaddress(@noncritical, %bb0), i8* blockaddress(@noncritical, %bb1)], align 16 + +; Check that we break the critical edge when an jump table has only one use. +define void @simple(i32* nocapture readonly %p) { +; CHECK-LABEL: @simple( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds i32, i32* [[P:%.*]], i64 1 +; CHECK-NEXT: [[INITVAL:%.*]] = load i32, i32* [[P]], align 4 +; CHECK-NEXT: [[INITOP:%.*]] = load i32, i32* [[INCDEC_PTR]], align 4 +; CHECK-NEXT: switch i32 [[INITOP]], label [[EXIT:%.*]] [ +; CHECK-NEXT: i32 0, label [[BB0_CLONE:%.*]] +; CHECK-NEXT: i32 1, label [[BB1_CLONE:%.*]] +; CHECK-NEXT: ] +; CHECK: bb0: +; CHECK-NEXT: br label [[DOTSPLIT:%.*]] +; CHECK: .split: +; CHECK-NEXT: [[MERGE:%.*]] = phi i32* [ [[PTR:%.*]], [[BB0:%.*]] ], [ [[INCDEC_PTR]], [[BB0_CLONE]] ] +; CHECK-NEXT: [[MERGE2:%.*]] = phi i32 [ 0, [[BB0]] ], [ [[INITVAL]], [[BB0_CLONE]] ] +; CHECK-NEXT: tail call void @use(i32 [[MERGE2]]) +; CHECK-NEXT: br label [[INDIRECTGOTO:%.*]] +; CHECK: bb1: +; CHECK-NEXT: br label [[DOTSPLIT3:%.*]] +; CHECK: .split3: +; CHECK-NEXT: [[MERGE5:%.*]] = phi i32* [ [[PTR]], [[BB1:%.*]] ], [ [[INCDEC_PTR]], [[BB1_CLONE]] ] +; CHECK-NEXT: [[MERGE7:%.*]] = phi i32 [ 1, [[BB1]] ], [ [[INITVAL]], [[BB1_CLONE]] ] +; CHECK-NEXT: tail call void @use(i32 [[MERGE7]]) +; CHECK-NEXT: br label [[INDIRECTGOTO]] +; CHECK: indirectgoto: +; CHECK-NEXT: [[P_ADDR_SINK:%.*]] = phi i32* [ [[MERGE5]], [[DOTSPLIT3]] ], [ [[MERGE]], [[DOTSPLIT]] ] +; CHECK-NEXT: [[PTR]] = getelementptr inbounds i32, i32* [[P_ADDR_SINK]], i64 1 +; CHECK-NEXT: [[NEWP:%.*]] = load i32, i32* [[P_ADDR_SINK]], align 4 +; CHECK-NEXT: [[IDX:%.*]] = sext i32 [[NEWP]] to i64 +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* @simple.targets, i64 0, i64 [[IDX]] +; CHECK-NEXT: [[NEWOP:%.*]] = load i8*, i8** [[ARRAYIDX]], align 8 +; CHECK-NEXT: indirectbr i8* [[NEWOP]], [label [[BB0]], label %bb1] +; CHECK: exit: +; CHECK-NEXT: ret void +; CHECK: bb0.clone: +; CHECK-NEXT: br label [[DOTSPLIT]] +; CHECK: bb1.clone: +; CHECK-NEXT: br label [[DOTSPLIT3]] +; +entry: + %incdec.ptr = getelementptr inbounds i32, i32* %p, i64 1 + %initval = load i32, i32* %p, align 4 + %initop = load i32, i32* %incdec.ptr, align 4 + switch i32 %initop, label %exit [ + i32 0, label %bb0 + i32 1, label %bb1 + ] + +bb0: + %p.addr.0 = phi i32* [ %incdec.ptr, %entry ], [ %ptr, %indirectgoto ] + %opcode.0 = phi i32 [ %initval, %entry ], [ 0, %indirectgoto ] + tail call void @use(i32 %opcode.0) + br label %indirectgoto + +bb1: + %p.addr.1 = phi i32* [ %incdec.ptr, %entry ], [ %ptr, %indirectgoto ] + %opcode.1 = phi i32 [ %initval, %entry ], [ 1, %indirectgoto ] + tail call void @use(i32 %opcode.1) + br label %indirectgoto + +indirectgoto: + %p.addr.sink = phi i32* [ %p.addr.1, %bb1 ], [ %p.addr.0, %bb0 ] + %ptr = getelementptr inbounds i32, i32* %p.addr.sink, i64 1 + %newp = load i32, i32* %p.addr.sink, align 4 + %idx = sext i32 %newp to i64 + %arrayidx = getelementptr inbounds [2 x i8*], [2 x i8*]* @simple.targets, i64 0, i64 %idx + %newop = load i8*, i8** %arrayidx, align 8 + indirectbr i8* %newop, [label %bb0, label %bb1] + +exit: + ret void +} + +; Don't try to break critical edges when several indirectbr point to a single block +define void @multi(i32* nocapture readonly %p) { +; CHECK-LABEL: @multi( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds i32, i32* [[P:%.*]], i64 1 +; CHECK-NEXT: [[INITVAL:%.*]] = load i32, i32* [[P]], align 4 +; CHECK-NEXT: [[INITOP:%.*]] = load i32, i32* [[INCDEC_PTR]], align 4 +; CHECK-NEXT: switch i32 [[INITOP]], label [[EXIT:%.*]] [ +; CHECK-NEXT: i32 0, label [[BB0:%.*]] +; CHECK-NEXT: i32 1, label [[BB1:%.*]] +; CHECK-NEXT: ] +; CHECK: bb0: +; CHECK-NEXT: [[P_ADDR_0:%.*]] = phi i32* [ [[INCDEC_PTR]], [[ENTRY:%.*]] ], [ [[NEXT0:%.*]], [[BB0]] ], [ [[NEXT1:%.*]], [[BB1]] ] +; CHECK-NEXT: [[OPCODE_0:%.*]] = phi i32 [ [[INITVAL]], [[ENTRY]] ], [ 0, [[BB0]] ], [ 1, [[BB1]] ] +; CHECK-NEXT: tail call void @use(i32 [[OPCODE_0]]) +; CHECK-NEXT: [[NEXT0]] = getelementptr inbounds i32, i32* [[P_ADDR_0]], i64 1 +; CHECK-NEXT: [[NEWP0:%.*]] = load i32, i32* [[P_ADDR_0]], align 4 +; CHECK-NEXT: [[IDX0:%.*]] = sext i32 [[NEWP0]] to i64 +; CHECK-NEXT: [[ARRAYIDX0:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* @multi.targets, i64 0, i64 [[IDX0]] +; CHECK-NEXT: [[NEWOP0:%.*]] = load i8*, i8** [[ARRAYIDX0]], align 8 +; CHECK-NEXT: indirectbr i8* [[NEWOP0]], [label [[BB0]], label %bb1] +; CHECK: bb1: +; CHECK-NEXT: [[P_ADDR_1:%.*]] = phi i32* [ [[INCDEC_PTR]], [[ENTRY]] ], [ [[NEXT0]], [[BB0]] ], [ [[NEXT1]], [[BB1]] ] +; CHECK-NEXT: [[OPCODE_1:%.*]] = phi i32 [ [[INITVAL]], [[ENTRY]] ], [ 0, [[BB0]] ], [ 1, [[BB1]] ] +; CHECK-NEXT: tail call void @use(i32 [[OPCODE_1]]) +; CHECK-NEXT: [[NEXT1]] = getelementptr inbounds i32, i32* [[P_ADDR_1]], i64 1 +; CHECK-NEXT: [[NEWP1:%.*]] = load i32, i32* [[P_ADDR_1]], align 4 +; CHECK-NEXT: [[IDX1:%.*]] = sext i32 [[NEWP1]] to i64 +; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* @multi.targets, i64 0, i64 [[IDX1]] +; CHECK-NEXT: [[NEWOP1:%.*]] = load i8*, i8** [[ARRAYIDX1]], align 8 +; CHECK-NEXT: indirectbr i8* [[NEWOP1]], [label [[BB0]], label %bb1] +; CHECK: exit: +; CHECK-NEXT: ret void +; +entry: + %incdec.ptr = getelementptr inbounds i32, i32* %p, i64 1 + %initval = load i32, i32* %p, align 4 + %initop = load i32, i32* %incdec.ptr, align 4 + switch i32 %initop, label %exit [ + i32 0, label %bb0 + i32 1, label %bb1 + ] + +bb0: + %p.addr.0 = phi i32* [ %incdec.ptr, %entry ], [ %next0, %bb0 ], [ %next1, %bb1 ] + %opcode.0 = phi i32 [ %initval, %entry ], [ 0, %bb0 ], [ 1, %bb1 ] + tail call void @use(i32 %opcode.0) + %next0 = getelementptr inbounds i32, i32* %p.addr.0, i64 1 + %newp0 = load i32, i32* %p.addr.0, align 4 + %idx0 = sext i32 %newp0 to i64 + %arrayidx0 = getelementptr inbounds [2 x i8*], [2 x i8*]* @multi.targets, i64 0, i64 %idx0 + %newop0 = load i8*, i8** %arrayidx0, align 8 + indirectbr i8* %newop0, [label %bb0, label %bb1] + +bb1: + %p.addr.1 = phi i32* [ %incdec.ptr, %entry ], [ %next0, %bb0 ], [ %next1, %bb1 ] + %opcode.1 = phi i32 [ %initval, %entry ], [ 0, %bb0 ], [ 1, %bb1 ] + tail call void @use(i32 %opcode.1) + %next1 = getelementptr inbounds i32, i32* %p.addr.1, i64 1 + %newp1 = load i32, i32* %p.addr.1, align 4 + %idx1 = sext i32 %newp1 to i64 + %arrayidx1 = getelementptr inbounds [2 x i8*], [2 x i8*]* @multi.targets, i64 0, i64 %idx1 + %newop1 = load i8*, i8** %arrayidx1, align 8 + indirectbr i8* %newop1, [label %bb0, label %bb1] + +exit: + ret void +} + +; Make sure we do the right thing for cases where the indirectbr branches to +; the block it terminates. +define void @loop(i64* nocapture readonly %p) { +; CHECK-LABEL: @loop( +; CHECK-NEXT: bb0.clone: +; CHECK-NEXT: br label [[DOTSPLIT:%.*]] +; CHECK: bb0: +; CHECK-NEXT: br label [[DOTSPLIT]] +; CHECK: .split: +; CHECK-NEXT: [[MERGE:%.*]] = phi i64 [ [[I_NEXT:%.*]], [[BB0:%.*]] ], [ 0, [[BB0_CLONE:%.*]] ] +; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i64, i64* [[P:%.*]], i64 [[MERGE]] +; CHECK-NEXT: store i64 [[MERGE]], i64* [[TMP0]], align 4 +; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[MERGE]], 1 +; CHECK-NEXT: [[IDX:%.*]] = srem i64 [[MERGE]], 2 +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* @loop.targets, i64 0, i64 [[IDX]] +; CHECK-NEXT: [[TARGET:%.*]] = load i8*, i8** [[ARRAYIDX]], align 8 +; CHECK-NEXT: indirectbr i8* [[TARGET]], [label [[BB0]], label %bb1] +; CHECK: bb1: +; CHECK-NEXT: ret void +; +entry: + br label %bb0 + +bb0: + %i = phi i64 [ %i.next, %bb0 ], [ 0, %entry ] + %tmp0 = getelementptr inbounds i64, i64* %p, i64 %i + store i64 %i, i64* %tmp0, align 4 + %i.next = add nuw nsw i64 %i, 1 + %idx = srem i64 %i, 2 + %arrayidx = getelementptr inbounds [2 x i8*], [2 x i8*]* @loop.targets, i64 0, i64 %idx + %target = load i8*, i8** %arrayidx, align 8 + indirectbr i8* %target, [label %bb0, label %bb1] + +bb1: + ret void +} + +; Don't do anything for cases that contain no phis. +define void @nophi(i32* %p) { +; CHECK-LABEL: @nophi( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds i32, i32* [[P:%.*]], i64 1 +; CHECK-NEXT: [[INITOP:%.*]] = load i32, i32* [[INCDEC_PTR]], align 4 +; CHECK-NEXT: switch i32 [[INITOP]], label [[EXIT:%.*]] [ +; CHECK-NEXT: i32 0, label [[BB0:%.*]] +; CHECK-NEXT: i32 1, label [[BB1:%.*]] +; CHECK-NEXT: ] +; CHECK: bb0: +; CHECK-NEXT: tail call void @use(i32 0) +; CHECK-NEXT: br label [[INDIRECTGOTO:%.*]] +; CHECK: bb1: +; CHECK-NEXT: tail call void @use(i32 1) +; CHECK-NEXT: br label [[INDIRECTGOTO]] +; CHECK: indirectgoto: +; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[P]] to i8* +; CHECK-NEXT: [[SUNKADDR:%.*]] = getelementptr i8, i8* [[TMP0]], i64 4 +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[SUNKADDR]] to i32* +; CHECK-NEXT: [[NEWP:%.*]] = load i32, i32* [[TMP1]], align 4 +; CHECK-NEXT: [[IDX:%.*]] = sext i32 [[NEWP]] to i64 +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* @nophi.targets, i64 0, i64 [[IDX]] +; CHECK-NEXT: [[NEWOP:%.*]] = load i8*, i8** [[ARRAYIDX]], align 8 +; CHECK-NEXT: indirectbr i8* [[NEWOP]], [label [[BB0]], label %bb1] +; CHECK: exit: +; CHECK-NEXT: ret void +; +entry: + %incdec.ptr = getelementptr inbounds i32, i32* %p, i64 1 + %initop = load i32, i32* %incdec.ptr, align 4 + switch i32 %initop, label %exit [ + i32 0, label %bb0 + i32 1, label %bb1 + ] + +bb0: + tail call void @use(i32 0) br label %indirectgoto + +bb1: + tail call void @use(i32 1) + br label %indirectgoto + +indirectgoto: + %newp = load i32, i32* %incdec.ptr, align 4 + %idx = sext i32 %newp to i64 + %arrayidx = getelementptr inbounds [2 x i8*], [2 x i8*]* @nophi.targets, i64 0, i64 %idx + %newop = load i8*, i8** %arrayidx, align 8 + indirectbr i8* %newop, [label %bb0, label %bb1] + +exit: + ret void +} + +; Don't do anything if the edge isn't critical. +define i32 @noncritical(i32 %k, i8* %p) +; CHECK-LABEL: @noncritical( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[D:%.*]] = add i32 [[K:%.*]], 1 +; CHECK-NEXT: indirectbr i8* [[P:%.*]], [label [[BB0:%.*]], label %bb1] +; CHECK: bb0: +; CHECK-NEXT: [[R0:%.*]] = sub i32 [[K]], [[D]] +; CHECK-NEXT: br label [[EXIT:%.*]] +; CHECK: bb1: +; CHECK-NEXT: [[R1:%.*]] = sub i32 [[D]], [[K]] +; CHECK-NEXT: br label [[EXIT]] +; CHECK: exit: +; CHECK-NEXT: [[V:%.*]] = phi i32 [ [[R0]], [[BB0]] ], [ [[R1]], [[BB1:%.*]] ] +; CHECK-NEXT: ret i32 0 +; +{ +entry: + %d = add i32 %k, 1 + indirectbr i8* %p, [label %bb0, label %bb1] + +bb0: + %v00 = phi i32 [%k, %entry] + %v01 = phi i32 [%d, %entry] + %r0 = sub i32 %v00, %v01 + br label %exit + +bb1: + %v10 = phi i32 [%d, %entry] + %v11 = phi i32 [%k, %entry] + %r1 = sub i32 %v10, %v11 + br label %exit + +exit: + %v = phi i32 [%r0, %bb0], [%r1, %bb1] + ret i32 0 +} diff --git a/test/Transforms/CodeGenPrepare/X86/sink-addrmode.ll b/test/Transforms/CodeGenPrepare/X86/sink-addrmode.ll index 5c0b5f3839d0..9d6e668167fb 100644 --- a/test/Transforms/CodeGenPrepare/X86/sink-addrmode.ll +++ b/test/Transforms/CodeGenPrepare/X86/sink-addrmode.ll @@ -7,7 +7,7 @@ target triple = "x86_64-unknown-linux-gnu" ; Can we sink single addressing mode computation to use? define void @test1(i1 %cond, i64* %base) { ; CHECK-LABEL: @test1 -; CHECK: add i64 {{.+}}, 40 +; CHECK: getelementptr i8, {{.+}} 40 entry: %addr = getelementptr inbounds i64, i64* %base, i64 5 %casted = bitcast i64* %addr to i32* @@ -33,7 +33,7 @@ entry: if.then: ; CHECK-LABEL: if.then: -; CHECK: add i64 {{.+}}, 40 +; CHECK: getelementptr i8, {{.+}} 40 %v1 = load i32, i32* %casted, align 4 call void @foo(i32 %v1) %cmp = icmp eq i32 %v1, 0 @@ -41,7 +41,7 @@ if.then: next: ; CHECK-LABEL: next: -; CHECK: add i64 {{.+}}, 40 +; CHECK: getelementptr i8, {{.+}} 40 %v2 = load i32, i32* %casted, align 4 call void @foo(i32 %v2) br label %fallthrough @@ -61,10 +61,10 @@ entry: if.then: ; CHECK-LABEL: if.then: -; CHECK: add i64 {{.+}}, 40 +; CHECK: getelementptr i8, {{.+}} 40 %v1 = load i32, i32* %casted, align 4 call void @foo(i32 %v1) -; CHECK-NOT: add i64 {{.+}}, 40 +; CHECK-NOT: getelementptr i8, {{.+}}, 40 %v2 = load i32, i32* %casted, align 4 call void @foo(i32 %v2) br label %fallthrough @@ -84,7 +84,7 @@ entry: if.then: ; CHECK-LABEL: if.then: -; CHECK: add i64 {{.+}}, 40 +; CHECK: getelementptr i8, {{.+}} 40 %v1 = load i32, i32* %casted, align 4 call void @foo(i32 %v1) %cmp = icmp eq i32 %v1, 0 @@ -95,7 +95,7 @@ fallthrough: rare.1: ; CHECK-LABEL: rare.1: -; CHECK: add i64 {{.+}}, 40 +; CHECK: getelementptr i8, {{.+}} 40 call void @slowpath(i32 %v1, i32* %casted) cold br label %fallthrough } @@ -111,7 +111,7 @@ entry: if.then: ; CHECK-LABEL: if.then: -; CHECK-NOT: add i64 {{.+}}, 40 +; CHECK-NOT: getelementptr i8, {{.+}} 40 %v1 = load i32, i32* %casted, align 4 call void @foo(i32 %v1) %cmp = icmp eq i32 %v1, 0 @@ -136,7 +136,7 @@ entry: if.then: ; CHECK-LABEL: if.then: -; CHECK-NOT: add i64 {{.+}}, 40 +; CHECK-NOT: getelementptr i8, {{.+}} 40 %v1 = load i32, i32* %casted, align 4 call void @foo(i32 %v1) %cmp = icmp eq i32 %v1, 0 @@ -162,7 +162,7 @@ entry: if.then: ; CHECK-LABEL: if.then: -; CHECK: add i64 {{.+}}, 40 +; CHECK: getelementptr i8, {{.+}} 40 %v1 = load i32, i32* %casted, align 4 call void @foo(i32 %v1) %cmp = icmp eq i32 %v1, 0 @@ -170,7 +170,7 @@ if.then: next: ; CHECK-LABEL: next: -; CHECK: add i64 {{.+}}, 40 +; CHECK: getelementptr i8, {{.+}} 40 %v2 = load i32, i32* %casted, align 4 call void @foo(i32 %v2) %cmp2 = icmp eq i32 %v2, 0 @@ -181,13 +181,13 @@ fallthrough: rare.1: ; CHECK-LABEL: rare.1: -; CHECK: add i64 {{.+}}, 40 +; CHECK: getelementptr i8, {{.+}} 40 call void @slowpath(i32 %v1, i32* %casted) cold br label %next rare.2: ; CHECK-LABEL: rare.2: -; CHECK: add i64 {{.+}}, 40 +; CHECK: getelementptr i8, {{.+}} 40 call void @slowpath(i32 %v2, i32* %casted) cold br label %fallthrough } diff --git a/test/Transforms/CodeGenPrepare/X86/sink-addrspacecast.ll b/test/Transforms/CodeGenPrepare/X86/sink-addrspacecast.ll index c9f49b5d4f86..31f0ca239e3a 100644 --- a/test/Transforms/CodeGenPrepare/X86/sink-addrspacecast.ll +++ b/test/Transforms/CodeGenPrepare/X86/sink-addrspacecast.ll @@ -1,11 +1,12 @@ -; RUN: opt -S -codegenprepare < %s | FileCheck %s +; RUN: opt -S -codegenprepare < %s | FileCheck %s -check-prefix=CHECK -check-prefix=GEP target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-unknown-linux-gnu" ; CHECK-LABEL: @load_cast_gep -; CHECK: add i64 %sunkaddr, 40 +; GEP: [[CAST:%[0-9]+]] = addrspacecast i64* %base to i8 addrspace(1)* +; GEP: getelementptr i8, i8 addrspace(1)* [[CAST]], i64 40 define void @load_cast_gep(i1 %cond, i64* %base) { entry: %addr = getelementptr inbounds i64, i64* %base, i64 5 @@ -21,7 +22,8 @@ fallthrough: } ; CHECK-LABEL: @store_gep_cast -; CHECK: add i64 %sunkaddr, 20 +; GEP: [[CAST:%[0-9]+]] = addrspacecast i64* %base to i8 addrspace(1)* +; GEP: getelementptr i8, i8 addrspace(1)* [[CAST]], i64 20 define void @store_gep_cast(i1 %cond, i64* %base) { entry: %casted = addrspacecast i64* %base to i32 addrspace(1)* diff --git a/test/Transforms/CodeGenPrepare/basic.ll b/test/Transforms/CodeGenPrepare/basic.ll index 495d910b5cd6..2e58de7d0934 100644 --- a/test/Transforms/CodeGenPrepare/basic.ll +++ b/test/Transforms/CodeGenPrepare/basic.ll @@ -9,7 +9,7 @@ target triple = "x86_64-apple-darwin10.0.0" ; rdar://8785296 define i32 @test1(i8* %ptr) nounwind ssp noredzone align 2 { entry: - %0 = tail call i64 @llvm.objectsize.i64(i8* %ptr, i1 false) + %0 = tail call i64 @llvm.objectsize.i64(i8* %ptr, i1 false, i1 false) %1 = icmp ugt i64 %0, 3 br i1 %1, label %T, label %trap @@ -25,6 +25,44 @@ T: ret i32 4 } -declare i64 @llvm.objectsize.i64(i8*, i1) nounwind readonly +; CHECK-LABEL: @test_objectsize_null_flag( +define i64 @test_objectsize_null_flag(i8* %ptr) { +entry: + ; CHECK: ret i64 -1 + %0 = tail call i64 @llvm.objectsize.i64(i8* null, i1 false, i1 true) + ret i64 %0 +} + +; CHECK-LABEL: @test_objectsize_null_flag_min( +define i64 @test_objectsize_null_flag_min(i8* %ptr) { +entry: + ; CHECK: ret i64 0 + %0 = tail call i64 @llvm.objectsize.i64(i8* null, i1 true, i1 true) + ret i64 %0 +} + +; Test foldable null pointers because we evaluate them with non-exact modes in +; CodeGenPrepare. +; CHECK-LABEL: @test_objectsize_null_flag_noas0( +define i64 @test_objectsize_null_flag_noas0() { +entry: + ; CHECK: ret i64 0 + %0 = tail call i64 @llvm.objectsize.i64.p1i8(i8 addrspace(1)* null, i1 false, + i1 true) + ret i64 %0 +} + +; CHECK-LABEL: @test_objectsize_null_flag_min_noas0( +define i64 @test_objectsize_null_flag_min_noas0() { +entry: + ; CHECK: ret i64 0 + %0 = tail call i64 @llvm.objectsize.i64.p1i8(i8 addrspace(1)* null, i1 true, + i1 true) + ret i64 %0 +} + + +declare i64 @llvm.objectsize.i64(i8*, i1, i1) nounwind readonly +declare i64 @llvm.objectsize.i64.p1i8(i8 addrspace(1)*, i1, i1) nounwind readonly declare void @llvm.trap() nounwind diff --git a/test/Transforms/CodeGenPrepare/builtin-condition.ll b/test/Transforms/CodeGenPrepare/builtin-condition.ll index 0d41e9e1eddb..e42529a7b9a1 100644 --- a/test/Transforms/CodeGenPrepare/builtin-condition.ll +++ b/test/Transforms/CodeGenPrepare/builtin-condition.ll @@ -74,39 +74,39 @@ entry: %chararray = alloca [30 x i8], align 16 %chararray2 = alloca [10 x i8], align 1 %0 = getelementptr inbounds [30 x i8], [30 x i8]* %chararray, i64 0, i64 0 - call void @llvm.lifetime.start(i64 30, i8* %0) + call void @llvm.lifetime.start.p0i8(i64 30, i8* %0) %1 = getelementptr inbounds [10 x i8], [10 x i8]* %chararray2, i64 0, i64 0 - call void @llvm.lifetime.start(i64 10, i8* %1) + call void @llvm.lifetime.start.p0i8(i64 10, i8* %1) %tobool = icmp eq i32 %flag, 0 %cptr.0 = select i1 %tobool, i8* %0, i8* %1 %2 = call i64 @llvm.objectsize.i64.p0i8(i8* %cptr.0, i1 true) - call void @llvm.lifetime.end(i64 10, i8* %1) - call void @llvm.lifetime.end(i64 30, i8* %0) + call void @llvm.lifetime.end.p0i8(i64 10, i8* %1) + call void @llvm.lifetime.end.p0i8(i64 30, i8* %0) ret i64 %2 ; CHECK-LABEL: foo1 ; CHECK: ret i64 10 } -declare void @llvm.lifetime.start(i64, i8* nocapture) +declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) declare i64 @llvm.objectsize.i64.p0i8(i8*, i1) -declare void @llvm.lifetime.end(i64, i8* nocapture) +declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) define i64 @foo2(i32 %n) { entry: %Small = alloca [10 x i8], align 1 %Large = alloca [20 x i8], align 16 %0 = getelementptr inbounds [10 x i8], [10 x i8]* %Small, i64 0, i64 0 - call void @llvm.lifetime.start(i64 10, i8* %0) + call void @llvm.lifetime.start.p0i8(i64 10, i8* %0) %1 = getelementptr inbounds [20 x i8], [20 x i8]* %Large, i64 0, i64 0 - call void @llvm.lifetime.start(i64 20, i8* %1) + call void @llvm.lifetime.start.p0i8(i64 20, i8* %1) %tobool = icmp ne i32 %n, 0 %add.ptr = getelementptr inbounds [20 x i8], [20 x i8]* %Large, i64 0, i64 19 %cond = select i1 %tobool, i8* %0, i8* %add.ptr %2 = call i64 @llvm.objectsize.i64.p0i8(i8* %cond, i1 false) - call void @llvm.lifetime.end(i64 20, i8* %1) - call void @llvm.lifetime.end(i64 10, i8* %0) + call void @llvm.lifetime.end.p0i8(i64 20, i8* %1) + call void @llvm.lifetime.end.p0i8(i64 10, i8* %0) ret i64 %2 ; CHECK-LABEL: foo2 ; CHECK: ret i64 10 diff --git a/test/Transforms/CodeGenPrepare/section.ll b/test/Transforms/CodeGenPrepare/section.ll index 795c45c220db..2c96612e1baf 100644 --- a/test/Transforms/CodeGenPrepare/section.ll +++ b/test/Transforms/CodeGenPrepare/section.ll @@ -5,12 +5,32 @@ target triple = "x86_64-pc-linux-gnu" ; This tests that hot/cold functions get correct section prefix assigned ; CHECK: hot_func{{.*}}!section_prefix ![[HOT_ID:[0-9]+]] +; The entry is hot define void @hot_func() !prof !15 { ret void } +; CHECK: hot_call_func{{.*}}!section_prefix ![[HOT_ID]] +; The sum of 2 callsites are hot +define void @hot_call_func() !prof !16 { + call void @hot_func(), !prof !17 + call void @hot_func(), !prof !17 + ret void +} + +; CHECK-NOT: normal_func{{.*}}!section_prefix +; The sum of all callsites are neither hot or cold +define void @normal_func() !prof !16 { + call void @hot_func(), !prof !17 + call void @hot_func(), !prof !18 + call void @hot_func(), !prof !18 + ret void +} + ; CHECK: cold_func{{.*}}!section_prefix ![[COLD_ID:[0-9]+]] +; The entry and the callsite are both cold define void @cold_func() !prof !16 { + call void @hot_func(), !prof !18 ret void } @@ -33,3 +53,5 @@ define void @cold_func() !prof !16 { !14 = !{i32 999999, i64 1, i32 2} !15 = !{!"function_entry_count", i64 1000} !16 = !{!"function_entry_count", i64 1} +!17 = !{!"branch_weights", i32 80} +!18 = !{!"branch_weights", i32 1} diff --git a/test/Transforms/ConstProp/loads.ll b/test/Transforms/ConstProp/loads.ll index 89387ad06ba8..dce2068a8d55 100644 --- a/test/Transforms/ConstProp/loads.ll +++ b/test/Transforms/ConstProp/loads.ll @@ -1,5 +1,5 @@ -; RUN: opt < %s -default-data-layout="e-p:64:64:64-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64" -instcombine -S | FileCheck %s --check-prefix=LE -; RUN: opt < %s -default-data-layout="E-p:64:64:64-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64" -instcombine -S | FileCheck %s --check-prefix=BE +; RUN: opt < %s -data-layout="e-p:64:64:64-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64" -instcombine -S | FileCheck %s --check-prefix=LE +; RUN: opt < %s -data-layout="E-p:64:64:64-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64" -instcombine -S | FileCheck %s --check-prefix=BE ; {{ 0xDEADBEEF, 0xBA }, 0xCAFEBABE} @g1 = constant {{i32,i8},i32} {{i32,i8} { i32 -559038737, i8 186 }, i32 -889275714 } diff --git a/test/Transforms/ConstantHoisting/X86/ehpad.ll b/test/Transforms/ConstantHoisting/X86/ehpad.ll new file mode 100644 index 000000000000..3178e87f7548 --- /dev/null +++ b/test/Transforms/ConstantHoisting/X86/ehpad.ll @@ -0,0 +1,62 @@ +; RUN: opt -S -consthoist < %s | FileCheck %s + +; FIXME: The catchpad doesn't even use the constant, so a better fix would be to +; insert the bitcast in the catchpad block. + +target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128" +target triple = "x86_64-pc-windows-msvc" + +; CHECK-LABEL: define i32 @main +; CHECK: %tobool = icmp eq i32 %argc, 0 +; CHECK-NEXT: bitcast i64 9209618997431186100 to i64 +; CHECK-NEXT: br i1 %tobool + +; Function Attrs: norecurse +define i32 @main(i32 %argc, i8** nocapture readnone %argv) local_unnamed_addr #0 personality i8* bitcast (i32 (...)* @__CxxFrameHandler3 to i8*) { + %call = tail call i64 @fn(i64 0) + %call1 = tail call i64 @fn(i64 1) + %tobool = icmp eq i32 %argc, 0 + br i1 %tobool, label %2, label %1 + +;