From 104bd8179fb5f6551c65c94ebcd0a4918b060189 Mon Sep 17 00:00:00 2001 From: Roman Divacky Date: Fri, 2 Apr 2010 08:54:30 +0000 Subject: Update LLVM to r100181. --- utils/TableGen/CodeGenInstruction.cpp | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'utils/TableGen/CodeGenInstruction.cpp') diff --git a/utils/TableGen/CodeGenInstruction.cpp b/utils/TableGen/CodeGenInstruction.cpp index eea55618721e..99d196c3ceb4 100644 --- a/utils/TableGen/CodeGenInstruction.cpp +++ b/utils/TableGen/CodeGenInstruction.cpp @@ -12,6 +12,7 @@ //===----------------------------------------------------------------------===// #include "CodeGenInstruction.h" +#include "CodeGenTarget.h" #include "Record.h" #include "llvm/ADT/StringExtras.h" #include "llvm/ADT/STLExtras.h" @@ -294,3 +295,22 @@ CodeGenInstruction::ParseOperandName(const std::string &Op, // Otherwise, didn't find it! throw TheDef->getName() + ": unknown suboperand name in '" + Op + "'"; } + + +/// HasOneImplicitDefWithKnownVT - If the instruction has at least one +/// implicit def and it has a known VT, return the VT, otherwise return +/// MVT::Other. +MVT::SimpleValueType CodeGenInstruction:: +HasOneImplicitDefWithKnownVT(const CodeGenTarget &TargetInfo) const { + if (ImplicitDefs.empty()) return MVT::Other; + + // Check to see if the first implicit def has a resolvable type. + Record *FirstImplicitDef = ImplicitDefs[0]; + assert(FirstImplicitDef->isSubClassOf("Register")); + const std::vector &RegVTs = + TargetInfo.getRegisterVTs(FirstImplicitDef); + if (RegVTs.size() == 1) + return RegVTs[0]; + return MVT::Other; +} + -- cgit v1.3