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<title>src/lib/libvmmapi, branch release/10.1.0</title>
<subtitle>FreeBSD source tree</subtitle>
<id>https://cgit-dev.freebsd.org/src/atom?h=release%2F10.1.0</id>
<link rel='self' href='https://cgit-dev.freebsd.org/src/atom?h=release%2F10.1.0'/>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/'/>
<updated>2014-08-19T01:20:24Z</updated>
<entry>
<title>MFC r267921, r267934, r267949, r267959,	r267966, r268202, r268276,</title>
<updated>2014-08-19T01:20:24Z</updated>
<author>
<name>Peter Grehan</name>
<email>grehan@FreeBSD.org</email>
</author>
<published>2014-08-19T01:20:24Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=a77e87976e47f8352dc8eddeb5db1e905b54e82a'/>
<id>urn:sha1:a77e87976e47f8352dc8eddeb5db1e905b54e82a</id>
<content type='text'>
    r268427, r268428, r268521, r268638,	r268639, r268701, r268777,
    r268889, r268922, r269008, r269042,	r269043, r269080, r269094,
    r269108, r269109, r269281, r269317,	r269700, r269896, r269962,
    r269989.

Catch bhyve up to CURRENT.

Lightly tested with FreeBSD i386/amd64,	Linux i386/amd64, and
OpenBSD/amd64. Still resolving an	issue with OpenBSD/i386.

Many thanks to jhb@ for	all the	hard work on the prior MFCs !

r267921 - support the "mov r/m8, imm8" instruction
r267934 - document options
r267949 - set DMI vers/date to fixed values
r267959 - doc: sort cmd flags
r267966 - EPT misconf post-mortem info
r268202 - use correct flag for event index
r268276 - 64-bit virtio capability api
r268427 - invalidate guest TLB when cr3 is updated, needed for TSS
r268428 - identify vcpu's operating mode
r268521 - use correct offset in guest logical-to-linear translation
r268638 - chs value
r268639 - chs fake values
r268701 - instr emul operand/address size override prefix support
r268777 - emulation for legacy x86 task switching
r268889 - nested exception support
r268922 - fix INVARIANTS build
r269008 - emulate instructions found in the OpenBSD/i386 5.5 kernel
r269042 - fix fault injection
r269043 - Reduce VMEXIT_RESTARTs in task_switch.c
r269080 - fix issues in PUSH emulation
r269094 - simplify return values from the inout handlers
r269108 - don't return -1 from the push emulation handler
r269109 - avoid permanent sleep in vm_handle_hlt()
r269281 - list VT-x features in base kernel dmesg
r269317 - Mark AHCI fatal errors as not completed
r269700 - Support PCI extended config space in bhyve
r269896 - Minor cleanup
r269962 - use max guest memory when creating IOMMU domain
r269989 - fix interrupt mode names
</content>
</entry>
<entry>
<title>MFC r267311, r267330, r267811, r267884</title>
<updated>2014-08-17T01:23:52Z</updated>
<author>
<name>Peter Grehan</name>
<email>grehan@FreeBSD.org</email>
</author>
<published>2014-08-17T01:23:52Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=57793728b4ea86063a2b4bca1044bb8914e1a7f4'/>
<id>urn:sha1:57793728b4ea86063a2b4bca1044bb8914e1a7f4</id>
<content type='text'>
Turn on interrupt window exiting unconditionally when an ExtINT is being
injected into the guest.

Add helper functions to populate VM exit information for rendezvous and
astpending exits.

Provide APIs to directly get 'lowmem' and 'highmem' size directly.

Expose the amount of resident and wired memory from the guest's vmspace
</content>
</entry>
<entry>
<title>MFC r267216</title>
<updated>2014-08-17T01:00:42Z</updated>
<author>
<name>Peter Grehan</name>
<email>grehan@FreeBSD.org</email>
</author>
<published>2014-08-17T01:00:42Z</published>
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<id>urn:sha1:da18a2fc6a2db58c239fef4edf8a16d5fb9b1acd</id>
<content type='text'>
Add ioctl(VM_REINIT) to reinitialize the virtual machine state maintained
by vmm.ko. This allows the virtual machine to be restarted without having
to destroy it first.
</content>
</entry>
<entry>
<title>MFC r266933</title>
<updated>2014-08-17T00:52:07Z</updated>
<author>
<name>Peter Grehan</name>
<email>grehan@FreeBSD.org</email>
</author>
<published>2014-08-17T00:52:07Z</published>
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<id>urn:sha1:828bbc748a5827853bdeff99e99a9c040a119d1d</id>
<content type='text'>
Activate vcpus from bhyve(8) using the ioctl VM_ACTIVATE_CPU instead of doing
it implicitly in vmm.ko.
</content>
</entry>
<entry>
<title>MFC 266424,266476,266524,266573,266595,266626,266627,266633,266641,266642,</title>
<updated>2014-07-22T04:39:16Z</updated>
<author>
<name>John Baldwin</name>
<email>jhb@FreeBSD.org</email>
</author>
<published>2014-07-22T04:39:16Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=d8b06a87d1f647ba02fde01c99746bfe17e2d70a'/>
<id>urn:sha1:d8b06a87d1f647ba02fde01c99746bfe17e2d70a</id>
<content type='text'>
266708,266724,266934,266935,268521:
Emulation of the "ins" and "outs" instructions.

Various fixes for translating guest linear addresses to guest physical
addresses.
</content>
</entry>
<entry>
<title>MFC 266125:</title>
<updated>2014-07-22T03:14:37Z</updated>
<author>
<name>John Baldwin</name>
<email>jhb@FreeBSD.org</email>
</author>
<published>2014-07-22T03:14:37Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=8453fa9c95a28f8d7634d7c57f004d20ead1b870'/>
<id>urn:sha1:8453fa9c95a28f8d7634d7c57f004d20ead1b870</id>
<content type='text'>
Implement a PCI interrupt router to route PCI legacy INTx interrupts to
the legacy 8259A PICs.
</content>
</entry>
<entry>
<title>MFC 264353,264509,264768,264770,264825,264846,264988,265114,265165,265365,</title>
<updated>2014-07-21T19:08:02Z</updated>
<author>
<name>John Baldwin</name>
<email>jhb@FreeBSD.org</email>
</author>
<published>2014-07-21T19:08:02Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=d0aa4007c69618c8a3bf88c9a0fc4ba5a62a73ac'/>
<id>urn:sha1:d0aa4007c69618c8a3bf88c9a0fc4ba5a62a73ac</id>
<content type='text'>
265941,265951,266390,266550,266910:
Various bhyve fixes:
- Don't save host's return address in 'struct vmxctx'.
- Permit non-32-bit accesses to local APIC registers.
- Factor out common ioport handler code.
- Use calloc() in favor of malloc + memset.
- Change the vlapic timer frequency to be in the ballpark of contemporary
  hardware.
- Allow the guest to read the TSC via MSR 0x10.
- A VMCS is always inactive when it exits the vmx_run() loop.  Remove
  redundant code and the misleading comment that suggest otherwise.
- Ignore writes to microcode update MSR.  This MSR is accessed by RHEL7
  guest.
  Add KTR tracepoints to annotate wrmsr and rdmsr VM exits.
- Provide an alias for the userboot console and name it 'comconsole'.
- Use EV_ADD to create an mevent and EV_ENABLE to enable it.
- abort(3) the process in response to a VMEXIT_ABORT.
- Don't include the guest memory segments in the bhyve(8) process core dump.
- Make the vmx asm code dtrace-fbt-friendly.
- Allow vmx_getdesc() and vmx_setdesc() to be called for a vcpu that is in
  the VCPU_RUNNING state.
- Enable VMX in the IA32_FEATURE_CONTROL MSR if it not enabled and the MSR
  isn't locked.
</content>
</entry>
<entry>
<title>MFC 263780,264516,265062,265101,265203,265364:</title>
<updated>2014-07-21T02:39:17Z</updated>
<author>
<name>John Baldwin</name>
<email>jhb@FreeBSD.org</email>
</author>
<published>2014-07-21T02:39:17Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=d47fc420ca941c9bcdf025f254ec1d20e54034f9'/>
<id>urn:sha1:d47fc420ca941c9bcdf025f254ec1d20e54034f9</id>
<content type='text'>
Add an ioctl to suspend a virtual machine (VM_SUSPEND).

Add logic in the HLT exit handler to detect if the guest has put all vcpus
to sleep permanently by executing a HLT with interrupts disabled.

When this condition is detected the guest with be suspended with a reason of
VM_SUSPEND_HALT and the bhyve(8) process will exit.

This logic can be disabled via the tunable 'hw.vmm.halt_detection'.
</content>
</entry>
<entry>
<title>MFC 259942,262274,263035,263054,263211,263744,264179,264324,264468,264631,</title>
<updated>2014-07-19T22:06:46Z</updated>
<author>
<name>John Baldwin</name>
<email>jhb@FreeBSD.org</email>
</author>
<published>2014-07-19T22:06:46Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=58f2a4bd1a158676f319b6f984c8433767ab82df'/>
<id>urn:sha1:58f2a4bd1a158676f319b6f984c8433767ab82df</id>
<content type='text'>
264648,264650,264651,266572,267558:
Flesh out the AT PIC and 8254 PIT emulations and move them into the kernel.
</content>
</entry>
<entry>
<title>MFC 261638,262144,262506,266765:</title>
<updated>2014-06-12T19:58:12Z</updated>
<author>
<name>John Baldwin</name>
<email>jhb@FreeBSD.org</email>
</author>
<published>2014-06-12T19:58:12Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=de8cfcc7d7471639c6826dd98cb9887136d69c92'/>
<id>urn:sha1:de8cfcc7d7471639c6826dd98cb9887136d69c92</id>
<content type='text'>
Add virtualized XSAVE support to bhyve which permits guests to use XSAVE and
XSAVE-enabled features like AVX.
- Store a per-cpu guest xcr0 register and handle xsetbv VM exits by emulating
  the instruction.
- Only expose XSAVE to guests if XSAVE is enabled in the host.  Only expose
  a subset of XSAVE features currently supported by the guest and for which
  the proper emulation of xsetbv is known.  Currently this includes X87, SSE,
  AVX, AVX-512, and Intel MPX.
- Add support for injecting hardware exceptions into the guest and use this
  to trigger exceptions in the guest for invalid xsetbv operations instead
  of potentially faulting in the host.
- Queue pending exceptions in the 'struct vcpu' instead of directly updating
  the processor-specific VMCS or VMCB. The pending exception will be delivered
  right before entering the guest.
- Rename the unused ioctl VM_INJECT_EVENT to VM_INJECT_EXCEPTION and restrict
  it to only deliver x86 hardware exceptions. This new ioctl is now used to
  inject a protection fault when the guest accesses an unimplemented MSR.
- Expose a subset of known-safe features from leaf 0 of the structured
  extended features to guests if they are supported on the host including
  RDFSBASE/RDGSBASE, BMI1/2, AVX2, AVX-512, HLE, ERMS, and RTM.  Aside
  from AVX-512, these features are all new instructions available for use
  in ring 3 with no additional hypervisor changes needed.
</content>
</entry>
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