FreeBSD source tree https://cgit-dev.freebsd.org/src/atom?h=upstream%2F11.0.0 2011-06-22T21:04:13Z 2011-06-22T21:04:13Z John Baldwin jhb@FreeBSD.org 2011-06-22T21:04:13Z urn:sha1:1368987ae424617c7c314315a5e1b3c222773868 the x86 tree. The $PIR code is still only enabled on i386 and not amd64. While here, make the qpi(4) driver on conditional on 'device pci'. 2011-06-22T18:48:07Z John Baldwin jhb@FreeBSD.org 2011-06-22T18:48:07Z urn:sha1:e8f40e32eb9e2b3040eaf04d05bdb1fce9d3105d Reported by: jkim 2008-08-22T02:14:23Z John Baldwin jhb@FreeBSD.org 2008-08-22T02:14:23Z urn:sha1:d320e05ca5409b1f651ce026c1e2068371181a89 - Rename pciereg_cfgopen() to pcie_cfgregopen() and expose it to the rest of the kernel. It now also accepts parameters via function arguments rather than global variables. - Add a notion of minimum and maximum bus numbers and reject requests for an out of range bus. - Add more range checks on slot/func/reg/bytes parameters to the cfg reg read/write routines. Don't panic on any invalid parameters, just fail the request (writes do nothing, reads return -1). This matches the behavior of the other cfg mechanisms. - Port the memory mapped configuration space access to amd64. On amd64 we simply use the direct map (via pmap_mapdev()) for the memory mapped window. - During acpi_attach() just after loading the ACPI tables, check for a MCFG table. If it exists, call pciereg_cfgopen() on each subtable (memory mapped window). For now we only support windows for domain 0 that start with bus 0. This removes the need for more chipset-specific quirks in the MD code. - Remove the chipset-specific quirks for the Intel 5000P/V/Z chipsets since these machines should all have MCFG tables via ACPI. - Updated pci_cfgregopen() to DTRT if ACPI had invoked pcie_cfgregopen() earlier. MFC after: 2 weeks 2007-11-28T22:20:08Z John Baldwin jhb@FreeBSD.org 2007-11-28T22:20:08Z urn:sha1:98bbce55fa1469293d57ebb30812748b949762f6 - On amd64, just assume type #1 is always used. PCI 2.0 mandated deprecated type #2 and required type #1 for all future bridges which was well before amd64 existed. - For i386, ignore whatever value was in 0xcf8 before testing for type #1 and instead rely on the other tests to determine if type #1 works. Some newer machines leave garbage in 0xcf8 during boot and as a result the kernel doesn't find PCI at all (which greatly confuses ACPI which expects PCI to exist when PCI busses are in the namespace). MFC after: 3 days Discussed with: scottl 2005-01-05T20:17:21Z Warner Losh imp@FreeBSD.org 2005-01-05T20:17:21Z urn:sha1:46280ae71938465be665fb19cf8f7d1ca48a379a 2004-03-13T19:19:13Z Peter Wemm peter@FreeBSD.org 2004-03-13T19:19:13Z urn:sha1:10884719f8216125848e0356d3f628ee247050f9 2003-09-22T22:21:21Z Peter Wemm peter@FreeBSD.org 2003-09-22T22:21:21Z urn:sha1:5bc82d1ce1f36b24364fb5d6778e30ff863d2daa 2003-05-01T01:05:25Z Peter Wemm peter@FreeBSD.org 2003-05-01T01:05:25Z urn:sha1:afa8862328041298fe0c059d65cea406f92bad4b a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt. 2003-02-18T03:36:49Z Peter Wemm peter@FreeBSD.org 2003-02-18T03:36:49Z urn:sha1:af3d516f55be795f88c75c5aa0f927a41f486825 #if'ed out for a while. Complete the deed and tidy up some other bits. We need to be able to call this stuff from outer edges of interrupt handlers for devices that have the ISR bits in pci config space. Making the bios code mpsafe was just too hairy. We had also stubbed it out some time ago due to there simply being too much brokenness in too many systems. This adds a leaf lock so that it is safe to use pci_read_config() and pci_write_config() from interrupt handlers. We still will use pcibios to do interrupt routing if there is no acpi.. [yes, I tested this] Briefly glanced at by: imp 2002-09-06T22:15:44Z John Baldwin jhb@FreeBSD.org 2002-09-06T22:15:44Z urn:sha1:c3ba1376f582ca4d332be0343bd654573450dfa9 supports interrupt routing and if the specified PCI bus is present in the routing table.