src/sys/arm/include/sysarch.h, branch releng/10.2

MFC 262952, 262958, 262966, 262979, 262980, 262986, 262987, 262995, 262997,

2014-05-17T13:53:38Z

263030, 263033, 263034, 263056, 263057, Remove all the redundant external declarations of exception vectors and runtime setting of the pointers that's scattered around various places. Remove all traces of support for ARM chips prior to the arm9 series. Make the default exception handler vectors point to where I thought they were already pointing: the default handlers (not a panic that says there is no default handler). Eliminate irq_dispatch.S. Move the data items it contained into arm/intr.c and the functionality it provided into arm/exception.S. Move the exception vector table (so-called "page0" data) into exception.S and eliminate vectors.S. Change the way the asm GET_CURTHREAD_PTR() macro is defined so that code using it doesn't have to have an "AST_LOCALS" macro somewhere in the file. Arrange for arm fork_trampoline() to return to userland via the standard swi_exit code in exception.S instead of having its own inline expansion of the DO_AST and PULLFRAME macros. Now that the PUSHFRAME and PULLFRAME macros are used only in the swi entry/exit code, they don't need to be macros. Except that didn't work and the whole change was reverted. Remove some unnecessary indirection and jump right to the handler functions. Use panic rather than printf to "handle" an arm26 address exception (should never happen on arm32). Remove the unreferenced DATA() macro. Remove #include from files that don't need it.

- Correct mispellings of the word occurrence

2013-04-17T11:40:10Z

Submitted by: Christoph Mallon (via private mail)

Merging projects/armv6, part 1

2012-08-15T03:03:03Z

Cummulative patch of changes that are not vendor-specific: - ARMv6 and ARMv7 architecture support - ARM SMP support - VFP/Neon support - ARM Generic Interrupt Controller driver - Simplification of startup code for all platforms

Replace the C implementation of __aeabi_read_tp with an assembly version.

2012-04-16T09:38:20Z

This ensures we follow the ABI by preserving registers r1-r3. Reviewed by: jmallett, imp

Fix 2 bugs :

2011-10-16T17:59:28Z

- A race condition could happen if two threads were using RAS at the same time as the code didn't reset RAS_END, the RAS code could believe we were not in a RAS, when we were in fact. - Using signed value logic to compare addresses wasn't such a good idea. Many thanks to Ian to investigate on these issues. Pointy hat to: cognet PR: arm/161498 Submitted by: Ian Lepore

To prevent various race conditions in the RAS code, store and restore the

2009-02-12T23:23:30Z

values in ARM_RAS_START and ARM_RAS_END at context switch time. MFC after: 1 week

Improve ARM_TP_ADDRESS and RAS area.

2008-02-05T10:22:33Z

De-hardcode usage of ARM_TP_ADDRESS and RAS local storage, and move this special purpose page to a more convenient place i.e. after the vectors high page, more towards the end of address space. Previous location (0xe000_0000) caused grief if KVA was to go beyond the default limit. Note that ARM world rebuilding is required after this change since the location of ARM_TP_ADDRESS is shared between kernel and userland. Submitted by: Grzegorz Bernacki (gjb AT semihalf dot com) Reviewed by: imp Approved by: cognet (mentor)

Instead of using sysarch() to store-retrieve the tp, add a magic address,

2005-02-26T18:59:01Z

ARM_TP_ADDRESS, where the tp will be stored. On CPUs that support it, a cache line will be allocated and locked for this address, so that it will never go to RAM. On CPUs that does not, a page is allocated for it (it will be a bit slower, and is wrong for SMP, but should be fine for UP). The tp is still stored in the mdthread struct, and at each context switch, ARM_TP_ADDRESS gets updated. Suggested by: davidxu

Implement two new sysarch for arm, ARM_GET_TP and ARM_SET_TP, to work around

2005-02-25T22:56:16Z

the lack of tls on arm.

Start all license statements with /*-

2005-01-05T21:58:49Z