FreeBSD source tree https://cgit-dev.freebsd.org/src/atom?h=releng%2F10.2 2015-05-23T23:27:00Z 2015-05-23T23:27:00Z Ian Lepore ian@FreeBSD.org 2015-05-23T23:27:00Z urn:sha1:c4c2cd97e621d3609dd7c37177a764ce24b5253e Allow to override default kernel virtual address assignment on ARM. Do not save/restore the TLS pointer on context switch for armv6. 2015-05-23T23:05:31Z Ian Lepore ian@FreeBSD.org 2015-05-23T23:05:31Z urn:sha1:d1b0dbea87fc2ce0c386103b2b05826d228d209e Clean data cache before instruction cache in armv7_icache_sync_range(). Add minimum cache line sizes to struct cpuinfo, use them in the new cache maintenance routines. Also add a routine to invalidate the branch cache. 2015-05-23T22:48:54Z Ian Lepore ian@FreeBSD.org 2015-05-23T22:48:54Z urn:sha1:285cdab07138eed670385f6035cf1f67b3aaf6c3 2015-05-23T17:30:30Z Ian Lepore ian@FreeBSD.org 2015-05-23T17:30:30Z urn:sha1:c09d49e81a21df5322b387e4e46844bb1804022b Add logic for handling new-style ARM cpu ID info. Correct a comment which was exactly backwards from reality. There is no reason to do i+dcache writeback and invalidate when changing the translation table (this may be left over from armv5 days). It's especially bad to do so using a cache operation that isn't coherent on SMP systems. Add casting to make atomic ops work for pointers. (Apparently nobody has ever done atomic ops on pointers before now on arm). Revert incorrect casting. 2015-02-13T23:30:48Z Ian Lepore ian@FreeBSD.org 2015-02-13T23:30:48Z urn:sha1:63f93f094956af8ea84cfc58232247d50fc83dd2 2015-02-13T22:32:02Z Ian Lepore ian@FreeBSD.org 2015-02-13T22:32:02Z urn:sha1:bc5c4e149fb9e4282037de1c09a0382f1d8b6544 r277472, r277473, r277474, r277475, r277476, r277477, r277478, r277479, r277480, r277512, r277516: Add inline implementations of arm bus_space_read/write_N(). Revise the arm bus_space implementation to avoid dereferencing the tag on every operation to retrieve the bs_cookie value almost nothing actually uses. Use the explicit member initializer style to init the bus_space struct. Use arm/bus_space-v6.c for all armv6 systems Consolidate many identical implementations of bus_space to a single common tag and implementation shared by armv4 and armv6. Micro-optimize the new arm inline bus_space implementation by grouping all the data the inline functions access together at the start of the bus_space struct so that they all fit in a single cache line. 2015-02-13T17:53:11Z Ian Lepore ian@FreeBSD.org 2015-02-13T17:53:11Z urn:sha1:9873e0ee81e97108fd7fd6d2cc2ae79fdf798df4 Add accessors for the ARM CP15 performance monitor registers. Move the inclusion of cpu-v6.h inside the #ifdef _KERNEL block. 2015-02-13T16:21:36Z Ian Lepore ian@FreeBSD.org 2015-02-13T16:21:36Z urn:sha1:aff032fe3870dfbb0297c0030922706db06b0bf8 Give suitably-endowed ARMs a register similar to the x86 TSC register. 2015-02-13T02:02:12Z Ian Lepore ian@FreeBSD.org 2015-02-13T02:02:12Z urn:sha1:8e9734d21efccb1b1613e4c27760fefdddcc1918 Split syscall handling out to a separate file. Include sys/kernel.h to pick up the definition of hz in syscall.c Add a new trap-v6.c which has support for all armv7 exceptions. 2015-02-13T00:49:47Z Ian Lepore ian@FreeBSD.org 2015-02-13T00:49:47Z urn:sha1:ac6cf2957679baaa0d2801560a63d8c8cbcb99fb Put in a workaround for bug 196407 (arm modules cause crashes & panics). (Don't allow movw/movt insn in modules.) Fix alignment directives in arm asm code after clang 3.5 import.