<feed xmlns='http://www.w3.org/2005/Atom'>
<title>src/sys/arm64/include/hypervisor.h, branch release/14.3.0</title>
<subtitle>FreeBSD source tree</subtitle>
<id>https://cgit-dev.freebsd.org/src/atom?h=release%2F14.3.0</id>
<link rel='self' href='https://cgit-dev.freebsd.org/src/atom?h=release%2F14.3.0'/>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/'/>
<updated>2024-10-21T15:03:27Z</updated>
<entry>
<title>arm64: Don't trap SVE to EL2</title>
<updated>2024-10-21T15:03:27Z</updated>
<author>
<name>Andrew Turner</name>
<email>andrew@FreeBSD.org</email>
</author>
<published>2024-09-27T13:41:08Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=a16f10ab0aa76d88cc45cc01fae44b94d1873bbc'/>
<id>urn:sha1:a16f10ab0aa76d88cc45cc01fae44b94d1873bbc</id>
<content type='text'>
As with floating point instructions don't trap SVE instructions to the
hypervisor. This lets us handle then in the kernel.

Reviewed by:	imp (earlier version)
Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D43303

(cherry picked from commit fe5ed2496e44aec018a6215175bba225b20d81fd)
</content>
</entry>
<entry>
<title>arm64: Adjust the indentation of CPTR_EL2 values</title>
<updated>2024-10-21T15:03:26Z</updated>
<author>
<name>Andrew Turner</name>
<email>andrew@FreeBSD.org</email>
</author>
<published>2024-09-11T09:38:08Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=2db6ffac249731a6ffc10cbf4072d850d5d7e274'/>
<id>urn:sha1:2db6ffac249731a6ffc10cbf4072d850d5d7e274</id>
<content type='text'>
Reviewed by:	emaste
Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D46513

(cherry picked from commit 7a488d83b3af4d59946319b251a3a2060f18df40)
</content>
</entry>
<entry>
<title>arm64: add additional MDCR_EL2 fields</title>
<updated>2024-10-21T15:03:26Z</updated>
<author>
<name>Zachary Leaf</name>
<email>zachary.leaf@arm.com</email>
</author>
<published>2024-07-03T07:26:34Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=1ee244a9c5da0d965cdac14c92308bd8e73bf57e'/>
<id>urn:sha1:1ee244a9c5da0d965cdac14c92308bd8e73bf57e</id>
<content type='text'>
Monitor Debug Configuration Register provides EL2 configuration options
for self-hosted debug and the Performance Monitors Extension.

Reviewed by:	andrew
Sponsored by:   Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D46191

(cherry picked from commit 610348a90467980de0498fab8dfdddf221d7a604)
</content>
</entry>
<entry>
<title>arm64: Ensure sctlr and pstate are in known states</title>
<updated>2024-09-02T08:48:43Z</updated>
<author>
<name>Andrew Turner</name>
<email>andrew@FreeBSD.org</email>
</author>
<published>2024-07-23T09:18:24Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=0fbb9df20dd88ba448ea622cf40b3855959653fe'/>
<id>urn:sha1:0fbb9df20dd88ba448ea622cf40b3855959653fe</id>
<content type='text'>
Before entering the kernel exception level ensure sctlr_el2 and
sctlr_el1 are in a known state. The EOS flag needs to be set to ensure
an eret instruction is a context synchronization event.

Set spcr_el1 when entering the kernel from EL1 and use an eret
instruction to return to the caller. This ensures the CPU pstate is
consistent with the value in spcr_el1 as it is the only way to set it
directly.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D45528

(cherry picked from commit 034c83fd7d85f57193850a73cc0ac957a211f725)
</content>
</entry>
<entry>
<title>arm64: Support counter access with E2H</title>
<updated>2024-09-02T08:48:25Z</updated>
<author>
<name>Andrew Turner</name>
<email>andrew@FreeBSD.org</email>
</author>
<published>2024-07-23T09:18:00Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=570fae59a8bf9ded19c4de9bf001ee0fa2cf7229'/>
<id>urn:sha1:570fae59a8bf9ded19c4de9bf001ee0fa2cf7229</id>
<content type='text'>
When entering the kernel with the E2H field set the layout of the
cnthctl_el2 register changes. Use the correct field locations to enable
access to the counter and timer registers from EL1.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D45529

(cherry picked from commit 997511dffe651e1d2d708f37f2ced430a6ab3349)
</content>
</entry>
<entry>
<title>arm64: Add a macro to find a VM fault address</title>
<updated>2024-07-15T12:22:07Z</updated>
<author>
<name>Andrew Turner</name>
<email>andrew@FreeBSD.org</email>
</author>
<published>2024-02-21T18:17:47Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=c7c27e9ebfdbd8e46f7af9aeee2a4c407e102981'/>
<id>urn:sha1:c7c27e9ebfdbd8e46f7af9aeee2a4c407e102981</id>
<content type='text'>
Add a macro to find which bits from far_el2 are needed to be copied
to get the full intermediate physical address (IPA).

The hpfar_el2 register only contains a 4k aligned fault address. We
need to include the lower bits from far_el2 if we need the full
faulting IPA.

(cherry picked from commit b3bbec37ba039a46f7166f6fa3571f38da4253e9)
</content>
</entry>
<entry>
<title>arm64: Add the TCR_EL2.PS mask</title>
<updated>2024-07-15T12:21:55Z</updated>
<author>
<name>Andrew Turner</name>
<email>andrew@FreeBSD.org</email>
</author>
<published>2024-02-21T18:16:43Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=f9878b9c8efa6c0cc43503851831d5525aa0a28e'/>
<id>urn:sha1:f9878b9c8efa6c0cc43503851831d5525aa0a28e</id>
<content type='text'>
(cherry picked from commit 9c52f98c9f1abfe6577335522b6007659f759adc)
</content>
</entry>
<entry>
<title>arm64: Add register definitions for MDCR_EL2</title>
<updated>2023-12-08T14:23:52Z</updated>
<author>
<name>Mark Johnston</name>
<email>markj@FreeBSD.org</email>
</author>
<published>2023-12-01T18:28:58Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=4161f141aa798a90da77daacf7c5425a2b99f9b8'/>
<id>urn:sha1:4161f141aa798a90da77daacf7c5425a2b99f9b8</id>
<content type='text'>
This is needed to support the bhyve gdb stub implementation on arm64.

Reviewed by:	andrew
MFC after:	1 week
Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D42867

(cherry picked from commit 4f12883c360dbb03562f11713e711e3a3a330a0f)
</content>
</entry>
<entry>
<title>sys: Remove $FreeBSD$: two-line .h pattern</title>
<updated>2023-08-16T17:54:11Z</updated>
<author>
<name>Warner Losh</name>
<email>imp@FreeBSD.org</email>
</author>
<published>2023-08-16T17:54:11Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=95ee2897e98f5d444f26ed2334cc7c439f9c16c6'/>
<id>urn:sha1:95ee2897e98f5d444f26ed2334cc7c439f9c16c6</id>
<content type='text'>
Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/
</content>
</entry>
<entry>
<title>arm64: set FPEN if we're stuck with HCR_EL2.E2H</title>
<updated>2023-02-28T22:16:14Z</updated>
<author>
<name>Kyle Evans</name>
<email>kevans@FreeBSD.org</email>
</author>
<published>2023-02-24T19:37:20Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=dc8616edc580806afb1efaec1cdc3cc9a1b3804e'/>
<id>urn:sha1:dc8616edc580806afb1efaec1cdc3cc9a1b3804e</id>
<content type='text'>
On Apple Silicon systems, E2H can't actually be cleared; we're stuck
with it.  Check it again when we're setting up CPTR_EL2 and set FPEN
appropriately to avoid later trapping to EL2 on writes to SIMD
registers.

Reviewed by:	andrew
Differential Revision:	https://reviews.freebsd.org/D38819
</content>
</entry>
</feed>
