<feed xmlns='http://www.w3.org/2005/Atom'>
<title>src/sys/arm64/include, branch release/14.3.0</title>
<subtitle>FreeBSD source tree</subtitle>
<id>https://cgit-dev.freebsd.org/src/atom?h=release%2F14.3.0</id>
<link rel='self' href='https://cgit-dev.freebsd.org/src/atom?h=release%2F14.3.0'/>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/'/>
<updated>2025-03-15T07:05:23Z</updated>
<entry>
<title>arm64: bus: Add 36-bit address mask for use in bus space allocations</title>
<updated>2025-03-15T07:05:23Z</updated>
<author>
<name>Ka Ho Ng</name>
<email>khng@FreeBSD.org</email>
</author>
<published>2025-02-06T21:26:03Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=fa301530e0ca3a762c5dbf0bb8f3411ea5ba0e13'/>
<id>urn:sha1:fa301530e0ca3a762c5dbf0bb8f3411ea5ba0e13</id>
<content type='text'>
Obtained from:	Juniper Networks, Inc.
MFC after:	1 week
Reviewed by:	imp
Differential Revision:	https://reviews.freebsd.org/D44764

(cherry picked from commit 5484c3d6eb31a78f07ed5e66862a1e7d3b5225b6)
</content>
</entry>
<entry>
<title>atomics: Constify loads</title>
<updated>2025-01-16T18:06:53Z</updated>
<author>
<name>Olivier Certner</name>
<email>olce@FreeBSD.org</email>
</author>
<published>2024-07-19T15:23:19Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=1fc5db8e9f4b10fed01fc1c07d0e5725c4089b97'/>
<id>urn:sha1:1fc5db8e9f4b10fed01fc1c07d0e5725c4089b97</id>
<content type='text'>
In order to match reality, allow using these functions with pointers on
const objects, and bring us closer to C11.

Remove the '+' modifier in the atomic_load_acq_64_i586()'s inline asm
statement's constraint for '*p' (the value to load).  CMPXCHG8B always
writes back some value, even when the value exchange does not happen in
which case what was read is written back.  atomic_load_acq_64_i586()
further takes care of the operation atomically writing back the same
value that was read in any case.  All in all, this makes the inline
asm's write back undetectable by any other code, whether executing on
other CPUs or code on the same CPU before and after the call to
atomic_load_acq_64_i586(), except for the fact that CMPXCHG8B will
trigger a #GP(0) if the memory address is part of a read-only mapping.
This unfortunate property is however out of scope of the C abstract
machine, and in particular independent of whether the 'uint64_t' pointed
to is declared 'const' or not.

Approved by:    markj (mentor)
MFC after:      5 days
Sponsored by:   The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D46887

(cherry picked from commit 5e9a82e898d55816c366cfa3ffbca84f02569fe5)
</content>
</entry>
<entry>
<title>atomic(9): Implement atomic_testand(clear|set)_ptr</title>
<updated>2024-12-01T02:46:08Z</updated>
<author>
<name>John Baldwin</name>
<email>jhb@FreeBSD.org</email>
</author>
<published>2024-11-19T15:24:50Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=b291c7168a7840a74c4e976a91dec21ff0f1e4ce'/>
<id>urn:sha1:b291c7168a7840a74c4e976a91dec21ff0f1e4ce</id>
<content type='text'>
For current architectures, these are just aliases for the existing
operation on the relevant scalar integer.

Reviewed by:	imp, kib
Obtained from:	CheriBSD
Sponsored by:	AFRL, DARPA
Differential Revision:	https://reviews.freebsd.org/D47631

(cherry picked from commit a80b9ee15aa0f2da9f9f0c48e13324e0e5f2e840)
</content>
</entry>
<entry>
<title>arm64: Stop trashing x28 in savectx</title>
<updated>2024-10-21T15:03:27Z</updated>
<author>
<name>Andrew Turner</name>
<email>andrew@FreeBSD.org</email>
</author>
<published>2024-10-15T08:30:17Z</published>
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<id>urn:sha1:ce5a07a9d2c58b65bbce5609834af63c5ff7e85d</id>
<content type='text'>
While here make it return void, we don't set any useful return value
and nothing checks for it.

Sponsored by:	Arm Ltd

(cherry picked from commit a7c5c88cb29ff512467a6599f1b4d8e2b8817480)
</content>
</entry>
<entry>
<title>arm64: Enable SVE in userspace</title>
<updated>2024-10-21T15:03:27Z</updated>
<author>
<name>Andrew Turner</name>
<email>andrew@FreeBSD.org</email>
</author>
<published>2024-09-27T14:06:03Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=1f9635e2c213368cfed3737970f3814fbb55a922'/>
<id>urn:sha1:1f9635e2c213368cfed3737970f3814fbb55a922</id>
<content type='text'>
Report when SVE is present and allow it to be used by calling
sve_restore_state on an SVE exception from userspace.

Reviewed by:	kib
Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D43310

(cherry picked from commit 205c1007be6d57b2eb8620f79384cb2299dde40e)
</content>
</entry>
<entry>
<title>arm64: Don't trap SVE to EL2</title>
<updated>2024-10-21T15:03:27Z</updated>
<author>
<name>Andrew Turner</name>
<email>andrew@FreeBSD.org</email>
</author>
<published>2024-09-27T13:41:08Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=a16f10ab0aa76d88cc45cc01fae44b94d1873bbc'/>
<id>urn:sha1:a16f10ab0aa76d88cc45cc01fae44b94d1873bbc</id>
<content type='text'>
As with floating point instructions don't trap SVE instructions to the
hypervisor. This lets us handle then in the kernel.

Reviewed by:	imp (earlier version)
Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D43303

(cherry picked from commit fe5ed2496e44aec018a6215175bba225b20d81fd)
</content>
</entry>
<entry>
<title>arm64: Support SVE in ptrace and core dumps</title>
<updated>2024-10-21T15:03:27Z</updated>
<author>
<name>Andrew Turner</name>
<email>andrew@FreeBSD.org</email>
</author>
<published>2024-09-27T13:37:17Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=f7caa6fb7489b7e9721f064e39050614ae0fc875'/>
<id>urn:sha1:f7caa6fb7489b7e9721f064e39050614ae0fc875</id>
<content type='text'>
Add the NT_ARM_SVE note type and use it to access the SVE registers
from ptrace. This allows userspace to modify the full SVE register
values.

Try to follow the Linux semantics to allow debuggers to use this with
minimal changes.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D43309

(cherry picked from commit aab60068943d733b0b4573e5481c543ab3d45a00)
</content>
</entry>
<entry>
<title>arm64: Add an SVE sysarch</title>
<updated>2024-10-21T15:03:26Z</updated>
<author>
<name>Andrew Turner</name>
<email>andrew@FreeBSD.org</email>
</author>
<published>2024-09-27T13:37:10Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=aa594ddcc85459ed342694816df26434e96ba88a'/>
<id>urn:sha1:aa594ddcc85459ed342694816df26434e96ba88a</id>
<content type='text'>
To allow for user space to read the SVE vector length add a sysarch
handler to return the value to userspace.

Reviewed by:	imp
Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D43308

(cherry picked from commit 87a58d931db7b40d8d225a7edb82b78937078b7f)
</content>
</entry>
<entry>
<title>arm64: Add the SVE registers to the signal frame</title>
<updated>2024-10-21T15:03:26Z</updated>
<author>
<name>Andrew Turner</name>
<email>andrew@FreeBSD.org</email>
</author>
<published>2024-09-27T13:37:03Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=7588c7024ed9b3d9845529edd56e46b675430a02'/>
<id>urn:sha1:7588c7024ed9b3d9845529edd56e46b675430a02</id>
<content type='text'>
Use the new extended register support in the arm64 signal frame to
handle the SVE registers.

As these registers alias the VFP registers we use the floating point
register values to restore the lower bits of the SVE registers. This
is to support software that doesn't understand SVE to continue working.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D43307

(cherry picked from commit e45132e978030f0aa964d975a9fbad5614f260bd)
</content>
</entry>
<entry>
<title>arm64: Initial SVE support</title>
<updated>2024-10-21T15:03:26Z</updated>
<author>
<name>Andrew Turner</name>
<email>andrew@FreeBSD.org</email>
</author>
<published>2024-09-27T13:36:35Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=2c5961fff4e5f31079d69e57105132ef9685ca53'/>
<id>urn:sha1:2c5961fff4e5f31079d69e57105132ef9685ca53</id>
<content type='text'>
Add initial kernel support for SVE. This detects if SVE is present on
all CPUs, and if so allows for the use of SVE in the future.

As the SVE registers are a superset of the VFP registers we don't need
to restore the VFP registers when SVE is enabled.

Ths interface to enable SVE is provided, but not used until SVE is
supported in signals and with ptrace.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D43306

(cherry picked from commit 332c426328dbb30a6b2e69d9b1e8298d77d85bd1)
</content>
</entry>
</feed>
