src/sys/arm64/include, branch releng/13.4

arm64: Fix indentation to be consistent

2024-07-15T12:35:21Z

Adjust the mair_el1 macro indentation to be consistent with the surrounding macros. Reviewed by: emaste Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D45524 (cherry picked from commit 86bafddd61aba115bc46bcf1d7e0afb125850b5f)

arm64: Add the pointer auth registers to armreg.h

2024-07-15T12:34:29Z

Add the pointer authentication registers to armreg.h. These will be used to support pointer authentication in a kernel built with GCC. Reviewed by: jhb Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D45262 (cherry picked from commit 57d714a23f5ce21e389d53636b8bc6c1b45d518e)

arm64: Use the UL macro in TCR_EL1 defines

2024-07-15T12:34:29Z

While clang can handle numbers with a UL suffix in assembly files gcc/gas is unable to. Switch to use the UL macro for TCR_EL1 defines as some are used in locore.S Reviewed by: brooks, jhb Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D45261 (cherry picked from commit 29c1cf9860e531146220d9dc3596e4c79f91cfcd)

arm64: add PMBSR_MSS_{BSC,FSC} status code field

2024-07-15T12:34:29Z

Bits [5:0] of PMBSR_MSS encodes either Buffer Status Code (BSC) or Fault Status Code (FSC) depending on PMBSR_EC value. Add PMBSR_MSS_{BSC,FSC} to cover this field. Reviewed by: andrew Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D45172 (cherry picked from commit 10b3eac88db689d657c4d0d0716bcbdf240ff614)

arm64: make SPE regs use ALT_NAME macro

2024-07-15T12:34:29Z

When the register is not defined in Armv8.0 i.e. added in a later extension, like SPE added in v8.2, the alternative name format of: S__C_C_ should be used; otherwise, calls to {READ,WRITE}_SPECIALREG() will fail. Use the MRS_REG_ALT_NAME() macro for SPE changing hex to decimal as required by the macro. Reviewed by: andrew Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D45171 (cherry picked from commit f7bdaa103eb8906fc999c7fd5e8d6af440e26e6c)

arm64: Add MRS_REG_ALT_NAME ID register macros

2024-07-15T12:34:29Z

These can be used even when the compiler is too old for the register to be included. Reviewed by: Zachary Leaf Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D45176 (cherry picked from commit d6d860c7ff5c4cbe9475d98000407d6f0ea84b47)

am64: Allow cpu.h to be included from assembly

2024-07-15T12:34:28Z

Reviewed by: jhibbits, kevans Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D45081 (cherry picked from commit e353ac0cfd5d155c01253ee17c2bf23f888cb7de)

arm64: Add EL1 hardware breakpoint exceptions

2024-07-15T12:34:28Z

Reviewed by: jhb Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D44353 (cherry picked from commit c802b486ddfd796ea35b770148af9a5b0cd0ee64)

arm64: Add a macro to find a VM fault address

2024-07-15T12:34:28Z

Add a macro to find which bits from far_el2 are needed to be copied to get the full intermediate physical address (IPA). The hpfar_el2 register only contains a 4k aligned fault address. We need to include the lower bits from far_el2 if we need the full faulting IPA. (cherry picked from commit b3bbec37ba039a46f7166f6fa3571f38da4253e9)

arm64: Add the TCR_EL2.PS mask

2024-07-15T12:34:28Z

(cherry picked from commit 9c52f98c9f1abfe6577335522b6007659f759adc)