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<title>src/sys/dev/alc, branch releng/10.2</title>
<subtitle>FreeBSD source tree</subtitle>
<id>https://cgit-dev.freebsd.org/src/atom?h=releng%2F10.2</id>
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<updated>2015-03-26T05:12:30Z</updated>
<entry>
<title>MFC r277907:</title>
<updated>2015-03-26T05:12:30Z</updated>
<author>
<name>Pyun YongHyeon</name>
<email>yongari@FreeBSD.org</email>
</author>
<published>2015-03-26T05:12:30Z</published>
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<id>urn:sha1:6315fea1da76d9816c590a6061a04f05afea20fa</id>
<content type='text'>
  Correct device description message.
</content>
</entry>
<entry>
<title>MFC r272730,273018:</title>
<updated>2014-10-21T04:48:49Z</updated>
<author>
<name>Pyun YongHyeon</name>
<email>yongari@FreeBSD.org</email>
</author>
<published>2014-10-21T04:48:49Z</published>
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<id>urn:sha1:b7ea0829f573839ed0716635eec18180a1b607f7</id>
<content type='text'>
  Add support for QAC AR816x/AR817x Gigabit/Fast Ethernet controllers.
  These controllers seem to have the same feature of AR813x/AR815x and
  improved RSS support(4 TX queues and 8 RX queues).  alc(4) supports
  all hardware features except RSS.  I didn't implement RX checksum
  offloading for AR816x/AR817x just because I couldn't get
  confirmation from the Vendor whether AR816x/AR817x corrected its
  predecessor's RX checksum offloading bug on fragmented packets.
  This change adds supports for the following controllers.
   o AR8161 PCIe Gigabit Ethernet controller
   o AR8162 PCIe Fast Ethernet controller
   o AR8171 PCIe Gigabit Ethernet controller
   o AR8172 PCIe Fast Ethernet controller
   o Killer E2200 Gigabit Ethernet controller

  Relnotes:	yes
</content>
</entry>
<entry>
<title>MFC r272721:</title>
<updated>2014-10-21T01:14:56Z</updated>
<author>
<name>Pyun YongHyeon</name>
<email>yongari@FreeBSD.org</email>
</author>
<published>2014-10-21T01:14:56Z</published>
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<id>urn:sha1:ea9a26977fc7fd5204770ace4f9087f39ab51c5a</id>
<content type='text'>
  Fix a long standing bug in MAC statistics register access.  One
  additional register was erroneously added in the MAC register set
  such that 7 TX statistics counters were wrong.
</content>
</entry>
<entry>
<title>MFC r263957:</title>
<updated>2014-04-14T04:51:59Z</updated>
<author>
<name>Pyun YongHyeon</name>
<email>yongari@FreeBSD.org</email>
</author>
<published>2014-04-14T04:51:59Z</published>
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<id>urn:sha1:a4908ea27c1f209f3665f6c072ab50bd5aa67503</id>
<content type='text'>
  Increase the number of TX DMA segments from 32 to 35.  It turned
  out 32 is not enough to support a full sized TSO packet.
  While I'm here fix a long standing bug introduced in r169632 in
  bce(4) where it didn't include L2 header length of TSO packet in
  the maximum DMA segment size calculation.
</content>
</entry>
<entry>
<title>Mechanically substitute flags from historic mbuf allocator with</title>
<updated>2012-12-04T09:32:43Z</updated>
<author>
<name>Gleb Smirnoff</name>
<email>glebius@FreeBSD.org</email>
</author>
<published>2012-12-04T09:32:43Z</published>
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<id>urn:sha1:c6499eccad497913a5025fbde8ae76da70e08043</id>
<content type='text'>
malloc(9) flags in sys/dev.
</content>
</entry>
<entry>
<title>Switch some PCI register reads from using magic numbers to using the names</title>
<updated>2012-09-19T12:27:23Z</updated>
<author>
<name>Gavin Atkinson</name>
<email>gavin@FreeBSD.org</email>
</author>
<published>2012-09-19T12:27:23Z</published>
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<id>urn:sha1:e935190a33f7a00291fa9cdfae3338cd99590826</id>
<content type='text'>
defined in pcireg.h

MFC after:	1 week
</content>
</entry>
<entry>
<title>Align the PCI Express #defines with the style used for the PCI-X</title>
<updated>2012-09-18T22:04:59Z</updated>
<author>
<name>Gavin Atkinson</name>
<email>gavin@FreeBSD.org</email>
</author>
<published>2012-09-18T22:04:59Z</published>
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<id>urn:sha1:389c8bd51ead1f1c111e8f8baad65762f6823ff4</id>
<content type='text'>
#defines.  This also has the advantage that it makes the names more
compact, iand also allows us to correct the non-uniform naming of
the PCIM_LINK_* defines, making them all consistent amongst themselves.

This is a mostly mechanical rename:
  s/PCIR_EXPRESS_/PCIER_/g
  s/PCIM_EXP_/PCIEM_/g
  s/PCIM_LINK_/PCIEM_LINK_/g

When this is MFC'd, #defines will be added for the old names to assist
out-of-tree drivers.

Discussed with:	jhb
MFC after:	1 week
</content>
</entry>
<entry>
<title>Close a race where SIOCGIFMEDIA ioctl get inconsistent link status.</title>
<updated>2011-10-17T19:49:00Z</updated>
<author>
<name>Pyun YongHyeon</name>
<email>yongari@FreeBSD.org</email>
</author>
<published>2011-10-17T19:49:00Z</published>
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<id>urn:sha1:57c81d92aecb49b57e84691af0306d24ded3754a</id>
<content type='text'>
Because driver is accessing a common MII structure in
mii_pollstat(), updating user supplied structure should be done
before dropping a driver lock.

Reported by:	Karim (fodillemlinkarimi &lt;&gt; gmail dot com)
</content>
</entry>
<entry>
<title>Disable PHY hibernation until I get more detailed hibernation</title>
<updated>2011-08-22T20:33:05Z</updated>
<author>
<name>Pyun YongHyeon</name>
<email>yongari@FreeBSD.org</email>
</author>
<published>2011-08-22T20:33:05Z</published>
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<id>urn:sha1:462d5251d71770e43cf723971f40d8ccf4300be0</id>
<content type='text'>
programming secret.  The PHY would go into sleep state when it
detects no established link and it will re-establish link when the
cable is plugged in.  Previously it failed to re-establish link
when the cable is plugged in such that it required to manually down
and up the interface again to make it work.  This came from
incorrectly programmed hibernation parameters.  According to
Atheros, each PHY chip requires different configuration for
hibernation and different vendor has different settings for the
same chip.
Disabling hibernation may consume more power but establishing link
looks more important than saving power.
Special thanks to Atheros for giving me instructions that disable
hibernation.

MFC after:	1 week
Approved by:	re (kib)
</content>
</entry>
<entry>
<title>Fix typo.</title>
<updated>2011-05-19T23:13:08Z</updated>
<author>
<name>Pyun YongHyeon</name>
<email>yongari@FreeBSD.org</email>
</author>
<published>2011-05-19T23:13:08Z</published>
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<id>urn:sha1:83ad330dd5a0179c32b49c58443d78f6db04df36</id>
<content type='text'>
Submitted by:	brad at OpenBSD
</content>
</entry>
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