src/sys/dev/bge, branch releng/7.3

MFC r202268:

2010-01-23T01:20:59Z

o Add PCI ID for BCM 5756. o Don't enable BGE_FLAG_BER_BUG on both 5722 and 5756, and based on their PCI IDs rather than their chip IDs. Reported by: several PC-BSD users via kmoore Reviewed by: yongari, imp, jhb, davidch Sponsored by: iXsystems, Inc.

MFC r202406:

2010-01-21T00:54:22Z

Don't free mbuf chains when bge(4) fails to collapse the mbuf chains. This part of code is to enhance performance so failing the collapsing should not free TX frames. Otherwise bge(4) will unnecessarily drop frames which in turn can freeze the network connection. Reported by: Igor Sysoev (is <> rambler-co dot ru) Tested by: Igor Sysoev (is <> rambler-co dot ru)

MFC r202293:

2010-01-21T00:46:54Z

For controllers that has dual mode PHY(copper or fiber) interfaces over GMII, make sure to enable GMII. With this change brgphy(4) is used to handle the dual mode PHY. Since we still don't have a sane way to pass PHY specific information to mii(4) layer special handling is needed in brgphy(4) to determine which mode of PHY was configured in parent interface. This change make BCM5715S work. Tested by: olli Obtained from: OpenBSD PR: kern/122551

MFC r200088,200227-200228,200246,200264,201446

2010-01-07T00:57:40Z

r200088: Add workaround to overcome hardware limitation which allows only a single outstanding DMA read operation. Most controllers targeted to client with PCIe bus interface(e.g. BCM5761) may have this limitation. All controllers for servers does not have this limitation. Collapsing mbuf chains to reduce number of memory reads before transmitting was most effective way to workaround this. I got about 940Mbps from 850Mbps with mbuf collapsing on BCM5761. However it takes a lot of CPU cycles to collapse mbuf chains so add tunable to control the number of allowed TX buffers before collapsing. The default value is 0 which effectively disables the forced collapsing. For most cases 2 would yield best performance(about 930Mbps) without much sacrificing CPU cycles. Note the collapsing is only activated when the controller is on PCIe bus and the frame does not need TSO operation. TSO does not seem to suffer from the hardware limitation because the payload size is much bigger than normal IP datagram. Thanks to davidch@ who told me the limitation of client controllers and actually gave possible workarounds to mitigate the limitation. r200227: Remove PHY isolate/power down code in bge_stop(). The isolation handler in brgphy(4) does not exist and brgphy(4) just resets the PHY and returns EINVAL as it has no isolation handler. I also agree on Marius's opinion that stop handler of every NIC driver seems to be the wrong place for implementing PHY isolate/power down. If we need PHY isolate/power down it should be implemented in brgphy(4) and users should administratively down the PHY. r200228: Don't access jumbo frame related registers if controller lacks the feature. These registers are reserved on controllers that have no support for jumbo frame. Only BCM5700 has mini ring so do not poke mini ring related registers if controller is not BCM5700. r200246: Partially revert r200228. For mini RCB case, bge(4) still have to disable mini ring withtout regard to mini ring support. r200264: Create sysctl node(dev.bge.%d.focred_collapse) instead of hw.bge.forced_collapse. hw.bge.forced_collapse affects all bge(4) controllers on system which may not desirable behavior of the sysctl node. Also allow the sysctl node could be modified at any time. r201446: Fix regression introduced in r198318. BCM5754/BCM5754M uses the same ASIC ID of BCM5758 such that r198318 incorecctly enabled TSO on BCM5754.BCM5754M controllers. BCM5754/BCM5754M needs a special firmware to enable TSO and bge(4) does not support firmware based TSO.

MFC r199670-199671,199674,199679,199761,199807-199808

2010-01-07T00:48:10Z

r199670: Fix two long standing bugs on bge(4). Most pre BCM5755 controllers have a DMA bug when buffer address crosses a multiple of the 4GB boundary(e.g. 4GB, 8GB, 12GB etc). Limit DMA address to be within 4GB address for these controllers. The second DMA bug limits DMA address to be within 40bit address space. This bug applies to BCM5714 and BCM5715 and 5708(bce(4) controller). This is not actually a MAC controller bug but an issue with the embedded PCIe to PCI-X bridge in the device. So for BCM5714/BCM5715 controllers also limit the DMA address to be within 40bit address space. Special thanks to davidch@ who gave me detailed errata information. I think this change will fix long standing bge(4) instability issues on systems with more than 4GB memory. r199671: Implement TSO for BCM5755 or newer controllers. Some controllers seem to require a special firmware to use TSO. But the firmware is not available to FreeBSD and Linux claims that the TSO performed by the firmware is slower than hardware based TSO. Moreover the firmware based TSO has one known bug which can't handle TSO if ethernet header + IP/TCP header is greater than 80 bytes. The workaround for the TSO bug exist but it seems it's too expensive than not using TSO at all. Some hardwares also have the TSO bug so limit the TSO to the controllers that are not affected TSO issues (e.g. 5755 or higher). While I'm here set VLAN tag bit to all descriptors that belengs to a frame instead of the first descriptor of a frame. The datasheet is not clear how to handle VLAN tag bit but it worked either way in my testing. This makes it simplify TSO configuration a little bit. Big thanks to davidch@ who sent me detailed TSO information. Without this I was not able to implement it. r199674: Add missing function prototype in r199671. r199679: Reduce status block size DMAed by controller. bge(4) uses single Tx/Rx/Rx return ring such that large part of status block was not used at all. All bge(4) controllers except BCM5700 AX/BX has a feature to control the size of status block. So use minimum status block size allowed in controller. This reduces number of DMAed status block size to 32 bytes from 80 bytes. r199761: BGE_FLAG_40BIT_BUG should be set before creating DMA tags. r199807: Make sure one shot MSI is enabled. r199808: Fix typo which inversed the logic which in turn disabled MSI.

MFC r199667-199668

2010-01-07T00:04:29Z

r199667: Cache Rx producer/Tx consumer index as soon as we know status block update and then clear status block. Previously it used to access these index without synchronization which may cause problems when bounce buffers are used. Also add missing bus_dmamap_sync(9) in polling handler. Since we now update status block in driver, adjust bus_dmamap_sync(9) for status block. r199668: For MSI case, interrupt is not shared and we don't need to force PCI flush to get correct status block update. Add an optimized interrupt handler that is activated for MSI case. Actual interrupt handling is done by taskqueue such that the handler does not require driver lock for Rx path. The MSI capable bge(4) controllers automatically disables further interrupt once it enters interrupt state so we don't need PIO access to disable interrupt in interrupt handler.

MFC r196370:

2010-01-06T23:57:17Z

- Do not try to reevaluate current RX production index on each loop iteration as it can be updated by the card while we process the RX ring forcing us to process RX descriptors for which DMA synchronisation operation has not been performed. This fixes the bug when bge(4) drops packets under high load.

MFC 199663-199666

2010-01-06T23:37:13Z

r199663: Due to newly added PCIe capabilities fallback code for finding the PCIe capability did not work right on recent controllers. Remove FreeBSD 6.x support code. r199664: Use capability pointer to access PCIe registers rather than directly access them at fixed address. While I'm here don't touch other bits of PCIe device control register except max payload size. r199665: Controller does not write Rx descriptors, remove BUS_DMASYNC_PREREAD. r199666: Rearrange bge_start_locked to see we can send more frames by checking IFF_DRV_RUNNING and IFF_DRV_OACTIVE flags. Also if we have less than 16 free send BDs set IFF_DRV_OACTIVE and try it later. Previously bge(4) used to reserve 16 free send BDs after loading dma maps but hardware just need one reserved send BD. If prouder index has the same value of consumer index it means the Tx queue is empty. While I'm here check IFQ_DRV_IS_EMPTY first to save one lock operation.

MFC r199065,199115-199116,199153,199661-199662

2010-01-06T23:28:39Z

r199065: Correct disabling checksum offloading for BCM5700 B0. r199115: Add missing bus_dmamap_sync(9) before issuing kick command. r199116: Zero out Tx/Rx descriptors before using them. Also add missing bus_dmamap_sync(9) after Tx descriptor initialization. r199153: Controller does not update Tx descriptors(send BDs) after sending frames so remove unnecessary BUS_DMASYNC_PREREAD and BUS_DMASYNC_POSTREAD of bus_dmamap_sync(9). r199661: Remove extra white space. r199662: Fix typo introduced in r199011.

MFC r198967,199009-199011,199014,199020,199035-199036,199054

2010-01-06T23:15:07Z

r198967: Correct MSI mode register bits. r199009: bge(4) already switched to use UMA backed page allocator and local memory allocator for jumbo frame was removed long time ago. Remove no more used macros. r199010: Do bus_dmamap_sync call only if frame size is greater than standard buffer size. If controller is not capable of handling jumbo frame, interface MTU couldn't be larger than standard MTU which in turn the received should be fit in standard buffer. This fixes bus_dmamap_sync call for jumbo ring is called even if interface is configured to use standard MTU. Also if total frame size could be fit into standard buffer don't use jumbo buffers. r199011: Reimplement Rx buffer allocation to handle dma map load failure. Introduce two spare dma maps for standard buffer and jumbo buffer respectively. If loading a dma map failed reuse previously loaded dma map. This should fix unloaded dma map is used in case of dma map load failure. Also don't blindly unload dma map and defer dma map sync and unloading operation until we know dma map for new buffer is successfully loaded. This change saves unnecessary dma load/unload operation. Previously bge(4) tried to reuse mbuf with unloaded dma map which is really bad thing in bus_dma(9) perspective. While I'm here update if_iqdrops if we can't allocate Rx buffers. r199014: Fix I mssied in r199011. Rx ring index also should be updated. If we fill Rx ring full instead of half we can simplify this logic but this requires more experimentation. r199020: Tell upper layer we support long frames. ether_ifattach() initializes it to ETHER_HDR_LEN so we have to override it after calling ether_ifattch(). While I'm here remove setting if_mtu value, it's initialized in ether_ifattach(). r199035: Don't count input errors twice, we always read input errors from MAC in bge_tick. Previously it used to show more number of input errors. I noticed actual input errors were less than 8% even for 64 bytes UDP frames generated by netperf. Since we always access BGE_RXLP_LOCSTAT_IFIN_DROPS register in bge_tick, remove useless code protected by #ifdef notyet. r199036: Count number of inbound packets which were chosen to be discarded as input errors. Also count out of receive BDs as input errors. r199054: Partially revert r199035. Revision 1.158 says only lower ten bits of BGE_RXLP_LOCSTAT_IFIN_DROPS register is valid. For BCM5761 case it seems the controller maintains 16bits value for the register. However 16bits are still too small to count all dropped packets happened in a second. To get a correct counter we have to read the register in bge_rxeof() which would be too expensive.