FreeBSD source tree https://cgit-dev.freebsd.org/src/atom?h=main 2024-12-16T19:27:23Z 2024-12-16T19:27:23Z Jari Sihvola jsihv@gmx.com 2024-12-16T19:26:12Z urn:sha1:35a2229b67914ff1a4bae6334ad5015aa603967a This is identical to AON clocks. The only difference is BUS_PASS_ORDER_LAST which was needed for some reason. This has clocks needed by PCIe controller driver. Reviewed by: mhorne MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D47920 2024-12-16T19:27:23Z Jari Sihvola jsihv@gmx.com 2024-12-16T19:21:50Z urn:sha1:ce3fbcdd14a1a2ef90890fb8da9592fb4c349b35 This patch adds some SYS clocks for StarFive JH7110. They are necessary for getting STG clocks and PCIe driver working. Reviewed by: mhorne MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D47981 2024-05-07T16:07:36Z Jari Sihvola jsihv@gmx.com 2024-05-07T16:06:20Z urn:sha1:0612538e3ac93c1884f595a72609c078aefbcc28 Implement a core clknode driver for the JH7110 (StarFive VisionFive v2) platform. Add clock/reset generator drivers for the PLL, SYS, and AON clock groupings. Co-authored-by: mhorne Reviewed by: mhorne Sponsored by: The FreeBSD Foundation (mhorne's contributions) Differential Revision: https://reviews.freebsd.org/D43037 2024-05-07T16:05:31Z Mitchell Horne mhorne@FreeBSD.org 2024-05-07T16:05:31Z urn:sha1:6ea05fce8e2e63b3c2547719ff9a84207e2132b4 I did not set the author field properly; revert to fix this. This reverts commit 5d6d6278979b9eab598a23c804d23e930d2f7268. 2024-05-07T16:02:57Z Mitchell Horne mhorne@FreeBSD.org 2024-05-06T17:10:01Z urn:sha1:5d6d6278979b9eab598a23c804d23e930d2f7268 Implement a core clknode driver for the JH7110 (StarFive VisionFive v2) platform. Add clock/reset generator drivers for the PLL, SYS, and AON clock groupings. Co-authored-by: mhorne Reviewed by: mhorne Sponsored by: The FreeBSD Foundation (mhorne's contributions) Differential Revision: https://reviews.freebsd.org/D43037