FreeBSD source tree https://cgit-dev.freebsd.org/src/atom?h=releng%2F7.3 2009-08-15T16:15:50Z 2009-08-15T16:15:50Z Stanislav Sedov stas@FreeBSD.org 2009-08-15T16:15:50Z urn:sha1:b966e2259cbae4b6cafcfeee614a95fd01442757 - Add support to atomically set/clear individual bits of a MSR register via cpuctl(4) driver. Two new CPUCTL_MSRSBIT and CPUCTL_MSRCBIT ioctl(2) calls treat the data field of the argument struct passed as a mask and set/clear bits of the MSR register according to the mask value. - Allow user to perform atomic bitwise AND and OR operaions on MSR registers via cpucontrol(8) utility. Two new operations ("&=" and "|=") have been added. The first one applies bitwise AND operaion between the current contents of the MSR register and the mask, and the second performs bitwise OR. The argument can be optionally prefixed with "~" inversion operator. This allows one to mimic the "clear bit" behavior by using the command like this: cpucontrol -m 0x10&=~0x02 # clear the second bit of TSC MSR Inversion operator support in all modes (assignment, OR, AND). 2009-08-15T15:52:20Z Stanislav Sedov stas@FreeBSD.org 2009-08-15T15:52:20Z urn:sha1:0c733d2a0b235d7e5bbb9bb0fa51587f490385c5 - Don't zero data field in case of MSR write operation. Before this change the value written to MSR register was always 0 regardless of value passed by user. - Use proper data pointer when performing AMD microcode update. Previously, the pointer to user-space data has been provided instead, which is totally incorrect. 2009-01-12T15:48:22Z Stanislav Sedov stas@FreeBSD.org 2009-01-12T15:48:22Z urn:sha1:68d12a7f7bb17e8a9e3459b48de68e93518626c4 First revision of usr.sbin/cpucontrol was merged directly into usr.sbin since there're no such directory in stable/7 yet. Subsequient changes went into usr.sbin/cpucontrol. Approved by: kib (mentor)