src/sys/dev/dwc, branch release/12.3.0

MFC r364098 by lwhsu:

2020-09-06T20:03:13Z

Fix armv{6,7} build after r364088 Sponsored by: The FreeBSD Foundation

MFC r362736, r364088

2020-09-06T19:03:19Z

r362736: Configure rx_delay/tx_delay values for RK3399/RK3328 GMAC For 1000Mb mode to work reliably TX/RX delays need to be configured between the TX/RX clock and the respective signals on the PHY to compensate for differing trace lengths on the PCB. Reviewed by: manu r364088: Improve Rockchip's integration of if_dwc - Do not rely on U-Boot for clocks configuration, enable and set frequencies in the driver's attach method. - Adjust MAC settings according to detected linespeed on RK3399 and RK3328. - Add support for RMII PHY mode on RK3328. Reviewed by: manu Differential Revision: https://reviews.freebsd.org/D26006

MFC r360467, r362399, r362405, r362415

2020-09-06T18:48:50Z

r360467 by mmel: Fix style(9). Strip write only variables. Not a functional change. r362399 by mmel: Use naming nomenclature used in DesignWare TRM. Use naming nomenclature used in DesignWare TRM. This driver was written by using Altera (now Intel) documentation for Arria FPGA manual. Unfortunately this manual used very different (and in some cases opposite naming) for registers and descriptor fields. Unfortunately, this makes future expansion extremely hard. Should not been functional change. r362405 by mmel: Finish renaming in if_dwc. By using DWC TRM terminology, normal descriptor format should be named extended and alternate descriptor format should be named normal. Should not been functional change. r362415 by mmel: Improve if_dwc: - refactorize packet receive path. Make sure that we don't leak mbufs and/or that we don't create holes in RX descriptor ring - slightly simplify handling with TX descriptors

MFC r353843 by glebius:

2020-09-06T18:27:36Z

Convert to if_foreach_llmaddr() KPI.

MFC r347097, r351187, r351551-r351552, r352849-r352852

2019-11-28T17:42:11Z

r347097 by ganbold: Add emmc clock definitions for Rockchip RK3399 SoC. r351187 by mmel: Improve rk_pinctrl driver: - add support for 'output-low', 'output-high', 'output-low' and 'output-enable' properties. These are use in RK3288 DT files - add support for RK3288 - to reduce overall file size, use local macros for initialization of pinctrl description structures. r351551: arm64: rk3328: pinctrl: Add gpio banks and fix iomux Since r351187 the pinctrl driver need to know the gpio bank as it directly attach the gpio driver to handle some setup that might be present in the dts, add the gpio banks table for rk3328. While here fix some IOMUX definition that prevented to boot on RK3328 as pinctrl wasn't configured correctly. Submitted by: mmel (original version) MFC With: r351187 r351552: arm64: rk3399: pinctrl: Add gpio banks and fix iomux Since r351187 the pinctrl driver need to know the gpio bank as it directly attach the gpio driver to handle some setup that might be present in the dts, add the gpio banks table for rk3399. While here fix some IOMUX definition that prevented to boot on RK3399 as pinctrl wasn't configured correctly. Submitted by: mmel (original version) MFC With: r351187 r352849: arm64: rockchip: rk3399: Add usb2 clocks r352850: arm64: rockchip: Implement resets Module resets where not implemented when rockchip clocks were commited. Implement them. Since all resets registers are contiguous a driver only need to give the start offset and the number of resets. This avoid to have to declare every resets. r352851: arm64: rockchip: Fix map_gpio The map_gpio function wasn't correct, the first element is the pin and not the phandle. r352852: dwc: Add more delay for chip reset On rockchip board it seems that the value in the DTS are not enough for reseting the chip, I don't know if the value are really incorrect or if DELAY is not precise enough or if the rockchip gpio driver have some "lag" of some kind or not. For now just add more delay.

ifnet: Replace if_addr_lock rwlock with epoch + mutex

2018-05-18T20:13:34Z

Run on LLNW canaries and tested by pho@ gallatin: Using a 14-core, 28-HTT single socket E5-2697 v3 with a 40GbE MLX5 based ConnectX 4-LX NIC, I see an almost 12% improvement in received packet rate, and a larger improvement in bytes delivered all the way to userspace. When the host receiving 64 streams of netperf -H $DUT -t UDP_STREAM -- -m 1, I see, using nstat -I mce0 1 before the patch: InMpps OMpps InGbs OGbs err TCP Est %CPU syscalls csw irq GBfree 4.98 0.00 4.42 0.00 4235592 33 83.80 4720653 2149771 1235 247.32 4.73 0.00 4.20 0.00 4025260 33 82.99 4724900 2139833 1204 247.32 4.72 0.00 4.20 0.00 4035252 33 82.14 4719162 2132023 1264 247.32 4.71 0.00 4.21 0.00 4073206 33 83.68 4744973 2123317 1347 247.32 4.72 0.00 4.21 0.00 4061118 33 80.82 4713615 2188091 1490 247.32 4.72 0.00 4.21 0.00 4051675 33 85.29 4727399 2109011 1205 247.32 4.73 0.00 4.21 0.00 4039056 33 84.65 4724735 2102603 1053 247.32 After the patch InMpps OMpps InGbs OGbs err TCP Est %CPU syscalls csw irq GBfree 5.43 0.00 4.20 0.00 3313143 33 84.96 5434214 1900162 2656 245.51 5.43 0.00 4.20 0.00 3308527 33 85.24 5439695 1809382 2521 245.51 5.42 0.00 4.19 0.00 3316778 33 87.54 5416028 1805835 2256 245.51 5.42 0.00 4.19 0.00 3317673 33 90.44 5426044 1763056 2332 245.51 5.42 0.00 4.19 0.00 3314839 33 88.11 5435732 1792218 2499 245.52 5.44 0.00 4.19 0.00 3293228 33 91.84 5426301 1668597 2121 245.52 Similarly, netperf reports 230Mb/s before the patch, and 270Mb/s after the patch Reviewed by: gallatin Sponsored by: Limelight Networks Differential Revision: https://reviews.freebsd.org/D15366

EXTRES: Add OF node as argument to all _get_by_ofw_() functions.

2016-07-10T18:28:15Z

In some cases, the driver must handle given properties located in specific OF subnode. Instead of creating duplicate set of function, add 'node' as argument to existing functions, defaulting it to device OF node. MFC after: 3 weeks

Fix an issue with multicast hash filters on Amlogic and Allwinner boards.

2016-06-12T22:55:50Z

For DWC_GMAC_ALT_DESC implementations, the multicast hash table has only 64 entries. Instead of 8 registers starting at 0x500, a pair of registers at 0x08 and 0x0c are used instead. Approved by: re (hrs) Submitted by: Guy Yur

Multicast filters on DWC_GMAC_ALT_DESC type implementations use a different

2016-06-08T20:22:25Z

hash register setup. In addition, strip trailing FCS in receive path. Reviewed by: loos Differential Revision: https://reviews.freebsd.org/D6653

Set txbuf_map array size to TX_DESC_COUNT instead of RX_DESC_COUNT.

2016-04-29T21:46:43Z