<feed xmlns='http://www.w3.org/2005/Atom'>
<title>src/sys/dev/esp, branch release/6.0.0_cvs</title>
<subtitle>FreeBSD source tree</subtitle>
<id>https://cgit-dev.freebsd.org/src/atom?h=release%2F6.0.0_cvs</id>
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<updated>2005-11-03T00:35:26Z</updated>
<entry>
<title>This commit was manufactured by cvs2svn to create tag</title>
<updated>2005-11-03T00:35:26Z</updated>
<author>
<name>cvs2svn</name>
<email>cvs2svn@FreeBSD.org</email>
</author>
<published>2005-11-03T00:35:26Z</published>
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<id>urn:sha1:3640cb54210edbb7edbf1b12ef0127ecfcea967d</id>
<content type='text'>
'RELENG_6_0_0_RELEASE'.

This commit was manufactured to restore the state of the 6.0-RELEASE image.
</content>
</entry>
<entry>
<title>- Try to not leak resources in the attach functions of the esp(4) SBus</title>
<updated>2005-05-19T14:51:10Z</updated>
<author>
<name>Marius Strobl</name>
<email>marius@FreeBSD.org</email>
</author>
<published>2005-05-19T14:51:10Z</published>
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<id>urn:sha1:65fb49a994d52fdf59fbbc13095993cad1abe329</id>
<content type='text'>
  front-end and the LSI64854 and NCR53C9x code in case one of these
  functions fails. Add detach functions to these parts and make esp(4)
  detachable.
- Revert rev. 1.7 of esp_sbus.c, since rev. 1.34 of sbus.c the clockfreq
  IVAR defaults to the per-child values.
- Merge ncr53c9x.c rev. 1.111 from NetBSD (partial):
  On reset, clear state flags and the msgout queue.
  In NetBSD code to notify the upper layer (i.e. CAM in FreeBSD) on reset
  was also added with this revision. This is believed to be not necessary
  in FreeBSD and was not merged.
  This makes ncr53c9x.c to be in sync with NetBSD up to rev. 1.114.
- Conditionalize the LSI64854 support on sbus(4) only instead of sbus(4)
  and esp(4) as it's also required for the 'dma', 'espdma' and 'ledma'
  busses/devices as well as the 'SUNW,bpp' device (printer port) which
  all hang off of sbus(4).
- Add a driver for the 'dma', 'espdma' and 'ledma' (pseudo-)busses/
  devices. These busses and devices actually represent the LSI64854 DMA
  engines for the ESP SCSI and LANCE Ethernet controllers found on the
  SBus of Ultra 1 and SBus add-on cards. With 'espdma' and 'ledma' the
  'esp' and 'le' devices hang off of the respective DMA bus instead of
  directly from the SBus. The 'dma' devices are either also used in this
  manner or on some add-on cards also as a companion device to an 'esp'
  device which also hangs off directly from the SBus. With the latter
  variant it's a bit tricky to glue the DMA engine to the core logic of
  the respective 'esp' device. With rev. 1.35 of sbus.c we are however
  guaranteed that such a 'dma' device is probed before the respective
  'esp' device which simplifies things a lot. [1]
- In the esp(4) SBus front-end read the part-unique ID code of Fast-SCSI
  capable chips the right way. This fixes erroneously detecting some
  chips as FAS366 when in fact they are not. Add explicit checks for the
  FAS100A, FAS216 and FAS236 variants instead treating all of these as
  ESP200. That way we can correctly set the respective Fast-SCSI config
  bits instead of driving them out of specs. This includes adding the
  FAS100A and FAS236 variants to the NCR53C9x core code. We probably
  still subsume some chip variants as ESP200 while in fact they are
  another variant which however shouldn't really matter as this will
  only happen when these chips are driven at 25MHz or less which implies
  not being able to run Fast-SCSI. [3]
- Add a workaround to the NCR53C9x interrupt handler which ignores the
  stray interrupt generated by FAS100A when doing path inquiry during
  boot and which otherwiese would trigger a panic.
- Add support for the 'esp' devices hanging off of a 'dma' or 'espdma'
  busses or which are companions of 'dma' devices to esp(4). In case of
  the variants that hang off of a DMA device this is a bit hackish as
  esp(4) then directly uses the softc of the respective parent to talk
  to the DMA engine. It might make sense to add an interface for this
  in order to implement this in a cleaner way however it's not yet clear
  how the requirements for the LANCE Ethernet controllers are and the
  hack works for now. [2]
  This effectively adds support for the onboard SCSI controller in
  Ultra 1 as well as most of the ESP-based SBus add-on cards to esp(4).
  With this the code for supporting the Performance Technologies SBS430
  SBus SCSI add-on cards is also largely in place the remaining bits
  were however omitted as it's unclear from the NetBSD how to couple
  the DMA engine and the core logic together for these cards.

Obtained from:	OpenBSD [1]
Obtained from:	NetBSD [2]
Clue from:	BSD/OS [3]
Reviewed by:	scottl (earlier version)
Tested with:	FSBE/S add-on card (FAS236), SSHA add-on card (ESP100A),
		Ultra 1 (onboard FAS100A), Ultra 2 (onboard FAS366)
</content>
</entry>
<entry>
<title>Apply a torniquet to the problem of the drive unexpectedly disconnecting</title>
<updated>2005-04-25T22:11:43Z</updated>
<author>
<name>Scott Long</name>
<email>scottl@FreeBSD.org</email>
</author>
<published>2005-04-25T22:11:43Z</published>
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<id>urn:sha1:20fc2576fe4ecb1236e5fa713fbd354bceebaf9b</id>
<content type='text'>
during a data phase.  Before, we would try to recover the autosense, but
the DMA engine would still be active with interrupted transfer, and we'd
quickly spiral out of control and cause massive data corruption.  For now,
just reset the chip and cancel everything.  The better solution is to
cancel the DMA operation, but there is no clear way to do that right now.
The data corruption problem is severe enough to warrant this fix in the
interim.  Thanks to Kris Kenneway to sacrificing countless filesystems to
this bug.

MFC After: 3 days
</content>
</entry>
<entry>
<title>If we get interrupted during a data phase and the DMA engine is still</title>
<updated>2005-04-22T03:37:10Z</updated>
<author>
<name>Scott Long</name>
<email>scottl@FreeBSD.org</email>
</author>
<published>2005-04-22T03:37:10Z</published>
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<id>urn:sha1:4bd55c43ea6e3ff5ae3f5ea340e16807ca914104</id>
<content type='text'>
pumping data despite our scsi data counters being at 0, something has
gone massively wrong.  The consequence of happily ignoring this is more
DMA phase errors and a disk full of spammed sectors.  Instead, panic on
the first occurance to hopefully limit the damage.

MFC After: 3 days
</content>
</entry>
<entry>
<title>Merge some style and minor changes from NetBSD:</title>
<updated>2005-04-17T17:44:01Z</updated>
<author>
<name>Marius Strobl</name>
<email>marius@FreeBSD.org</email>
</author>
<published>2005-04-17T17:44:01Z</published>
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<id>urn:sha1:e993bdf0b7de06b1b4cbb60b17bb7169fc795c23</id>
<content type='text'>
- ncr53c9x.c:
  1.108: Remove unreachable break after return and goto statements.
  1.109: avoid strong words; use 'screw' instead
  1.110: Fix some typos. From Tom Cosgrove via jmc@openbsd.
  1.114: nuke trailing whitespace

  1.107 was already merged, 1.112 and 1.113 are not relevant for FreeBSD.
  1.111 is a functional change and will be merged later.

- ncr53c9xreg.h:
  1.12: DMA, not dma nor Dma.
  1.13: Fix some typos. From Tom Cosgrove via jmc@openbsd.
  1.14: nuke trailing whitespace

- ncr53c9xvar.h:
  1.43: Fix some typos. From Tom Cosgrove via jmc@openbsd.
  1.44: Constify.

  1.42 and 1.46 were already merged, 1.45 is not relevant for FreeBSD.
</content>
</entry>
<entry>
<title>Style and minor changes:</title>
<updated>2005-04-17T17:42:36Z</updated>
<author>
<name>Marius Strobl</name>
<email>marius@FreeBSD.org</email>
</author>
<published>2005-04-17T17:42:36Z</published>
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<id>urn:sha1:0c49d17584611d04e047d6a7b34e5f77a59f1657</id>
<content type='text'>
- Merge esp_sbus.c rev. 1.31 from NetBSD: nuke trailing whitespace.
  Rev. 1.28 and 1.30 were already merged, 1.29 is not relevant for FreeBSD.
- Remove unused headers.
- Use BUS_PROBE_DEFAULT.
- Use __func__ instead of hardcoded function names in error messages.
- Correct some comments.
- Correct some function declarations to match their prototypes.
- Some style(9) fixes (don't use function calls in initializers; indentation).
- Zero the allocated structs to avoid problems with uninitialized members.
- Remove the ifdef'ed out SBus interrupt priority code and the hook for
  ncr53c9x_reset(), remove the unused SBus interrupt priority member from
  esp_softc. On FreeBSD setting the SBus interrupt priority is entirely done
  in sbus(4) and the reset function isn't even really used in NetBSD.
- s,dma,DMA, in comments.
- Make the code fit in 80 columns.
</content>
</entry>
<entry>
<title>The existing locking in the esp driver appears to be fairly adequate, so</title>
<updated>2005-03-02T15:56:42Z</updated>
<author>
<name>Scott Long</name>
<email>scottl@FreeBSD.org</email>
</author>
<published>2005-03-02T15:56:42Z</published>
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<id>urn:sha1:a6b86949fc76b7c8e1979818e74ff2b153e90bab</id>
<content type='text'>
set the interrupt handler to be INTR_MPSAFE now that xpt_done() can be
called without Giant.  Giant is still on the top half of the driver and
the timeout handlers.
</content>
</entry>
<entry>
<title>Start each of the license/copyright comments with /*-, minor shuffle of lines</title>
<updated>2005-01-06T01:43:34Z</updated>
<author>
<name>Warner Losh</name>
<email>imp@FreeBSD.org</email>
</author>
<published>2005-01-06T01:43:34Z</published>
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<id>urn:sha1:098ca2bda93c701c5331d4e6aace072495b4caaa</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Remove files repocopied to sys/sparc64/sbus.</title>
<updated>2004-11-10T14:11:10Z</updated>
<author>
<name>Tom Rhodes</name>
<email>trhodes@FreeBSD.org</email>
</author>
<published>2004-11-10T14:11:10Z</published>
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<id>urn:sha1:4fc173317b940c01af45b3389684a89fbcc309b6</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Pull the correct clock frequency value out of OFW.  Why the helper function</title>
<updated>2004-09-13T15:15:38Z</updated>
<author>
<name>Scott Long</name>
<email>scottl@FreeBSD.org</email>
</author>
<published>2004-09-13T15:15:38Z</published>
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<id>urn:sha1:4c2ca0f7c8d042cca3823658bfb10560865cb06a</id>
<content type='text'>
doesn't do this is beyond me, but that will be investigated later.  This
results in programming the chip with the correct frequency, which in turn
allows devices to negotiate up to the full 20MB/s.
</content>
</entry>
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