FreeBSD source tree https://cgit-dev.freebsd.org/src/atom?h=release%2F9.3.0 2014-01-04T21:32:53Z 2014-01-04T21:32:53Z Dimitry Andric dim@FreeBSD.org 2014-01-04T21:32:53Z urn:sha1:14ef3edc65dae3b870622e53a5d555c323acf24a In sys/dev/scc, remove unused static function scc_setmreg(). While here, invoke scc_getmreg() in two more places where it can be used. Reviewed by: marcel 2013-08-09T21:04:00Z Marius Strobl marius@FreeBSD.org 2013-08-09T21:04:00Z urn:sha1:29080cde14bbc6c9483f66192176210e872bed75 Const'ify scc_driver_name. 2013-08-09T21:01:41Z Marius Strobl marius@FreeBSD.org 2013-08-09T21:01:41Z urn:sha1:45dad89b1fb03045bb8fd03f906ff0a0e48b0f73 - Use NULL instead of 0 for pointers. - Remove unnecessary __RMAN_RESOURCE_VISIBLE. 2013-08-09T20:58:06Z Marius Strobl marius@FreeBSD.org 2013-08-09T20:58:06Z urn:sha1:0941e4a6d01634f983fb44b0aee113c4c86630fb - Implement iclear methods for QUICC and SAB 82532. With r253161 in place, this is is crucial at least for the latter. What happens is that attaching uart(4) to scc(4) causes the SAB 82532 to "receive" something and trigger a SER_INT_RXREADY interrupt, given that at least fast/filter interrupts are already enabled. Prior to r253161, uart_bus_ihand() was set up at this point and handled that condition, i. e. read the RX FIFO and issued a Receive Message Complete. Now, uart_bus_ihand() and uart_intr() are setup after attaching uart(4), leaving the SER_INT_RXREADY interrupt triggered during the latter to be handled by the iclear method. However, with that method not implement, this in turn causes SAB 82532 to not issue any further SER_INT_RXREADY interrupts until the RX FIFO is full again. Thus, 15 received bytes go to nowhere, given that "the other half" of the RX FIFO is used for status information. Hence, implementing sab82532_bfe_iclear() fixes things again. Potentially, the same problem exists for QUICC. - Remove unnecessary __RMAN_RESOURCE_VISIBLE. - Remove a superfluous header. - Use KOBJMETHOD_END. - Mark unused arguments as such. - Remove variables unused after initialization. Reviewed by: marcel (earlier version) 2013-04-05T08:22:11Z Alexander Motin mav@FreeBSD.org 2013-04-05T08:22:11Z urn:sha1:1139d398ea93668ee65ae02b8ceab630ca9e5487 Mark MALLOC_DEFINEs static that have no corresponding MALLOC_DECLAREs. This means that their use is restricted to a single C file. 2011-12-31T14:12:12Z Hans Petter Selasky hselasky@FreeBSD.org 2011-12-31T14:12:12Z urn:sha1:0105e7b57ec82d3d157edb9f4322f29f05d54f6e Use DEVMETHOD_END to mark end of device methods. Remove superfluous device methods. Add some missing __FBSBID() macros. 2011-05-15T13:27:38Z Marius Strobl marius@FreeBSD.org 2011-05-15T13:27:38Z urn:sha1:c71dacd16819b980c0b740e5cecc5e9f6331c080 2009-02-05T19:32:34Z Warner Losh imp@FreeBSD.org 2009-02-05T19:32:34Z urn:sha1:005f7c33086f8ecbcc37a2915e13e69bf1c158c3 2008-04-26T18:40:59Z Marcel Moolenaar marcel@FreeBSD.org 2008-04-26T18:40:59Z urn:sha1:6239f9e5f1c3272eb7d16415bb6c24bef21b1f1d total of 6 interrupt resources for scc(4) on macio(4). This is 3 per channel, of which the 1st of each channel is the interrupt associated with the SCC. The other 2 are for DMA operation. Change scc_bfe_attach() to accept an argument that's the number of interrupts per channel (ipc) and change each bus front-end (bfe) to pass that argument through a wrapper for the device_attach method. For now, we only allocate the 1st interrupt of each channel to perserve behaviour. 2008-03-03T18:20:17Z Rafal Jaworowski raj@FreeBSD.org 2008-03-03T18:20:17Z urn:sha1:e1ef781113fba635a7fa4a979607261385971992 The QUICC engine is found on various Freescale parts including MPC85xx, and provides multiple generic time-division serial channel resources, which are in turn muxed/demuxed by the Serial Communications Controller (SCC). Along with core QUICC/SCC functionality a uart(4)-compliant device driver is provided which allows for serial ports over QUICC/SCC. Approved by: cognet (mentor) Obtained from: Juniper MFp4: e500