FreeBSD source tree https://cgit-dev.freebsd.org/src/atom?h=main 2023-08-16T17:54:11Z 2023-08-16T17:54:11Z Warner Losh imp@FreeBSD.org 2023-08-16T17:54:11Z urn:sha1:95ee2897e98f5d444f26ed2334cc7c439f9c16c6 Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/ 2023-02-06T17:32:07Z Justin Hibbits jhibbits@FreeBSD.org 2022-03-01T16:12:03Z urn:sha1:6712df3ab04ac5ccd4c4335e3df24f7f3a190ec1 Sponsored by: Juniper Networks, Inc. Differential Revision: https://reviews.freebsd.org/D37794 2017-11-18T14:26:50Z Pedro F. Giffuni pfg@FreeBSD.org 2017-11-18T14:26:50Z urn:sha1:df57947f083046d50552e99b91074927d2458708 The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts. Special thanks to Wind River for providing access to "The Duke of Highlander" tool: an older (2014) run over FreeBSD tree was useful as a starting point. Initially, only tag files that use BSD 4-Clause "Original" license. RelNotes: yes Differential Revision: https://reviews.freebsd.org/D13133 2011-11-01T16:13:59Z Marius Strobl marius@FreeBSD.org 2011-11-01T16:13:59Z urn:sha1:8c1093fc50ab084b2ddd4750290a23d62616e0b6 take advantage of it instead of duplicating it. This reduces the size of the i386 GENERIC kernel by about 4k. The only potential in-tree user left unconverted is xe(4), which generally should be changed to use miibus(4) instead of implementing PHY handling on its own, as otherwise it makes not much sense to add a dependency on miibus(4)/mii_bitbang(4) to xe(4) just for the MII bitbang'ing code. The common MII bitbang'ing code also is useful in the embedded space for using GPIO pins to implement MII access. - Based on lessons learnt with dc(4) (see r185750), add bus barriers to the MII bitbang read and write functions of the other drivers converted in order to ensure the intended ordering. Given that register access via an index register as well as register bank/window switching is subject to the same problem, also add bus barriers to the respective functions of smc(4), tl(4) and xl(4). - Sprinkle some const. Thanks to the following testers: Andrew Bliznak (nge(4)), nwhitehorn@ (bm(4)), yongari@ (sis(4) and ste(4)) Thanks to Hans-Joerg Sirtl for supplying hardware to test stge(4). Reviewed by: yongari (subset of drivers) Obtained from: NetBSD (partially) 2009-12-24T17:22:15Z Pyun YongHyeon yongari@FreeBSD.org 2009-12-24T17:22:15Z urn:sha1:fabbaac56053589085d4c2ac19f3b68ffa75870d Unlike TX interrupt, ST201 does not provide any mechanism to suppress RX interrupts. ste(4) can generate more than 70k RX interrupts under heavy RX traffics such that these excessive interrupts make system useless to process other useful things. Maybe this was the major reason why polling support code was introduced to ste(4). The STE_COUNTDOWN register provides a programmable counter that will generate an interrupt upon its expiration. We program STE_DMACTL register to use 3.2us clock rate to drive the counter register. Whenever ste(4) serves RX interrupt, the driver rearm the timer to expire after STE_IM_RX_TIMER_DEFAULT time and disables further generation of RX interrupts. This trick seems to work well and ste(4) generates less than 8k RX interrupts even under 64 bytes UDP torture test. Combined with TX interrupts, the total number of interrupts are less than 10k which looks reasonable on heavily loaded controller. The default RX interrupt moderation time is 150us. Users can change the value at any time with dev.ste.%d.int_rx_mod sysctl node. Setting it 0 effectively disables the RX interrupt moderation feature. Now we have both TX/RX interrupt moderation code so remove loop of interrupt handler which resulted in sub-optimal performance as well as more register accesses. 2009-12-23T19:38:22Z Pyun YongHyeon yongari@FreeBSD.org 2009-12-23T19:38:22Z urn:sha1:ae49e7a6950ed98530b76565c60a5512fbbf0429 transmitted frames. So request interrupt for every 16th frames. Due to the limitation of hardware we can't suppress the interrupt as driver should have to check TX status register. The TX status register can store up to 31 TX status so driver can't send more than 31 frames without reading TX status register. With this change controller would not generate TX completion interrupt for every frame, so reclaim transmitted frames in ste_tick(). 2009-12-23T19:26:38Z Pyun YongHyeon yongari@FreeBSD.org 2009-12-23T19:26:38Z urn:sha1:95a3c23b516ca6c9ffea8960feea398846e09407 2009-12-23T19:21:37Z Pyun YongHyeon yongari@FreeBSD.org 2009-12-23T19:21:37Z urn:sha1:13e052e4164d16156ee89c03292b71a4b5b23b05 definition was made to access STE_ASICCTL register as 16bits but ste(4) always access the register as 32bits so it was never used before. 2009-12-23T19:18:07Z Pyun YongHyeon yongari@FreeBSD.org 2009-12-23T19:18:07Z urn:sha1:8657caa66b9bdb1aeb81fbd39f950eabc49ce4dc could be accessed with dev.ste.0.stats sysctl node. 2009-12-22T23:57:10Z Pyun YongHyeon yongari@FreeBSD.org 2009-12-22T23:57:10Z urn:sha1:81598b3e5e55fd6e3737ad1a3d4508f2b157b511 If ste(4) encounter TX underrun or excessive collisions the TX MAC of controller is stalled so driver should wake it up again. TX underrun requires increasing TX threshold value to minimize further TX underruns. Previously ste(4) used to reset controller to recover from TX underrun, excessive collision and reclaiming error. However datasheet says only TX underrun requires resetting entire controller. So implement ste_restart_tx() that restarts TX MAC and do not perform full reset except TX underrun case. Now ste(4) uses CSR_READ_2 instead of CSR_READ_1 to read STE_TX_STATUS register. This way ste(4) will also read frame id value and we can write the same value back to STE_TX_FRAMEID register instead of overwriting it to 0. The datasheet was wrong in write back of STE_TX_STATUS so add some comments why we do so. Also always invoke ste_txeoc() after ste_txeof() in ste_poll as without reading TX status register can stall TX MAC.