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<title>src/sys/dev/uart/uart_dev_ns8250.c, branch release/8.1.0</title>
<subtitle>FreeBSD source tree</subtitle>
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<updated>2010-05-10T20:15:39Z</updated>
<entry>
<title>MFC: r207533 (partial)</title>
<updated>2010-05-10T20:15:39Z</updated>
<author>
<name>Marius Strobl</name>
<email>marius@FreeBSD.org</email>
</author>
<published>2010-05-10T20:15:39Z</published>
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<id>urn:sha1:7b2587b9ea048065f552fea401565558101fbc84</id>
<content type='text'>
Remove redundant checking of sc_leaving (uart_intr() already handles this).
</content>
</entry>
<entry>
<title>Fix hangs caused by hardware that signals receive errors</title>
<updated>2009-04-08T00:14:06Z</updated>
<author>
<name>Marcel Moolenaar</name>
<email>marcel@FreeBSD.org</email>
</author>
<published>2009-04-08T00:14:06Z</published>
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<id>urn:sha1:d7ae5af5c4238f226997277be884e87eebf224a6</id>
<content type='text'>
(framing, parity, etc), but does not indicate characters
being received. Since no chracters have been received,
ignore the line errors.

PR:		131006
MFC after:	3 days
</content>
</entry>
<entry>
<title>The XScale PXA255 has three generally ns16x50 compatible UARTs.  One of the</title>
<updated>2008-05-30T01:57:13Z</updated>
<author>
<name>Benno Rice</name>
<email>benno@FreeBSD.org</email>
</author>
<published>2008-05-30T01:57:13Z</published>
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<id>urn:sha1:0aefb0a63c50622e0462987f83c1feccab88e1b1</id>
<content type='text'>
variations from normal 16x50 behaviour however is the the use of a normally
unused bit of IER to control RX timeout interrupts independently of the
generally used RXRDY bit.  If this bit is not enabled, we only ever get
interrupts when the FIFO is full, never before.  This is not very useful when
the UART is being used as a console.

In order to support this without causing potential problems on more "normal"
16x50 variants, this change introduces two hints for the uart device, ier_mask
and ier_rxbits.  These can be used to override which bits get set and cleared
when we're enabling and disabling RX interrupts.

Reviewed by:	marcel
</content>
</entry>
<entry>
<title>add device hints to control the rx FIFO interrupt level on 16550A parts</title>
<updated>2008-03-12T19:09:20Z</updated>
<author>
<name>Sam Leffler</name>
<email>sam@FreeBSD.org</email>
</author>
<published>2008-03-12T19:09:20Z</published>
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<id>urn:sha1:823c77d78b6b67798c45cd09ead36c11555d883d</id>
<content type='text'>
PR:		kern/121421
Submitted by:	UEMURA Tetsuya
Reviewed by:	marcel
MFC after:	2 weeks
</content>
</entry>
<entry>
<title>Don't use a time-limiting loop that's defined in terms of the baudrate</title>
<updated>2007-04-03T01:21:10Z</updated>
<author>
<name>Marcel Moolenaar</name>
<email>marcel@FreeBSD.org</email>
</author>
<published>2007-04-03T01:21:10Z</published>
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<id>urn:sha1:35777a2a79dec37cdacb86cac0e87e23465e2d7d</id>
<content type='text'>
in the putc() method.  Likewise, in the getc() method, don't check for
received characters with an interval defined in terms of the baudrate.
In both cases it works equally well to implement a fixed delay.  More
importantly, it avoids calculating a delay that's roughly 1/10th the
time it takes to send/receive a character. The calculation is costly
and happens for every character sent or received, affecting low-level
console or debug port performance significantly. Secondly, when the
RCLK is not available or unreliable, the delays could disrupt normal
operation.

The fixed delay is 1/10th the time it takes to send a character at
230400 bps.
</content>
</entry>
<entry>
<title>Don't expose the uart_ops structure directly, but instead have</title>
<updated>2007-04-02T22:00:22Z</updated>
<author>
<name>Marcel Moolenaar</name>
<email>marcel@FreeBSD.org</email>
</author>
<published>2007-04-02T22:00:22Z</published>
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<id>urn:sha1:f8100ce2a70db5c60672578fee913d986ac1cf01</id>
<content type='text'>
it obtained through the uart_class structure. This allows us
to declare the uart_class structure as weak and as such allows
us to reference it even when it's not compiled-in.
It also allows is to get the uart_ops structure by name, which
makes it possible to implement the dt tag handling in uart_getenv().
The side-effect of all this is that we're using the uart_class
structure more consistently which means that we now also have
access to the size of the bus space block needed by the hardware
when we map the bus space, eliminating any hardcoding.
</content>
</entry>
<entry>
<title>For embedded UARTs compatible with the ns8250 family it is possible</title>
<updated>2007-03-28T18:34:59Z</updated>
<author>
<name>Marcel Moolenaar</name>
<email>marcel@FreeBSD.org</email>
</author>
<published>2007-03-28T18:34:59Z</published>
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<id>urn:sha1:ebecffe930384eb44d9ba75f052d25b9dc41c91d</id>
<content type='text'>
that the driver clock is identical to the processor or bus clock.
This is the case for the PowerQUICC processor. When the clock is
high enough, overflows happen in the calculation of the time it
takes to send 1/10 of a character, used in delay loops. Fix the
overflows so as to fix bugs in the delay loops that can cause either
insufficient delays or excessive delays.
</content>
</entry>
<entry>
<title>- Add a uart_rxready() and corresponding device-specific implementations</title>
<updated>2007-01-18T22:01:19Z</updated>
<author>
<name>Marius Strobl</name>
<email>marius@FreeBSD.org</email>
</author>
<published>2007-01-18T22:01:19Z</published>
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<id>urn:sha1:97202af2dca1942e1873e9ef8feb527a2e58fa7b</id>
<content type='text'>
  that can be used to check whether receive data is ready, i.e. whether
  the subsequent call of uart_poll() should return a char, and unlike
  uart_poll() doesn't actually receive data.
- Remove the device-specific implementations of uart_poll() and implement
  uart_poll() in terms of uart_getc() and the newly added uart_rxready()
  in order to minimize code duplication.
- In sunkbd(4) take advantage of uart_rxready() and use it to implement
  the polled mode part of sunkbd_check() so we don't need to buffer a
  potentially read char in the softc.
- Fix some mis-indentation in sunkbd_read_char().

Discussed with:	marcel
</content>
</entry>
<entry>
<title>The lcr variable in ns8250_probe is now unused.  Remove it.</title>
<updated>2006-05-23T06:04:45Z</updated>
<author>
<name>Benno Rice</name>
<email>benno@FreeBSD.org</email>
</author>
<published>2006-05-23T06:04:45Z</published>
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<id>urn:sha1:8bceca4f487509dab7fa9e0c7a85c53c587d0f14</id>
<content type='text'>
Missed by:	benno
</content>
</entry>
<entry>
<title>Allow uart(4)'s ns8250 driver to work with devices whose regshift is &gt; 0.</title>
<updated>2006-05-23T00:41:12Z</updated>
<author>
<name>Benno Rice</name>
<email>benno@FreeBSD.org</email>
</author>
<published>2006-05-23T00:41:12Z</published>
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<id>urn:sha1:58957d87173648541b214726c95eb4614ba31848</id>
<content type='text'>
- Rename REG_DL to REG_DLL and REG_DLH.
- Always treat DLL and DLH as two separate 8-bit registers instead of one
  16-bit register.

Additionally, remove the probe for the high 4 bits of IER being 0 and don't
assume we can always read/write 0 to/from those bits.

These changes allow uart(4) to drive the UARTs on the Intel XScale PXA255.

Reviewed by:	marcel
</content>
</entry>
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