<feed xmlns='http://www.w3.org/2005/Atom'>
<title>src/sys/dev/uart, branch release/12.3.0</title>
<subtitle>FreeBSD source tree</subtitle>
<id>https://cgit-dev.freebsd.org/src/atom?h=release%2F12.3.0</id>
<link rel='self' href='https://cgit-dev.freebsd.org/src/atom?h=release%2F12.3.0'/>
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<updated>2021-09-28T17:26:34Z</updated>
<entry>
<title>uart: Add PCI ID for intel 100 Series/C230 Series AMT</title>
<updated>2021-09-28T17:26:34Z</updated>
<author>
<name>Sean Bruno</name>
<email>sbruno@FreeBSD.org</email>
</author>
<published>2021-09-25T22:23:08Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=9f451734952a52a90a89865e7668e944804a756b'/>
<id>urn:sha1:9f451734952a52a90a89865e7668e944804a756b</id>
<content type='text'>
Reviewed by:	kib
Tested by:	kbowling
Differential Revision:	https://reviews.freebsd.org/D32146

(cherry picked from commit fb640be4e9443f1890680c27b213825300bc65f4)
</content>
</entry>
<entry>
<title>Add support for Gemini Lake LPSS UARTs.</title>
<updated>2021-05-30T01:10:48Z</updated>
<author>
<name>Konstantin Belousov</name>
<email>kib@FreeBSD.org</email>
</author>
<published>2021-05-23T16:38:54Z</published>
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<id>urn:sha1:5d6806ffd66e1b028f19e5c87fc601566be7906c</id>
<content type='text'>
PR:	256101

(cherry picked from commit eaf00819bcfa90ab7ac8af324826eb985197d8c8)
</content>
</entry>
<entry>
<title>Add Apollo Lake SIO/LPSS UARTs PCI IDs</title>
<updated>2021-05-10T00:58:25Z</updated>
<author>
<name>Jose Luis Duran</name>
<email>jlduran@gmail.com</email>
</author>
<published>2021-05-02T21:20:25Z</published>
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<id>urn:sha1:765f31a86876aae85e3ba1da95ea6053720e9b31</id>
<content type='text'>
PR:	255556

(cherry picked from commit 8f1562430fbb83f6cedff6450e1aa1b593e3d7e7)
</content>
</entry>
<entry>
<title>uart_bus_pci.c: Style</title>
<updated>2021-05-10T00:58:25Z</updated>
<author>
<name>Jose Luis Duran</name>
<email>jlduran@gmail.com</email>
</author>
<published>2021-05-02T21:20:25Z</published>
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<id>urn:sha1:87781d3962a8f22a8fef5e1c13dd4a8c36bed220</id>
<content type='text'>
PR:	255556

(cherry picked from commit 5b8b6b26e40a81320f02a46df98b96bd8e93295a)
</content>
</entry>
<entry>
<title>ns8250: don't drop IER_TXRDY on bus_grab/ungrab</title>
<updated>2021-03-16T17:56:03Z</updated>
<author>
<name>Mitchell Horne</name>
<email>mhorne@FreeBSD.org</email>
</author>
<published>2021-03-10T14:57:12Z</published>
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<id>urn:sha1:a54c346ff3e80ff8f2f3d0ec56b5374a7dc34429</id>
<content type='text'>
It has been observed that some systems are often unable to resume from
ddb after entering with debug.kdb.enter=1. Checking the status further
shows the terminal is blocked waiting in tty_drain(), but it never makes
progress in clearing the output queue, because sc-&gt;sc_txbusy is high.

I noticed that when entering polling mode for the debugger, IER_TXRDY is
set in the failure case. Since this bit is never tracked by the softc,
it will not be restored by ns8250_bus_ungrab(). This creates a race in
which a TX interrupt can be lost, creating the hang described above.
Ensuring that this bit is restored is enough to prevent this, and resume
from ddb as expected.

The solution is to track this bit in the sc-&gt;ier field, for the same
lifetime that TX interrupts are enabled.

PR:		223917, 240122
Sponsored by:	The FreeBSD Foundation

(cherry picked from commit 7e7f7beee732810d3afcc83828341ac3e139b5bd)
</content>
</entry>
<entry>
<title>MFC r362574</title>
<updated>2020-10-22T17:31:41Z</updated>
<author>
<name>Marcin Wojtas</name>
<email>mw@FreeBSD.org</email>
</author>
<published>2020-10-22T17:31:41Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=028b7c704b7f429a834ca85daf7262ac782502d0'/>
<id>urn:sha1:028b7c704b7f429a834ca85daf7262ac782502d0</id>
<content type='text'>
Fix AccessWidth and BitWidth parsing in SPCR table

The ACPI Specification defines a Generic Address Structure (GAS),
which is used to describe UART controller register layout in the
SPCR table. The driver responsible for parsing it (uart_cpu_acpi)
wrongly associates the Access Size field to the uart_bas's regshft
and the register BitWidth to the regiowidth - according to
the definitions it should be opposite.

This problem remained hidden most likely because the majority of platforms
use 32-bit registers (BitWidth) which are accessed with the according
size (Dword). However on Marvell Armada 8k / Cn913x platforms,
the 32-bit registers should be accessed with Byte granulity, which
unveiled the issue.

This patch fixes above by proper values assignment and slightly improved
parsing.

Note that handling of the AccessWidth set to EFI_ACPI_6_0_UNDEFINED is
needed to work around a buggy SPCR table on EC2 x86 "bare metal" instances.

Reviewed by: manu, imp, cperciva, greg_unrelenting.technology
Obtained from: Semihalf
</content>
</entry>
<entry>
<title>MFC: 364430:</title>
<updated>2020-09-09T22:54:09Z</updated>
<author>
<name>Warner Losh</name>
<email>imp@FreeBSD.org</email>
</author>
<published>2020-09-09T22:54:09Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=470538bad3cd053a4b9d499f298033f996d0c839'/>
<id>urn:sha1:470538bad3cd053a4b9d499f298033f996d0c839</id>
<content type='text'>
r364430 | imp | 2020-08-20 11:19:40 -0600 (Thu, 20 Aug 2020) | 6 lines

Tag pccard drivers with gone in 13.

MFC After: 3 days
Reviewed by: emaste, brooks, adrian (on twitter)
Differential Revision: https://reviews.freebsd.org/D26095
</content>
</entry>
<entry>
<title>MFC 359900: Export a sysctl count of RX FIFO overrun events.</title>
<updated>2020-09-08T22:50:24Z</updated>
<author>
<name>John Baldwin</name>
<email>jhb@FreeBSD.org</email>
</author>
<published>2020-09-08T22:50:24Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=13ccf661f6633628bf977612b86b6b638f0b5273'/>
<id>urn:sha1:13ccf661f6633628bf977612b86b6b638f0b5273</id>
<content type='text'>
uart(4) backends currently detect RX FIFO overrun errors and report
them to the uart(4) core layer.  They are then reported to the generic
TTY layer which promptly ignores them.  As a result, there is
currently no good way to determine if a uart is experiencing RX FIFO
overruns.  One could add a generic per-tty counter, but there did not
appear to be a good way to export those.  Instead, add a sysctl under
the uart(4) sysctl tree to export the count of overruns.
</content>
</entry>
<entry>
<title>MFC 359899: Correct baud rate error calculation.</title>
<updated>2020-09-08T22:19:06Z</updated>
<author>
<name>John Baldwin</name>
<email>jhb@FreeBSD.org</email>
</author>
<published>2020-09-08T22:19:06Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=db246688667a2c3c38030f20b3f85739071d8950'/>
<id>urn:sha1:db246688667a2c3c38030f20b3f85739071d8950</id>
<content type='text'>
Shifting right by 1 is not the same as dividing by 2 for signed
values.  In particular, dividing a signed value by 2 gives the integer
ceiling of the (e.g. -5 / 2 == -2) whereas shifting right by 1 always
gives the floor (-5 &gt;&gt; 1 == -3).

An embedded board with a 25 Mhz base clock results in an error of
-30.5% when used with a baud rate of 115200.  Using division, this
truncates to -30% and is permitted.  Using the shift, this fails and
is rejected causing TIOCSETA requests to fail with EINVAL and breaking
getty(8).

Using division gives the same error range for both over and under baud
rates and also makes the code match the behavior documented in the
existing comment about supporting boards with 25 Mhz clocks.
</content>
</entry>
<entry>
<title>MFC r358431:</title>
<updated>2020-03-02T16:56:32Z</updated>
<author>
<name>Justin Hibbits</name>
<email>jhibbits@FreeBSD.org</email>
</author>
<published>2020-03-02T16:56:32Z</published>
<link rel='alternate' type='text/html' href='https://cgit-dev.freebsd.org/src/commit/?id=a37c30de3c00db0e6198f66eaf639f35d933c57e'/>
<id>urn:sha1:a37c30de3c00db0e6198f66eaf639f35d933c57e</id>
<content type='text'>
Add Denverton UART PCI ID

Sponsored by:	Juniper Networks, Inc
</content>
</entry>
</feed>
