src/sys/dev/usb/ehci.c, branch mainFreeBSD source treehttps://cgit-dev.freebsd.org/src/atom?h=main2009-02-23T18:16:17ZMove usb to a graveyard location under sys/legacy/dev, it is intended that the2009-02-23T18:16:17ZAndrew Thompsonthompsa@FreeBSD.org2009-02-23T18:16:17Zurn:sha1:3975e3a1eac3dd9077dc4523a8def1606ff1559c
new USB2 stack will fully replace this for 8.0.
Remove kernel modules, a subsequent commit will update conf/files. Unhook
usbdevs from the build.
fix a ehci's bug that it's occurred when the xfers are aborted under2009-01-15T07:11:14ZWeongyo Jeongweongyo@FreeBSD.org2009-01-15T07:11:14Zurn:sha1:d0813533425670f15b768aaa05c1c11a5d4a169b
heavy loads or working. It looks this bug exists since r158869
so needs to revert a part of the previous.
Reviewed by: imp
Tested by: sam
MFC after: 3 weeks
o add Transaction Translator support (still missing ISOC xfers)2008-12-23T04:42:10ZSam Lefflersam@FreeBSD.org2008-12-23T04:42:10Zurn:sha1:405fc730ef06d30fb064dc562577f060832fc8c3
o add EHCI_SCFLG_BIGEMMIO flag to force big-endian byte-select to be
set in USBMODE
o split reset work into new public routine ehci_reset so bus shim drivers
can force big-endian byte-select before ehci_init
fix build w/ EHCI_DEBUG2008-12-20T05:56:08ZSam Lefflersam@FreeBSD.org2008-12-20T05:56:08Zurn:sha1:43d44e8a3159f4ff641484a52f15c293d5cbe315Merge WIP from p4:2008-12-13T01:21:37ZSam Lefflersam@FreeBSD.org2008-12-13T01:21:37Zurn:sha1:d212022417b9a6ed5dd341c8440c4d5180d0a4a7
o recognize ixp435 cpu
o change memory layout for for ixp4xx to not assume memory is aliases
to 0x10000000 (Cambria/ixp435 memory starts at zero)
o handle 64 irqs for ixp435
o dual EHCI USB 2.0 controller integral to ixp435
o overhaul NPE code for ixp435 and better MAC+MII naming
o updated NPE firmware (including NPE-A image for ixp435/ixp465)
o Gateworks Cambria board support:
- IDE compact flash
- MCU
- front panel LED on i2c bus
- Octal LED latch
Sanity-tested with NFS-root on Avila and Cambria boards. Requires
pending boot2 mods for CF-boot on Cambria.
Mbus attachment for USB EHCI integrated controller on Marvell chips.2008-10-14T07:05:20ZRafal Jaworowskiraj@FreeBSD.org2008-10-14T07:05:20Zurn:sha1:f7ef7369fa7183c858034dd4aa5d79e19803937d
This includes workarounds required for the ehci(4) to handle some non-standard
behaviour of these devices.
Obtained from: Marvell, Semihalf
Fix compile2008-08-18T10:39:59ZKris Kennawaykris@FreeBSD.org2008-08-18T10:39:59Zurn:sha1:891af7cfac1f2708beabbcad207968a0eb62712eAdd isochronous transfer support for USB 2.02008-08-18T04:49:58ZKevin Lokevlo@FreeBSD.org2008-08-18T04:49:58Zurn:sha1:8671b38b6ca0c1d7051650b655d8eed60a250324
Obtained from: NetBSD
>From NetBSD:2008-06-10T02:41:36ZKevin Lokevlo@FreeBSD.org2008-06-10T02:41:36Zurn:sha1:49d3c1f4162c7b737e57775099ff29fd6ad5f767
Remove the code which disables port status change interrupts for 1s
when one occured -- this makes that events get lost or delayed until
the next change.
Obtained from: NetBSD
Don't let hacksync() call bus_dmamap_sync(9) on DMA maps which2008-05-13T20:58:08ZMarius Stroblmarius@FreeBSD.org2008-05-13T20:58:08Zurn:sha1:a893539e9572175b7dfd95822643cc46b43ec9e2
are not initialized. This fixes a panic on sparc64 where calling
bus_dmamap_sync(9) on NULL DMA maps is fatal.
Approved by: sam