src/sys/mips/include/clock.h, branch releng/13.3

src/sys/mips/include/clock.h, branch releng/13.3 FreeBSD source tree https://cgit-dev.freebsd.org/src/atom?h=releng%2F13.3 2023-08-23T17:43:22Z sys: Remove $FreeBSD$: one-line .h pattern 2023-08-23T17:43:22Z Warner Losh imp@FreeBSD.org 2023-08-22T01:31:09Z urn:sha1:4b40a16f0d188422227478889b38cc341d50f88f Remove /^\s*\*+\s*\$FreeBSD\$.*$\n/ Similar commit in current: (cherry picked from commit 2ff63af9b88c) Garbage collect unused prototype for clockintr(). 2016-05-20T15:34:03Z Robert Watson rwatson@FreeBSD.org 2016-05-20T15:34:03Z urn:sha1:57b3862fd24dfd32e416c5bd4100255961bdd359 MFC after: 3 days Remove unused stuff from cpu.h. 2010-07-15T01:58:20Z Warner Losh imp@FreeBSD.org 2010-07-15T01:58:20Z urn:sha1:9d1f4f86c5a978ec9e5be07d889c8974a2a08f31 Move inappropriate stuff in cpu.h elsewhere: {s,g}et_intr_mask -> md_var.h num_tlbentries -> tlb.h Remove #define clockframe trapframe and fix clock, which was the only place this was used. All the rest of this stuff was unused. # we're not quite minimal yet, since we duplicate a few status register things # here... Inspired by: bde@ Sibyte provides a 64-bit read-only counter that counts at half the processor 2010-03-20T05:49:06Z Neel Natu neel@FreeBSD.org 2010-03-20T05:49:06Z urn:sha1:69a5a0bfea65db1e1faccb50e13262563a5b6048 frequency. This counter can be accessed coherently from both cores. Use this as the preferred timecounter for the SWARM kernels. The CP0 COUNT register is unusable as the timecounter on SMP platforms because the COUNT registers on different CPUs are not guaranteed to be in sync. FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64, 2008-04-13T07:27:37Z Warner Losh imp@FreeBSD.org 2008-04-13T07:27:37Z urn:sha1:45d426a34efcef976ba43725cc355ff6bc3809fc mips32r2 and mips64r2 (and close relatives) processors. There presently is support for ADMtek ADM5120, A mips 4Kc in a malta board, the RB533 routerboard (based on IDT RC32434) and some preliminary support for sibtye/broadcom designs. Other hardware support will be forthcomcing. This port boots multiuser under gxemul emulating the malta board and also bootstraps on the hardware whose support is forthcoming... Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard, Randall Stewert and others that have contributed to the mips2 and/or mips2-jnpr perforce branches. Juniper contirbuted a generic mips port late in the life cycle of the misp2 branch. Warner Losh merged the mips2 and Juniper code bases, and others list above have worked for the past several months to get to multiuser. In addition, the mips2 work owe a debt to the trail blazing efforts of the original mips branch in perforce done by Juli Mallett.