diff options
| author | Oliver Fromme <olli@FreeBSD.org> | 2024-08-23 04:46:19 +0000 |
|---|---|---|
| committer | Xin LI <delphij@FreeBSD.org> | 2024-08-26 15:21:13 +0000 |
| commit | e3819923655c544b5494293d48d19067c67eb832 (patch) | |
| tree | 2b7644a56d2c07c86521b1802350c7758122c2d2 | |
| parent | 700ff8f05f08b1329daa1acc924d0d2885be0822 (diff) | |
| -rw-r--r-- | sys/dev/amdsmn/amdsmn.c | 7 | ||||
| -rw-r--r-- | sys/dev/amdtemp/amdtemp.c | 3 |
2 files changed, 10 insertions, 0 deletions
diff --git a/sys/dev/amdsmn/amdsmn.c b/sys/dev/amdsmn/amdsmn.c index decb2c1249ed..fbef358f4957 100644 --- a/sys/dev/amdsmn/amdsmn.c +++ b/sys/dev/amdsmn/amdsmn.c @@ -61,6 +61,7 @@ #define PCI_DEVICE_ID_AMD_17H_M60H_ROOT 0x1630 #define PCI_DEVICE_ID_AMD_19H_M10H_ROOT 0x14a4 #define PCI_DEVICE_ID_AMD_19H_M60H_ROOT 0x14d8 +#define PCI_DEVICE_ID_AMD_19H_M70H_ROOT 0x14e8 struct pciid; struct amdsmn_softc { @@ -116,6 +117,12 @@ static const struct pciid { .amdsmn_addr_reg = F17H_SMN_ADDR_REG, .amdsmn_data_reg = F17H_SMN_DATA_REG, }, + { + .amdsmn_vendorid = CPU_VENDOR_AMD, + .amdsmn_deviceid = PCI_DEVICE_ID_AMD_19H_M70H_ROOT, + .amdsmn_addr_reg = F17H_SMN_ADDR_REG, + .amdsmn_data_reg = F17H_SMN_DATA_REG, + }, }; /* diff --git a/sys/dev/amdtemp/amdtemp.c b/sys/dev/amdtemp/amdtemp.c index b38f92131c77..0e7f805b40fd 100644 --- a/sys/dev/amdtemp/amdtemp.c +++ b/sys/dev/amdtemp/amdtemp.c @@ -116,6 +116,7 @@ struct amdtemp_softc { #define DEVICEID_AMD_HOSTB17H_M60H_ROOT 0x1630 #define DEVICEID_AMD_HOSTB19H_M10H_ROOT 0x14a4 #define DEVICEID_AMD_HOSTB19H_M60H_ROOT 0x14d8 +#define DEVICEID_AMD_HOSTB19H_M70H_ROOT 0x14e8 static const struct amdtemp_product { uint16_t amdtemp_vendorid; @@ -142,6 +143,7 @@ static const struct amdtemp_product { { VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M60H_ROOT, false }, { VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M10H_ROOT, false }, { VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M60H_ROOT, false }, + { VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M70H_ROOT, false }, }; /* @@ -875,6 +877,7 @@ amdtemp_probe_ccd_sensors19h(device_t dev, uint32_t model) _Static_assert((int)NUM_CCDS >= 12, ""); break; case 0x60 ... 0x6f: /* Zen4 Ryzen "Raphael" */ + case 0x70 ... 0x7f: /* Zen4 Ryzen "Phoenix" */ sc->sc_temp_base = AMDTEMP_ZEN4_CCD_TMP_BASE; maxreg = 8; _Static_assert((int)NUM_CCDS >= 8, ""); |