vendor/clang/clang-release_601-r335540vendor/clang-60

52 files changed, 656 insertions, 409 deletions

diff --git a/docs/UsersManual.rst b/docs/UsersManual.rst
index 11f77e58798e..fb6112d0298e 100644
--- a/docs/UsersManual.rst
+++ b/docs/UsersManual.rst
@@ -2741,7 +2741,7 @@ Execute ``clang-cl /?`` to see a list of supported options:
       /Gv                     Set __vectorcall as a default calling convention
       /Gw-                    Don't put each data item in its own section
       /Gw                     Put each data item in its own section
-      /GX-                    Enable exception handling
+      /GX-                    Disable exception handling
       /GX                     Enable exception handling
       /Gy-                    Don't put each function in its own section
       /Gy                     Put each function in its own section
diff --git a/include/clang/Basic/DiagnosticDriverKinds.td b/include/clang/Basic/DiagnosticDriverKinds.td
index 28aead0cdb99..69c20ea7806c 100644
--- a/include/clang/Basic/DiagnosticDriverKinds.td
+++ b/include/clang/Basic/DiagnosticDriverKinds.td
@@ -326,6 +326,10 @@ def warn_drv_unsupported_abicalls : Warning<
   "ignoring '-mabicalls' option as it cannot be used with "
   "non position-independent code and the N64 ABI">,
   InGroup<OptionIgnored>;
+def err_drv_unsupported_indirect_jump_opt : Error<
+  "'-mindirect-jump=%0' is unsupported with the '%1' architecture">;
+def err_drv_unknown_indirect_jump_opt : Error<
+  "unknown '-mindirect-jump=' option '%0'">;
 
 def warn_drv_unable_to_find_directory_expected : Warning<
   "unable to find %0 directory, expected to be in '%1'">,
diff --git a/include/clang/Basic/DiagnosticSemaKinds.td b/include/clang/Basic/DiagnosticSemaKinds.td
index ec624a0cc116..9d17bdaeb7cd 100644
--- a/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/include/clang/Basic/DiagnosticSemaKinds.td
@@ -759,6 +759,10 @@ def warn_cxx_ms_struct :
   Warning<"ms_struct may not produce Microsoft-compatible layouts for classes "
           "with base classes or virtual functions">,
   DefaultError, InGroup<IncompatibleMSStruct>;
+def warn_npot_ms_struct :
+  Warning<"ms_struct may not produce Microsoft-compatible layouts with fundamental "
+          "data types with sizes that aren't a power of two">,
+  DefaultError, InGroup<IncompatibleMSStruct>;
 def err_section_conflict : Error<"%0 causes a section type conflict with %1">;
 def err_no_base_classes : Error<"invalid use of '__super', %0 has no base classes">;
 def err_invalid_super_scope : Error<"invalid use of '__super', "
diff --git a/include/clang/Driver/CLCompatOptions.td b/include/clang/Driver/CLCompatOptions.td
index c1f0a89b5dc8..e417f6cbbec6 100644
--- a/include/clang/Driver/CLCompatOptions.td
+++ b/include/clang/Driver/CLCompatOptions.td
@@ -238,7 +238,7 @@ def _SLASH_Fo : CLCompileJoined<"Fo">,
 def _SLASH_GX : CLFlag<"GX">,
   HelpText<"Enable exception handling">;
 def _SLASH_GX_ : CLFlag<"GX-">,
-  HelpText<"Enable exception handling">;
+  HelpText<"Disable exception handling">;
 def _SLASH_imsvc : CLJoinedOrSeparate<"imsvc">,
   HelpText<"Add directory to system include search path, as if part of %INCLUDE%">,
   MetaVarName<"<dir>">;
diff --git a/include/clang/Driver/Options.td b/include/clang/Driver/Options.td
index ad72aef3fc94..7480f5163d3b 100644
--- a/include/clang/Driver/Options.td
+++ b/include/clang/Driver/Options.td
@@ -1100,7 +1100,8 @@ def fthinlto_index_EQ : Joined<["-"], "fthinlto-index=">,
   HelpText<"Perform ThinLTO importing using provided function summary index">;
 def fmacro_backtrace_limit_EQ : Joined<["-"], "fmacro-backtrace-limit=">,
                                 Group<f_Group>, Flags<[DriverOption, CoreOption]>;
-def fmerge_all_constants : Flag<["-"], "fmerge-all-constants">, Group<f_Group>;
+def fmerge_all_constants : Flag<["-"], "fmerge-all-constants">, Group<f_Group>,
+  Flags<[CC1Option]>, HelpText<"Allow merging of constants">;
 def fmessage_length_EQ : Joined<["-"], "fmessage-length=">, Group<f_Group>;
 def fms_extensions : Flag<["-"], "fms-extensions">, Group<f_Group>, Flags<[CC1Option, CoreOption]>,
   HelpText<"Accept some non-standard constructs supported by the Microsoft compiler">;
@@ -1249,7 +1250,7 @@ def fveclib : Joined<["-"], "fveclib=">, Group<f_Group>, Flags<[CC1Option]>,
 def fno_lax_vector_conversions : Flag<["-"], "fno-lax-vector-conversions">, Group<f_Group>,
   HelpText<"Disallow implicit conversions between vectors with a different number of elements or different element types">, Flags<[CC1Option]>;
 def fno_merge_all_constants : Flag<["-"], "fno-merge-all-constants">, Group<f_Group>,
-    Flags<[CC1Option]>, HelpText<"Disallow merging of constants">;
+  HelpText<"Disallow merging of constants">;
 def fno_modules : Flag <["-"], "fno-modules">, Group<f_Group>,
   Flags<[DriverOption]>;
 def fno_implicit_module_maps : Flag <["-"], "fno-implicit-module-maps">, Group<f_Group>,
@@ -1992,6 +1993,9 @@ def mbranch_likely : Flag<["-"], "mbranch-likely">, Group<m_Group>,
   IgnoredGCCCompat;
 def mno_branch_likely : Flag<["-"], "mno-branch-likely">, Group<m_Group>,
   IgnoredGCCCompat;
+def mindirect_jump_EQ : Joined<["-"], "mindirect-jump=">,
+  Group<m_Group>,
+  HelpText<"Change indirect jump instructions to inhibit speculation">;
 def mdsp : Flag<["-"], "mdsp">, Group<m_Group>;
 def mno_dsp : Flag<["-"], "mno-dsp">, Group<m_Group>;
 def mdspr2 : Flag<["-"], "mdspr2">, Group<m_Group>;
@@ -2559,6 +2563,8 @@ def mrtm : Flag<["-"], "mrtm">, Group<m_x86_Features_Group>;
 def mno_rtm : Flag<["-"], "mno-rtm">, Group<m_x86_Features_Group>;
 def mrdseed : Flag<["-"], "mrdseed">, Group<m_x86_Features_Group>;
 def mno_rdseed : Flag<["-"], "mno-rdseed">, Group<m_x86_Features_Group>;
+def msahf : Flag<["-"], "msahf">, Group<m_x86_Features_Group>;
+def mno_sahf : Flag<["-"], "mno-sahf">, Group<m_x86_Features_Group>;
 def msgx : Flag<["-"], "msgx">, Group<m_x86_Features_Group>;
 def mno_sgx : Flag<["-"], "mno-sgx">, Group<m_x86_Features_Group>;
 def msha : Flag<["-"], "msha">, Group<m_x86_Features_Group>;
diff --git a/lib/AST/ExprConstant.cpp b/lib/AST/ExprConstant.cpp
index 8d9b3c3bebc0..57bf2fca4eb7 100644
--- a/lib/AST/ExprConstant.cpp
+++ b/lib/AST/ExprConstant.cpp
@@ -61,14 +61,22 @@ namespace {
 
   static QualType getType(APValue::LValueBase B) {
     if (!B) return QualType();
-    if (const ValueDecl *D = B.dyn_cast<const ValueDecl*>())
+    if (const ValueDecl *D = B.dyn_cast<const ValueDecl*>()) {
       // FIXME: It's unclear where we're supposed to take the type from, and
-      // this actually matters for arrays of unknown bound. Using the type of
-      // the most recent declaration isn't clearly correct in general. Eg:
+      // this actually matters for arrays of unknown bound. Eg:
       //
       // extern int arr[]; void f() { extern int arr[3]; };
       // constexpr int *p = &arr[1]; // valid?
-      return cast<ValueDecl>(D->getMostRecentDecl())->getType();
+      //
+      // For now, we take the array bound from the most recent declaration.
+      for (auto *Redecl = cast<ValueDecl>(D->getMostRecentDecl()); Redecl;
+           Redecl = cast_or_null<ValueDecl>(Redecl->getPreviousDecl())) {
+        QualType T = Redecl->getType();
+        if (!T->isIncompleteArrayType())
+          return T;
+      }
+      return D->getType();
+    }
 
     const Expr *Base = B.get<const Expr*>();
 
@@ -8535,9 +8543,6 @@ bool IntExprEvaluator::VisitBinaryOperator(const BinaryOperator *E) {
             (LHSValue.Base && isZeroSized(RHSValue)))
           return Error(E);
         // Pointers with different bases cannot represent the same object.
-        // (Note that clang defaults to -fmerge-all-constants, which can
-        // lead to inconsistent results for comparisons involving the address
-        // of a constant; this generally doesn't matter in practice.)
         return Success(E->getOpcode() == BO_NE, E);
       }
 
diff --git a/lib/AST/RecordLayoutBuilder.cpp b/lib/AST/RecordLayoutBuilder.cpp
index a9d43dfa80c5..de38bc9b64dd 100644
--- a/lib/AST/RecordLayoutBuilder.cpp
+++ b/lib/AST/RecordLayoutBuilder.cpp
@@ -1751,7 +1751,34 @@ void ItaniumRecordLayoutBuilder::LayoutField(const FieldDecl *D,
       QualType T = Context.getBaseElementType(D->getType());
       if (const BuiltinType *BTy = T->getAs<BuiltinType>()) {
         CharUnits TypeSize = Context.getTypeSizeInChars(BTy);
-        if (TypeSize > FieldAlign)
+
+        if (!llvm::isPowerOf2_64(TypeSize.getQuantity())) {
+          assert(
+              !Context.getTargetInfo().getTriple().isWindowsMSVCEnvironment() &&
+              "Non PowerOf2 size in MSVC mode");
+          // Base types with sizes that aren't a power of two don't work
+          // with the layout rules for MS structs. This isn't an issue in
+          // MSVC itself since there are no such base data types there.
+          // On e.g. x86_32 mingw and linux, long double is 12 bytes though.
+          // Any structs involving that data type obviously can't be ABI
+          // compatible with MSVC regardless of how it is laid out.
+
+          // Since ms_struct can be mass enabled (via a pragma or via the
+          // -mms-bitfields command line parameter), this can trigger for
+          // structs that don't actually need MSVC compatibility, so we
+          // need to be able to sidestep the ms_struct layout for these types.
+
+          // Since the combination of -mms-bitfields together with structs
+          // like max_align_t (which contains a long double) for mingw is
+          // quite comon (and GCC handles it silently), just handle it
+          // silently there. For other targets that have ms_struct enabled
+          // (most probably via a pragma or attribute), trigger a diagnostic
+          // that defaults to an error.
+          if (!Context.getTargetInfo().getTriple().isWindowsGNUEnvironment())
+            Diag(D->getLocation(), diag::warn_npot_ms_struct);
+        }
+        if (TypeSize > FieldAlign &&
+            llvm::isPowerOf2_64(TypeSize.getQuantity()))
           FieldAlign = TypeSize;
       }
     }
diff --git a/lib/Basic/Targets/AArch64.cpp b/lib/Basic/Targets/AArch64.cpp
index 4d3cd121f705..8762ef691700 100644
--- a/lib/Basic/Targets/AArch64.cpp
+++ b/lib/Basic/Targets/AArch64.cpp
@@ -299,7 +299,40 @@ ArrayRef<const char *> AArch64TargetInfo::getGCCRegNames() const {
 }
 
 const TargetInfo::GCCRegAlias AArch64TargetInfo::GCCRegAliases[] = {
-    {{"w31"}, "wsp"}, {{"x29"}, "fp"}, {{"x30"}, "lr"}, {{"x31"}, "sp"},
+    {{"w31"}, "wsp"},
+    {{"x31"}, "sp"},
+    // GCC rN registers are aliases of xN registers.
+    {{"r0"}, "x0"},
+    {{"r1"}, "x1"},
+    {{"r2"}, "x2"},
+    {{"r3"}, "x3"},
+    {{"r4"}, "x4"},
+    {{"r5"}, "x5"},
+    {{"r6"}, "x6"},
+    {{"r7"}, "x7"},
+    {{"r8"}, "x8"},
+    {{"r9"}, "x9"},
+    {{"r10"}, "x10"},
+    {{"r11"}, "x11"},
+    {{"r12"}, "x12"},
+    {{"r13"}, "x13"},
+    {{"r14"}, "x14"},
+    {{"r15"}, "x15"},
+    {{"r16"}, "x16"},
+    {{"r17"}, "x17"},
+    {{"r18"}, "x18"},
+    {{"r19"}, "x19"},
+    {{"r20"}, "x20"},
+    {{"r21"}, "x21"},
+    {{"r22"}, "x22"},
+    {{"r23"}, "x23"},
+    {{"r24"}, "x24"},
+    {{"r25"}, "x25"},
+    {{"r26"}, "x26"},
+    {{"r27"}, "x27"},
+    {{"r28"}, "x28"},
+    {{"r29", "x29"}, "fp"},
+    {{"r30", "x30"}, "lr"},
     // The S/D/Q and W/X registers overlap, but aren't really aliases; we
     // don't want to substitute one of these for a different-sized one.
 };
diff --git a/lib/Basic/Targets/Mips.h b/lib/Basic/Targets/Mips.h
index 28900f21f86b..4b61116a3256 100644
--- a/lib/Basic/Targets/Mips.h
+++ b/lib/Basic/Targets/Mips.h
@@ -54,6 +54,7 @@ class LLVM_LIBRARY_VISIBILITY MipsTargetInfo : public TargetInfo {
   enum DspRevEnum { NoDSP, DSP1, DSP2 } DspRev;
   bool HasMSA;
   bool DisableMadd4;
+  bool UseIndirectJumpHazard;
 
 protected:
   bool HasFP64;
@@ -64,7 +65,8 @@ public:
       : TargetInfo(Triple), IsMips16(false), IsMicromips(false),
         IsNan2008(false), IsAbs2008(false), IsSingleFloat(false),
         IsNoABICalls(false), CanUseBSDABICalls(false), FloatABI(HardFloat),
-        DspRev(NoDSP), HasMSA(false), DisableMadd4(false), HasFP64(false) {
+        DspRev(NoDSP), HasMSA(false), DisableMadd4(false),
+        UseIndirectJumpHazard(false), HasFP64(false) {
     TheCXXABI.set(TargetCXXABI::GenericMIPS);
 
     setABI((getTriple().getArch() == llvm::Triple::mips ||
@@ -338,6 +340,8 @@ public:
         IsAbs2008 = false;
       else if (Feature == "+noabicalls")
         IsNoABICalls = true;
+      else if (Feature == "+use-indirect-jump-hazard")
+        UseIndirectJumpHazard = true;
     }
 
     setDataLayout();
diff --git a/lib/Basic/Targets/X86.cpp b/lib/Basic/Targets/X86.cpp
index cfa6c571d6ea..8251e6abd649 100644
--- a/lib/Basic/Targets/X86.cpp
+++ b/lib/Basic/Targets/X86.cpp
@@ -198,6 +198,7 @@ bool X86TargetInfo::initFeatureMap(
     LLVM_FALLTHROUGH;
   case CK_Core2:
     setFeatureEnabledImpl(Features, "ssse3", true);
+    setFeatureEnabledImpl(Features, "sahf", true);
     LLVM_FALLTHROUGH;
   case CK_Yonah:
   case CK_Prescott:
@@ -239,6 +240,7 @@ bool X86TargetInfo::initFeatureMap(
     setFeatureEnabledImpl(Features, "ssse3", true);
     setFeatureEnabledImpl(Features, "fxsr", true);
     setFeatureEnabledImpl(Features, "cx16", true);
+    setFeatureEnabledImpl(Features, "sahf", true);
     break;
 
   case CK_KNM:
@@ -269,6 +271,7 @@ bool X86TargetInfo::initFeatureMap(
     setFeatureEnabledImpl(Features, "xsaveopt", true);
     setFeatureEnabledImpl(Features, "xsave", true);
     setFeatureEnabledImpl(Features, "movbe", true);
+    setFeatureEnabledImpl(Features, "sahf", true);
     break;
 
   case CK_K6_2:
@@ -282,6 +285,7 @@ bool X86TargetInfo::initFeatureMap(
     setFeatureEnabledImpl(Features, "sse4a", true);
     setFeatureEnabledImpl(Features, "lzcnt", true);
     setFeatureEnabledImpl(Features, "popcnt", true);
+    setFeatureEnabledImpl(Features, "sahf", true);
     LLVM_FALLTHROUGH;
   case CK_K8SSE3:
     setFeatureEnabledImpl(Features, "sse3", true);
@@ -315,6 +319,7 @@ bool X86TargetInfo::initFeatureMap(
     setFeatureEnabledImpl(Features, "prfchw", true);
     setFeatureEnabledImpl(Features, "cx16", true);
     setFeatureEnabledImpl(Features, "fxsr", true);
+    setFeatureEnabledImpl(Features, "sahf", true);
     break;
 
   case CK_ZNVER1:
@@ -338,6 +343,7 @@ bool X86TargetInfo::initFeatureMap(
     setFeatureEnabledImpl(Features, "prfchw", true);
     setFeatureEnabledImpl(Features, "rdrnd", true);
     setFeatureEnabledImpl(Features, "rdseed", true);
+    setFeatureEnabledImpl(Features, "sahf", true);
     setFeatureEnabledImpl(Features, "sha", true);
     setFeatureEnabledImpl(Features, "sse4a", true);
     setFeatureEnabledImpl(Features, "xsave", true);
@@ -372,6 +378,7 @@ bool X86TargetInfo::initFeatureMap(
     setFeatureEnabledImpl(Features, "cx16", true);
     setFeatureEnabledImpl(Features, "fxsr", true);
     setFeatureEnabledImpl(Features, "xsave", true);
+    setFeatureEnabledImpl(Features, "sahf", true);
     break;
   }
   if (!TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec))
@@ -768,6 +775,8 @@ bool X86TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
       HasRetpoline = true;
     } else if (Feature == "+retpoline-external-thunk") {
       HasRetpolineExternalThunk = true;
+    } else if (Feature == "+sahf") {
+      HasLAHFSAHF = true;
     }
 
     X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature)
@@ -1240,6 +1249,7 @@ bool X86TargetInfo::isValidFeatureName(StringRef Name) const {
       .Case("rdrnd", true)
       .Case("rdseed", true)
       .Case("rtm", true)
+      .Case("sahf", true)
       .Case("sgx", true)
       .Case("sha", true)
       .Case("shstk", true)
@@ -1313,6 +1323,7 @@ bool X86TargetInfo::hasFeature(StringRef Feature) const {
       .Case("retpoline", HasRetpoline)
       .Case("retpoline-external-thunk", HasRetpolineExternalThunk)
       .Case("rtm", HasRTM)
+      .Case("sahf", HasLAHFSAHF)
       .Case("sgx", HasSGX)
       .Case("sha", HasSHA)
       .Case("shstk", HasSHSTK)
diff --git a/lib/Basic/Targets/X86.h b/lib/Basic/Targets/X86.h
index 590531c17854..fa2fbee387b6 100644
--- a/lib/Basic/Targets/X86.h
+++ b/lib/Basic/Targets/X86.h
@@ -98,6 +98,7 @@ class LLVM_LIBRARY_VISIBILITY X86TargetInfo : public TargetInfo {
   bool HasPREFETCHWT1 = false;
   bool HasRetpoline = false;
   bool HasRetpolineExternalThunk = false;
+  bool HasLAHFSAHF = false;
 
   /// \brief Enumeration of all of the X86 CPUs supported by Clang.
   ///
diff --git a/lib/Basic/Version.cpp b/lib/Basic/Version.cpp
index 580bd94ccbef..ea3754e02af5 100644
--- a/lib/Basic/Version.cpp
+++ b/lib/Basic/Version.cpp
@@ -36,7 +36,7 @@ std::string getClangRepositoryPath() {
 
   // If the SVN_REPOSITORY is empty, try to use the SVN keyword. This helps us
   // pick up a tag in an SVN export, for example.
-  StringRef SVNRepository("$URL: https://llvm.org/svn/llvm-project/cfe/tags/RELEASE_600/final/lib/Basic/Version.cpp $");
+  StringRef SVNRepository("$URL: https://llvm.org/svn/llvm-project/cfe/tags/RELEASE_601/final/lib/Basic/Version.cpp $");
   if (URL.empty()) {
     URL = SVNRepository.slice(SVNRepository.find(':'),
                               SVNRepository.find("/lib/Basic"));
diff --git a/lib/CodeGen/TargetInfo.cpp b/lib/CodeGen/TargetInfo.cpp
index abd633280b9d..f2352a373401 100644
--- a/lib/CodeGen/TargetInfo.cpp
+++ b/lib/CodeGen/TargetInfo.cpp
@@ -1931,13 +1931,8 @@ void X86_32TargetCodeGenInfo::setTargetAttributes(
     return;
   if (const FunctionDecl *FD = dyn_cast_or_null<FunctionDecl>(D)) {
     if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) {
-      // Get the LLVM function.
       llvm::Function *Fn = cast<llvm::Function>(GV);
-
-      // Now add the 'alignstack' attribute with a value of 16.
-      llvm::AttrBuilder B;
-      B.addStackAlignmentAttr(16);
-      Fn->addAttributes(llvm::AttributeList::FunctionIndex, B);
+      Fn->addFnAttr("stackrealign");
     }
     if (FD->hasAttr<AnyX86InterruptAttr>()) {
       llvm::Function *Fn = cast<llvm::Function>(GV);
@@ -2292,13 +2287,8 @@ public:
       return;
     if (const FunctionDecl *FD = dyn_cast_or_null<FunctionDecl>(D)) {
       if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) {
-        // Get the LLVM function.
-        auto *Fn = cast<llvm::Function>(GV);
-
-        // Now add the 'alignstack' attribute with a value of 16.
-        llvm::AttrBuilder B;
-        B.addStackAlignmentAttr(16);
-        Fn->addAttributes(llvm::AttributeList::FunctionIndex, B);
+        llvm::Function *Fn = cast<llvm::Function>(GV);
+        Fn->addFnAttr("stackrealign");
       }
       if (FD->hasAttr<AnyX86InterruptAttr>()) {
         llvm::Function *Fn = cast<llvm::Function>(GV);
@@ -2429,13 +2419,8 @@ void WinX86_64TargetCodeGenInfo::setTargetAttributes(
     return;
   if (const FunctionDecl *FD = dyn_cast_or_null<FunctionDecl>(D)) {
     if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) {
-      // Get the LLVM function.
-      auto *Fn = cast<llvm::Function>(GV);
-
-      // Now add the 'alignstack' attribute with a value of 16.
-      llvm::AttrBuilder B;
-      B.addStackAlignmentAttr(16);
-      Fn->addAttributes(llvm::AttributeList::FunctionIndex, B);
+      llvm::Function *Fn = cast<llvm::Function>(GV);
+      Fn->addFnAttr("stackrealign");
     }
     if (FD->hasAttr<AnyX86InterruptAttr>()) {
       llvm::Function *Fn = cast<llvm::Function>(GV);
diff --git a/lib/Driver/Driver.cpp b/lib/Driver/Driver.cpp
index 325b233ac5ec..c890f7741503 100644
--- a/lib/Driver/Driver.cpp
+++ b/lib/Driver/Driver.cpp
@@ -858,11 +858,14 @@ Compilation *Driver::BuildCompilation(ArrayRef<const char *> ArgList) {
                                               : std::move(*CLOptions));
   if (HasConfigFile)
     for (auto *Opt : *CLOptions) {
+      if (Opt->getOption().matches(options::OPT_config))
+        continue;
+      unsigned Index = Args.MakeIndex(Opt->getSpelling());
       const Arg *BaseArg = &Opt->getBaseArg();
       if (BaseArg == Opt)
         BaseArg = nullptr;
       Arg *Copy = new llvm::opt::Arg(Opt->getOption(), Opt->getSpelling(),
-                                     Args.size(), BaseArg);
+                                     Index, BaseArg);
       Copy->getValues() = Opt->getValues();
       if (Opt->isClaimed())
         Copy->claim();
diff --git a/lib/Driver/ToolChains/Arch/Mips.cpp b/lib/Driver/ToolChains/Arch/Mips.cpp
index 61481a92d0b7..e72754d5ad53 100644
--- a/lib/Driver/ToolChains/Arch/Mips.cpp
+++ b/lib/Driver/ToolChains/Arch/Mips.cpp
@@ -343,6 +343,28 @@ void mips::getMIPSTargetFeatures(const Driver &D, const llvm::Triple &Triple,
   AddTargetFeature(Args, Features, options::OPT_mno_madd4, options::OPT_mmadd4,
                    "nomadd4");
   AddTargetFeature(Args, Features, options::OPT_mmt, options::OPT_mno_mt, "mt");
+
+  if (Arg *A = Args.getLastArg(options::OPT_mindirect_jump_EQ)) {
+    StringRef Val = StringRef(A->getValue());
+    if (Val == "hazard") {
+      Arg *B =
+          Args.getLastArg(options::OPT_mmicromips, options::OPT_mno_micromips);
+      Arg *C = Args.getLastArg(options::OPT_mips16, options::OPT_mno_mips16);
+
+      if (B && B->getOption().matches(options::OPT_mmicromips))
+        D.Diag(diag::err_drv_unsupported_indirect_jump_opt)
+            << "hazard" << "micromips";
+      else if (C && C->getOption().matches(options::OPT_mips16))
+        D.Diag(diag::err_drv_unsupported_indirect_jump_opt)
+            << "hazard" << "mips16";
+      else if (mips::supportsIndirectJumpHazardBarrier(CPUName))
+        Features.push_back("+use-indirect-jump-hazard");
+      else
+        D.Diag(diag::err_drv_unsupported_indirect_jump_opt)
+            << "hazard" << CPUName;
+    } else
+      D.Diag(diag::err_drv_unknown_indirect_jump_opt) << Val;
+  }
 }
 
 mips::IEEE754Standard mips::getIEEE754Standard(StringRef &CPU) {
@@ -447,3 +469,20 @@ bool mips::shouldUseFPXX(const ArgList &Args, const llvm::Triple &Triple,
 
   return UseFPXX;
 }
+
+bool mips::supportsIndirectJumpHazardBarrier(StringRef &CPU) {
+  // Supporting the hazard barrier method of dealing with indirect
+  // jumps requires MIPSR2 support.
+  return llvm::StringSwitch<bool>(CPU)
+      .Case("mips32r2", true)
+      .Case("mips32r3", true)
+      .Case("mips32r5", true)
+      .Case("mips32r6", true)
+      .Case("mips64r2", true)
+      .Case("mips64r3", true)
+      .Case("mips64r5", true)
+      .Case("mips64r6", true)
+      .Case("octeon", true)
+      .Case("p5600", true)
+      .Default(false);
+}
diff --git a/lib/Driver/ToolChains/Arch/Mips.h b/lib/Driver/ToolChains/Arch/Mips.h
index 89eea9a1514c..7e90488363a5 100644
--- a/lib/Driver/ToolChains/Arch/Mips.h
+++ b/lib/Driver/ToolChains/Arch/Mips.h
@@ -53,6 +53,7 @@ bool isFPXXDefault(const llvm::Triple &Triple, StringRef CPUName,
 bool shouldUseFPXX(const llvm::opt::ArgList &Args, const llvm::Triple &Triple,
                    StringRef CPUName, StringRef ABIName,
                    mips::FloatABI FloatABI);
+bool supportsIndirectJumpHazardBarrier(StringRef &CPU);
 
 } // end namespace mips
 } // end namespace target
diff --git a/lib/Driver/ToolChains/Clang.cpp b/lib/Driver/ToolChains/Clang.cpp
index 484df520012c..a2821b70d716 100644
--- a/lib/Driver/ToolChains/Clang.cpp
+++ b/lib/Driver/ToolChains/Clang.cpp
@@ -3288,9 +3288,9 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA,
 
   Args.AddLastArg(CmdArgs, options::OPT_fveclib);
 
-  if (!Args.hasFlag(options::OPT_fmerge_all_constants,
-                    options::OPT_fno_merge_all_constants))
-    CmdArgs.push_back("-fno-merge-all-constants");
+  if (Args.hasFlag(options::OPT_fmerge_all_constants,
+                   options::OPT_fno_merge_all_constants, false))
+    CmdArgs.push_back("-fmerge-all-constants");
 
   // LLVM Code Generator Options.
 
diff --git a/lib/Driver/ToolChains/CrossWindows.cpp b/lib/Driver/ToolChains/CrossWindows.cpp
index 5049033c4137..6ca04a8a3abb 100644
--- a/lib/Driver/ToolChains/CrossWindows.cpp
+++ b/lib/Driver/ToolChains/CrossWindows.cpp
@@ -127,7 +127,8 @@ void tools::CrossWindows::Linker::ConstructJob(
     }
 
     CmdArgs.push_back("-shared");
-    CmdArgs.push_back("-Bdynamic");
+    CmdArgs.push_back(Args.hasArg(options::OPT_static) ? "-Bstatic"
+                                                       : "-Bdynamic");
 
     CmdArgs.push_back("--enable-auto-image-base");
 
diff --git a/lib/Driver/ToolChains/MinGW.cpp b/lib/Driver/ToolChains/MinGW.cpp
index 572ea803f2dc..db83ac6fa7a2 100644
--- a/lib/Driver/ToolChains/MinGW.cpp
+++ b/lib/Driver/ToolChains/MinGW.cpp
@@ -141,22 +141,21 @@ void tools::MinGW::Linker::ConstructJob(Compilation &C, const JobAction &JA,
     CmdArgs.push_back("console");
   }
 
+  if (Args.hasArg(options::OPT_mdll))
+    CmdArgs.push_back("--dll");
+  else if (Args.hasArg(options::OPT_shared))
+    CmdArgs.push_back("--shared");
   if (Args.hasArg(options::OPT_static))
     CmdArgs.push_back("-Bstatic");
-  else {
-    if (Args.hasArg(options::OPT_mdll))
-      CmdArgs.push_back("--dll");
-    else if (Args.hasArg(options::OPT_shared))
-      CmdArgs.push_back("--shared");
+  else
     CmdArgs.push_back("-Bdynamic");
-    if (Args.hasArg(options::OPT_mdll) || Args.hasArg(options::OPT_shared)) {
-      CmdArgs.push_back("-e");
-      if (TC.getArch() == llvm::Triple::x86)
-        CmdArgs.push_back("_DllMainCRTStartup@12");
-      else
-        CmdArgs.push_back("DllMainCRTStartup");
-      CmdArgs.push_back("--enable-auto-image-base");
-    }
+  if (Args.hasArg(options::OPT_mdll) || Args.hasArg(options::OPT_shared)) {
+    CmdArgs.push_back("-e");
+    if (TC.getArch() == llvm::Triple::x86)
+      CmdArgs.push_back("_DllMainCRTStartup@12");
+    else
+      CmdArgs.push_back("DllMainCRTStartup");
+    CmdArgs.push_back("--enable-auto-image-base");
   }
 
   CmdArgs.push_back("-o");
diff --git a/lib/Frontend/ASTUnit.cpp b/lib/Frontend/ASTUnit.cpp
index 1160df15a920..83731c0d39e2 100644
--- a/lib/Frontend/ASTUnit.cpp
+++ b/lib/Frontend/ASTUnit.cpp
@@ -1259,6 +1259,7 @@ ASTUnit::getMainBufferWithPrecompiledPreamble(
       Preamble.reset();
       PreambleDiagnostics.clear();
       TopLevelDeclsInPreamble.clear();
+      PreambleSrcLocCache.clear();
       PreambleRebuildCounter = 1;
     }
   }
diff --git a/lib/Frontend/CompilerInvocation.cpp b/lib/Frontend/CompilerInvocation.cpp
index 6ce719aac673..438a48083ef6 100644
--- a/lib/Frontend/CompilerInvocation.cpp
+++ b/lib/Frontend/CompilerInvocation.cpp
@@ -552,7 +552,7 @@ static bool ParseCodeGenArgs(CodeGenOptions &Opts, ArgList &Args, InputKind IK,
       Args.hasFlag(OPT_ffine_grained_bitfield_accesses,
                    OPT_fno_fine_grained_bitfield_accesses, false);
   Opts.DwarfDebugFlags = Args.getLastArgValue(OPT_dwarf_debug_flags);
-  Opts.MergeAllConstants = !Args.hasArg(OPT_fno_merge_all_constants);
+  Opts.MergeAllConstants = Args.hasArg(OPT_fmerge_all_constants);
   Opts.NoCommon = Args.hasArg(OPT_fno_common);
   Opts.NoImplicitFloat = Args.hasArg(OPT_no_implicit_float);
   Opts.OptimizeSize = getOptimizationLevelSize(Args);
diff --git a/lib/Headers/avx512vlbitalgintrin.h b/lib/Headers/avx512vlbitalgintrin.h
index 76eb87721b8b..beb0a0e4779a 100644
--- a/lib/Headers/avx512vlbitalgintrin.h
+++ b/lib/Headers/avx512vlbitalgintrin.h
@@ -54,23 +54,23 @@ _mm256_maskz_popcnt_epi16(__mmask16 __U, __m256i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_popcnt_epi16(__m128i __A)
+_mm_popcnt_epi16(__m128i __A)
 {
   return (__m128i) __builtin_ia32_vpopcntw_128((__v8hi) __A);
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_mask_popcnt_epi16(__m128i __A, __mmask8 __U, __m128i __B)
+_mm_mask_popcnt_epi16(__m128i __A, __mmask8 __U, __m128i __B)
 {
   return (__m128i) __builtin_ia32_selectw_128((__mmask8) __U,
-              (__v8hi) _mm128_popcnt_epi16(__B),
+              (__v8hi) _mm_popcnt_epi16(__B),
               (__v8hi) __A);
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_maskz_popcnt_epi16(__mmask8 __U, __m128i __B)
+_mm_maskz_popcnt_epi16(__mmask8 __U, __m128i __B)
 {
-  return _mm128_mask_popcnt_epi16((__m128i) _mm_setzero_si128(),
+  return _mm_mask_popcnt_epi16((__m128i) _mm_setzero_si128(),
               __U,
               __B);
 }
@@ -98,29 +98,29 @@ _mm256_maskz_popcnt_epi8(__mmask32 __U, __m256i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_popcnt_epi8(__m128i __A)
+_mm_popcnt_epi8(__m128i __A)
 {
   return (__m128i) __builtin_ia32_vpopcntb_128((__v16qi) __A);
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_mask_popcnt_epi8(__m128i __A, __mmask16 __U, __m128i __B)
+_mm_mask_popcnt_epi8(__m128i __A, __mmask16 __U, __m128i __B)
 {
   return (__m128i) __builtin_ia32_selectb_128((__mmask16) __U,
-              (__v16qi) _mm128_popcnt_epi8(__B),
+              (__v16qi) _mm_popcnt_epi8(__B),
               (__v16qi) __A);
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_maskz_popcnt_epi8(__mmask16 __U, __m128i __B)
+_mm_maskz_popcnt_epi8(__mmask16 __U, __m128i __B)
 {
-  return _mm128_mask_popcnt_epi8((__m128i) _mm_setzero_si128(),
+  return _mm_mask_popcnt_epi8((__m128i) _mm_setzero_si128(),
               __U,
               __B);
 }
 
 static __inline__ __mmask32 __DEFAULT_FN_ATTRS
-_mm256_mask_bitshuffle_epi32_mask(__mmask32 __U, __m256i __A, __m256i __B)
+_mm256_mask_bitshuffle_epi64_mask(__mmask32 __U, __m256i __A, __m256i __B)
 {
   return (__mmask32) __builtin_ia32_vpshufbitqmb256_mask((__v32qi) __A,
               (__v32qi) __B,
@@ -128,15 +128,15 @@ _mm256_mask_bitshuffle_epi32_mask(__mmask32 __U, __m256i __A, __m256i __B)
 }
 
 static __inline__ __mmask32 __DEFAULT_FN_ATTRS
-_mm256_bitshuffle_epi32_mask(__m256i __A, __m256i __B)
+_mm256_bitshuffle_epi64_mask(__m256i __A, __m256i __B)
 {
-  return _mm256_mask_bitshuffle_epi32_mask((__mmask32) -1,
+  return _mm256_mask_bitshuffle_epi64_mask((__mmask32) -1,
               __A,
               __B);
 }
 
 static __inline__ __mmask16 __DEFAULT_FN_ATTRS
-_mm128_mask_bitshuffle_epi16_mask(__mmask16 __U, __m128i __A, __m128i __B)
+_mm_mask_bitshuffle_epi64_mask(__mmask16 __U, __m128i __A, __m128i __B)
 {
   return (__mmask16) __builtin_ia32_vpshufbitqmb128_mask((__v16qi) __A,
               (__v16qi) __B,
@@ -144,9 +144,9 @@ _mm128_mask_bitshuffle_epi16_mask(__mmask16 __U, __m128i __A, __m128i __B)
 }
 
 static __inline__ __mmask16 __DEFAULT_FN_ATTRS
-_mm128_bitshuffle_epi16_mask(__m128i __A, __m128i __B)
+_mm_bitshuffle_epi64_mask(__m128i __A, __m128i __B)
 {
-  return _mm128_mask_bitshuffle_epi16_mask((__mmask16) -1,
+  return _mm_mask_bitshuffle_epi64_mask((__mmask16) -1,
               __A,
               __B);
 }
diff --git a/lib/Headers/avx512vlvbmi2intrin.h b/lib/Headers/avx512vlvbmi2intrin.h
index d1ec4976f274..5b05376fc4b2 100644
--- a/lib/Headers/avx512vlvbmi2intrin.h
+++ b/lib/Headers/avx512vlvbmi2intrin.h
@@ -31,13 +31,8 @@
 /* Define the default attributes for the functions in this file. */
 #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512vl,avx512vbmi2")))
 
-static  __inline __m128i __DEFAULT_FN_ATTRS
-_mm128_setzero_hi(void) {
-  return (__m128i)(__v8hi){ 0, 0, 0, 0, 0, 0, 0, 0 };
-}
-
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_mask_compress_epi16(__m128i __S, __mmask8 __U, __m128i __D)
+_mm_mask_compress_epi16(__m128i __S, __mmask8 __U, __m128i __D)
 {
   return (__m128i) __builtin_ia32_compresshi128_mask ((__v8hi) __D,
               (__v8hi) __S,
@@ -45,15 +40,15 @@ _mm128_mask_compress_epi16(__m128i __S, __mmask8 __U, __m128i __D)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_maskz_compress_epi16(__mmask8 __U, __m128i __D)
+_mm_maskz_compress_epi16(__mmask8 __U, __m128i __D)
 {
   return (__m128i) __builtin_ia32_compresshi128_mask ((__v8hi) __D,
-              (__v8hi) _mm128_setzero_hi(),
+              (__v8hi) _mm_setzero_si128(),
               __U);
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_mask_compress_epi8(__m128i __S, __mmask16 __U, __m128i __D)
+_mm_mask_compress_epi8(__m128i __S, __mmask16 __U, __m128i __D)
 {
   return (__m128i) __builtin_ia32_compressqi128_mask ((__v16qi) __D,
               (__v16qi) __S,
@@ -61,29 +56,29 @@ _mm128_mask_compress_epi8(__m128i __S, __mmask16 __U, __m128i __D)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_maskz_compress_epi8(__mmask16 __U, __m128i __D)
+_mm_maskz_compress_epi8(__mmask16 __U, __m128i __D)
 {
   return (__m128i) __builtin_ia32_compressqi128_mask ((__v16qi) __D,
-              (__v16qi) _mm128_setzero_hi(),
+              (__v16qi) _mm_setzero_si128(),
               __U);
 }
 
 static __inline__ void __DEFAULT_FN_ATTRS
-_mm128_mask_compressstoreu_epi16(void *__P, __mmask8 __U, __m128i __D)
+_mm_mask_compressstoreu_epi16(void *__P, __mmask8 __U, __m128i __D)
 {
   __builtin_ia32_compressstorehi128_mask ((__v8hi *) __P, (__v8hi) __D,
               __U);
 }
 
 static __inline__ void __DEFAULT_FN_ATTRS
-_mm128_mask_compressstoreu_epi8(void *__P, __mmask16 __U, __m128i __D)
+_mm_mask_compressstoreu_epi8(void *__P, __mmask16 __U, __m128i __D)
 {
   __builtin_ia32_compressstoreqi128_mask ((__v16qi *) __P, (__v16qi) __D,
               __U);
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_mask_expand_epi16(__m128i __S, __mmask8 __U, __m128i __D)
+_mm_mask_expand_epi16(__m128i __S, __mmask8 __U, __m128i __D)
 {
   return (__m128i) __builtin_ia32_expandhi128_mask ((__v8hi) __D,
               (__v8hi) __S,
@@ -91,15 +86,15 @@ _mm128_mask_expand_epi16(__m128i __S, __mmask8 __U, __m128i __D)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_maskz_expand_epi16(__mmask8 __U, __m128i __D)
+_mm_maskz_expand_epi16(__mmask8 __U, __m128i __D)
 {
   return (__m128i) __builtin_ia32_expandhi128_mask ((__v8hi) __D,
-              (__v8hi) _mm128_setzero_hi(),
+              (__v8hi) _mm_setzero_si128(),
               __U);
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_mask_expand_epi8(__m128i __S, __mmask16 __U, __m128i __D)
+_mm_mask_expand_epi8(__m128i __S, __mmask16 __U, __m128i __D)
 {
   return (__m128i) __builtin_ia32_expandqi128_mask ((__v16qi) __D,
               (__v16qi) __S,
@@ -107,15 +102,15 @@ _mm128_mask_expand_epi8(__m128i __S, __mmask16 __U, __m128i __D)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_maskz_expand_epi8(__mmask16 __U, __m128i __D)
+_mm_maskz_expand_epi8(__mmask16 __U, __m128i __D)
 {
   return (__m128i) __builtin_ia32_expandqi128_mask ((__v16qi) __D,
-              (__v16qi) _mm128_setzero_hi(),
+              (__v16qi) _mm_setzero_si128(),
               __U);
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_mask_expandloadu_epi16(__m128i __S, __mmask8 __U, void const *__P)
+_mm_mask_expandloadu_epi16(__m128i __S, __mmask8 __U, void const *__P)
 {
   return (__m128i) __builtin_ia32_expandloadhi128_mask ((const __v8hi *)__P,
               (__v8hi) __S,
@@ -123,15 +118,15 @@ _mm128_mask_expandloadu_epi16(__m128i __S, __mmask8 __U, void const *__P)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_maskz_expandloadu_epi16(__mmask8 __U, void const *__P)
+_mm_maskz_expandloadu_epi16(__mmask8 __U, void const *__P)
 {
   return (__m128i) __builtin_ia32_expandloadhi128_mask ((const __v8hi *)__P,
-              (__v8hi) _mm128_setzero_hi(),
+              (__v8hi) _mm_setzero_si128(),
               __U);
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_mask_expandloadu_epi8(__m128i __S, __mmask16 __U, void const *__P)
+_mm_mask_expandloadu_epi8(__m128i __S, __mmask16 __U, void const *__P)
 {
   return (__m128i) __builtin_ia32_expandloadqi128_mask ((const __v16qi *)__P,
               (__v16qi) __S,
@@ -139,19 +134,13 @@ _mm128_mask_expandloadu_epi8(__m128i __S, __mmask16 __U, void const *__P)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_maskz_expandloadu_epi8(__mmask16 __U, void const *__P)
+_mm_maskz_expandloadu_epi8(__mmask16 __U, void const *__P)
 {
   return (__m128i) __builtin_ia32_expandloadqi128_mask ((const __v16qi *)__P,
-              (__v16qi) _mm128_setzero_hi(),
+              (__v16qi) _mm_setzero_si128(),
               __U);
 }
 
-static  __inline __m256i __DEFAULT_FN_ATTRS
-_mm256_setzero_hi(void) {
-  return (__m256i)(__v16hi){ 0, 0, 0, 0, 0, 0, 0, 0,
-                             0, 0, 0, 0, 0, 0, 0, 0 };
-}
-
 static __inline__ __m256i __DEFAULT_FN_ATTRS
 _mm256_mask_compress_epi16(__m256i __S, __mmask16 __U, __m256i __D)
 {
@@ -164,7 +153,7 @@ static __inline__ __m256i __DEFAULT_FN_ATTRS
 _mm256_maskz_compress_epi16(__mmask16 __U, __m256i __D)
 {
   return (__m256i) __builtin_ia32_compresshi256_mask ((__v16hi) __D,
-              (__v16hi) _mm256_setzero_hi(),
+              (__v16hi) _mm256_setzero_si256(),
               __U);
 }
 
@@ -180,7 +169,7 @@ static __inline__ __m256i __DEFAULT_FN_ATTRS
 _mm256_maskz_compress_epi8(__mmask32 __U, __m256i __D)
 {
   return (__m256i) __builtin_ia32_compressqi256_mask ((__v32qi) __D,
-              (__v32qi) _mm256_setzero_hi(),
+              (__v32qi) _mm256_setzero_si256(),
               __U);
 }
 
@@ -210,7 +199,7 @@ static __inline__ __m256i __DEFAULT_FN_ATTRS
 _mm256_maskz_expand_epi16(__mmask16 __U, __m256i __D)
 {
   return (__m256i) __builtin_ia32_expandhi256_mask ((__v16hi) __D,
-              (__v16hi) _mm256_setzero_hi(),
+              (__v16hi) _mm256_setzero_si256(),
               __U);
 }
 
@@ -226,7 +215,7 @@ static __inline__ __m256i __DEFAULT_FN_ATTRS
 _mm256_maskz_expand_epi8(__mmask32 __U, __m256i __D)
 {
   return (__m256i) __builtin_ia32_expandqi256_mask ((__v32qi) __D,
-              (__v32qi) _mm256_setzero_hi(),
+              (__v32qi) _mm256_setzero_si256(),
               __U);
 }
 
@@ -242,7 +231,7 @@ static __inline__ __m256i __DEFAULT_FN_ATTRS
 _mm256_maskz_expandloadu_epi16(__mmask16 __U, void const *__P)
 {
   return (__m256i) __builtin_ia32_expandloadhi256_mask ((const __v16hi *)__P,
-              (__v16hi) _mm256_setzero_hi(),
+              (__v16hi) _mm256_setzero_si256(),
               __U);
 }
 
@@ -258,7 +247,7 @@ static __inline__ __m256i __DEFAULT_FN_ATTRS
 _mm256_maskz_expandloadu_epi8(__mmask32 __U, void const *__P)
 {
   return (__m256i) __builtin_ia32_expandloadqi256_mask ((const __v32qi *)__P,
-              (__v32qi) _mm256_setzero_hi(),
+              (__v32qi) _mm256_setzero_si256(),
               __U);
 }
 
@@ -270,23 +259,23 @@ _mm256_maskz_expandloadu_epi8(__mmask32 __U, void const *__P)
                                           (__mmask8)(U)); })
 
 #define _mm256_maskz_shldi_epi64(U, A, B, I) \
-  _mm256_mask_shldi_epi64(_mm256_setzero_hi(), (U), (A), (B), (I))
+  _mm256_mask_shldi_epi64(_mm256_setzero_si256(), (U), (A), (B), (I))
 
 #define _mm256_shldi_epi64(A, B, I) \
   _mm256_mask_shldi_epi64(_mm256_undefined_si256(), (__mmask8)(-1), (A), (B), (I))
 
-#define _mm128_mask_shldi_epi64(S, U, A, B, I) __extension__ ({ \
+#define _mm_mask_shldi_epi64(S, U, A, B, I) __extension__ ({ \
   (__m128i)__builtin_ia32_vpshldq128_mask((__v2di)(A), \
                                           (__v2di)(B), \
                                           (int)(I), \
                                           (__v2di)(S), \
                                           (__mmask8)(U)); })
 
-#define _mm128_maskz_shldi_epi64(U, A, B, I) \
-  _mm128_mask_shldi_epi64(_mm128_setzero_hi(), (U), (A), (B), (I))
+#define _mm_maskz_shldi_epi64(U, A, B, I) \
+  _mm_mask_shldi_epi64(_mm_setzero_si128(), (U), (A), (B), (I))
 
-#define _mm128_shldi_epi64(A, B, I) \
-  _mm128_mask_shldi_epi64(_mm_undefined_si128(), (__mmask8)(-1), (A), (B), (I))
+#define _mm_shldi_epi64(A, B, I) \
+  _mm_mask_shldi_epi64(_mm_undefined_si128(), (__mmask8)(-1), (A), (B), (I))
 
 #define _mm256_mask_shldi_epi32(S, U, A, B, I) __extension__ ({ \
   (__m256i)__builtin_ia32_vpshldd256_mask((__v8si)(A), \
@@ -296,23 +285,23 @@ _mm256_maskz_expandloadu_epi8(__mmask32 __U, void const *__P)
                                           (__mmask8)(U)); })
 
 #define _mm256_maskz_shldi_epi32(U, A, B, I) \
-  _mm256_mask_shldi_epi32(_mm256_setzero_hi(), (U), (A), (B), (I))
+  _mm256_mask_shldi_epi32(_mm256_setzero_si256(), (U), (A), (B), (I))
 
 #define _mm256_shldi_epi32(A, B, I) \
   _mm256_mask_shldi_epi32(_mm256_undefined_si256(), (__mmask8)(-1), (A), (B), (I))
 
-#define _mm128_mask_shldi_epi32(S, U, A, B, I) __extension__ ({ \
+#define _mm_mask_shldi_epi32(S, U, A, B, I) __extension__ ({ \
   (__m128i)__builtin_ia32_vpshldd128_mask((__v4si)(A), \
                                           (__v4si)(B), \
                                           (int)(I), \
                                           (__v4si)(S), \
                                           (__mmask8)(U)); })
 
-#define _mm128_maskz_shldi_epi32(U, A, B, I) \
-  _mm128_mask_shldi_epi32(_mm128_setzero_hi(), (U), (A), (B), (I))
+#define _mm_maskz_shldi_epi32(U, A, B, I) \
+  _mm_mask_shldi_epi32(_mm_setzero_si128(), (U), (A), (B), (I))
 
-#define _mm128_shldi_epi32(A, B, I) \
-  _mm128_mask_shldi_epi32(_mm_undefined_si128(), (__mmask8)(-1), (A), (B), (I))
+#define _mm_shldi_epi32(A, B, I) \
+  _mm_mask_shldi_epi32(_mm_undefined_si128(), (__mmask8)(-1), (A), (B), (I))
 
 #define _mm256_mask_shldi_epi16(S, U, A, B, I) __extension__ ({ \
   (__m256i)__builtin_ia32_vpshldw256_mask((__v16hi)(A), \
@@ -322,23 +311,23 @@ _mm256_maskz_expandloadu_epi8(__mmask32 __U, void const *__P)
                                           (__mmask16)(U)); })
 
 #define _mm256_maskz_shldi_epi16(U, A, B, I) \
-  _mm256_mask_shldi_epi16(_mm256_setzero_hi(), (U), (A), (B), (I))
+  _mm256_mask_shldi_epi16(_mm256_setzero_si256(), (U), (A), (B), (I))
 
 #define _mm256_shldi_epi16(A, B, I) \
   _mm256_mask_shldi_epi16(_mm256_undefined_si256(), (__mmask8)(-1), (A), (B), (I))
 
-#define _mm128_mask_shldi_epi16(S, U, A, B, I) __extension__ ({ \
+#define _mm_mask_shldi_epi16(S, U, A, B, I) __extension__ ({ \
   (__m128i)__builtin_ia32_vpshldw128_mask((__v8hi)(A), \
                                           (__v8hi)(B), \
                                           (int)(I), \
                                           (__v8hi)(S), \
                                           (__mmask8)(U)); })
 
-#define _mm128_maskz_shldi_epi16(U, A, B, I) \
-  _mm128_mask_shldi_epi16(_mm128_setzero_hi(), (U), (A), (B), (I))
+#define _mm_maskz_shldi_epi16(U, A, B, I) \
+  _mm_mask_shldi_epi16(_mm_setzero_si128(), (U), (A), (B), (I))
 
-#define _mm128_shldi_epi16(A, B, I) \
-  _mm128_mask_shldi_epi16(_mm_undefined_si128(), (__mmask8)(-1), (A), (B), (I))
+#define _mm_shldi_epi16(A, B, I) \
+  _mm_mask_shldi_epi16(_mm_undefined_si128(), (__mmask8)(-1), (A), (B), (I))
 
 #define _mm256_mask_shrdi_epi64(S, U, A, B, I) __extension__ ({ \
   (__m256i)__builtin_ia32_vpshrdq256_mask((__v4di)(A), \
@@ -348,23 +337,23 @@ _mm256_maskz_expandloadu_epi8(__mmask32 __U, void const *__P)
                                           (__mmask8)(U)); })
 
 #define _mm256_maskz_shrdi_epi64(U, A, B, I) \
-  _mm256_mask_shrdi_epi64(_mm256_setzero_hi(), (U), (A), (B), (I))
+  _mm256_mask_shrdi_epi64(_mm256_setzero_si256(), (U), (A), (B), (I))
 
 #define _mm256_shrdi_epi64(A, B, I) \
   _mm256_mask_shrdi_epi64(_mm256_undefined_si256(), (__mmask8)(-1), (A), (B), (I))
 
-#define _mm128_mask_shrdi_epi64(S, U, A, B, I) __extension__ ({ \
+#define _mm_mask_shrdi_epi64(S, U, A, B, I) __extension__ ({ \
   (__m128i)__builtin_ia32_vpshrdq128_mask((__v2di)(A), \
                                           (__v2di)(B), \
                                           (int)(I), \
                                           (__v2di)(S), \
                                           (__mmask8)(U)); })
 
-#define _mm128_maskz_shrdi_epi64(U, A, B, I) \
-  _mm128_mask_shrdi_epi64(_mm128_setzero_hi(), (U), (A), (B), (I))
+#define _mm_maskz_shrdi_epi64(U, A, B, I) \
+  _mm_mask_shrdi_epi64(_mm_setzero_si128(), (U), (A), (B), (I))
 
-#define _mm128_shrdi_epi64(A, B, I) \
-  _mm128_mask_shrdi_epi64(_mm_undefined_si128(), (__mmask8)(-1), (A), (B), (I))
+#define _mm_shrdi_epi64(A, B, I) \
+  _mm_mask_shrdi_epi64(_mm_undefined_si128(), (__mmask8)(-1), (A), (B), (I))
 
 #define _mm256_mask_shrdi_epi32(S, U, A, B, I) __extension__ ({ \
   (__m256i)__builtin_ia32_vpshrdd256_mask((__v8si)(A), \
@@ -374,23 +363,23 @@ _mm256_maskz_expandloadu_epi8(__mmask32 __U, void const *__P)
                                           (__mmask8)(U)); })
 
 #define _mm256_maskz_shrdi_epi32(U, A, B, I) \
-  _mm256_mask_shrdi_epi32(_mm256_setzero_hi(), (U), (A), (B), (I))
+  _mm256_mask_shrdi_epi32(_mm256_setzero_si256(), (U), (A), (B), (I))
 
 #define _mm256_shrdi_epi32(A, B, I) \
   _mm256_mask_shrdi_epi32(_mm256_undefined_si256(), (__mmask8)(-1), (A), (B), (I))
 
-#define _mm128_mask_shrdi_epi32(S, U, A, B, I) __extension__ ({ \
+#define _mm_mask_shrdi_epi32(S, U, A, B, I) __extension__ ({ \
   (__m128i)__builtin_ia32_vpshrdd128_mask((__v4si)(A), \
                                           (__v4si)(B), \
                                           (int)(I), \
                                           (__v4si)(S), \
                                           (__mmask8)(U)); })
 
-#define _mm128_maskz_shrdi_epi32(U, A, B, I) \
-  _mm128_mask_shrdi_epi32(_mm128_setzero_hi(), (U), (A), (B), (I))
+#define _mm_maskz_shrdi_epi32(U, A, B, I) \
+  _mm_mask_shrdi_epi32(_mm_setzero_si128(), (U), (A), (B), (I))
 
-#define _mm128_shrdi_epi32(A, B, I) \
-  _mm128_mask_shrdi_epi32(_mm_undefined_si128(), (__mmask8)(-1), (A), (B), (I))
+#define _mm_shrdi_epi32(A, B, I) \
+  _mm_mask_shrdi_epi32(_mm_undefined_si128(), (__mmask8)(-1), (A), (B), (I))
 
 #define _mm256_mask_shrdi_epi16(S, U, A, B, I) __extension__ ({ \
   (__m256i)__builtin_ia32_vpshrdw256_mask((__v16hi)(A), \
@@ -400,23 +389,23 @@ _mm256_maskz_expandloadu_epi8(__mmask32 __U, void const *__P)
                                           (__mmask16)(U)); })
 
 #define _mm256_maskz_shrdi_epi16(U, A, B, I) \
-  _mm256_mask_shrdi_epi16(_mm256_setzero_hi(), (U), (A), (B), (I))
+  _mm256_mask_shrdi_epi16(_mm256_setzero_si256(), (U), (A), (B), (I))
 
 #define _mm256_shrdi_epi16(A, B, I) \
   _mm256_mask_shrdi_epi16(_mm256_undefined_si256(), (__mmask8)(-1), (A), (B), (I))
 
-#define _mm128_mask_shrdi_epi16(S, U, A, B, I) __extension__ ({ \
+#define _mm_mask_shrdi_epi16(S, U, A, B, I) __extension__ ({ \
   (__m128i)__builtin_ia32_vpshrdw128_mask((__v8hi)(A), \
                                           (__v8hi)(B), \
                                           (int)(I), \
                                           (__v8hi)(S), \
                                           (__mmask8)(U)); })
 
-#define _mm128_maskz_shrdi_epi16(U, A, B, I) \
-  _mm128_mask_shrdi_epi16(_mm128_setzero_hi(), (U), (A), (B), (I))
+#define _mm_maskz_shrdi_epi16(U, A, B, I) \
+  _mm_mask_shrdi_epi16(_mm_setzero_si128(), (U), (A), (B), (I))
 
-#define _mm128_shrdi_epi16(A, B, I) \
-  _mm128_mask_shrdi_epi16(_mm_undefined_si128(), (__mmask8)(-1), (A), (B), (I))
+#define _mm_shrdi_epi16(A, B, I) \
+  _mm_mask_shrdi_epi16(_mm_undefined_si128(), (__mmask8)(-1), (A), (B), (I))
 
 static __inline__ __m256i __DEFAULT_FN_ATTRS
 _mm256_mask_shldv_epi64(__m256i __S, __mmask8 __U, __m256i __A, __m256i __B)
@@ -446,7 +435,7 @@ _mm256_shldv_epi64(__m256i __S, __m256i __A, __m256i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_mask_shldv_epi64(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
+_mm_mask_shldv_epi64(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpshldvq128_mask ((__v2di) __S,
               (__v2di) __A,
@@ -455,7 +444,7 @@ _mm128_mask_shldv_epi64(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_maskz_shldv_epi64(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
+_mm_maskz_shldv_epi64(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpshldvq128_maskz ((__v2di) __S,
               (__v2di) __A,
@@ -464,7 +453,7 @@ _mm128_maskz_shldv_epi64(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_shldv_epi64(__m128i __S, __m128i __A, __m128i __B)
+_mm_shldv_epi64(__m128i __S, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpshldvq128_mask ((__v2di) __S,
               (__v2di) __A,
@@ -500,7 +489,7 @@ _mm256_shldv_epi32(__m256i __S, __m256i __A, __m256i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_mask_shldv_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
+_mm_mask_shldv_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpshldvd128_mask ((__v4si) __S,
               (__v4si) __A,
@@ -509,7 +498,7 @@ _mm128_mask_shldv_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_maskz_shldv_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
+_mm_maskz_shldv_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpshldvd128_maskz ((__v4si) __S,
               (__v4si) __A,
@@ -518,7 +507,7 @@ _mm128_maskz_shldv_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_shldv_epi32(__m128i __S, __m128i __A, __m128i __B)
+_mm_shldv_epi32(__m128i __S, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpshldvd128_mask ((__v4si) __S,
               (__v4si) __A,
@@ -554,7 +543,7 @@ _mm256_shldv_epi16(__m256i __S, __m256i __A, __m256i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_mask_shldv_epi16(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
+_mm_mask_shldv_epi16(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpshldvw128_mask ((__v8hi) __S,
               (__v8hi) __A,
@@ -563,7 +552,7 @@ _mm128_mask_shldv_epi16(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_maskz_shldv_epi16(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
+_mm_maskz_shldv_epi16(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpshldvw128_maskz ((__v8hi) __S,
               (__v8hi) __A,
@@ -572,7 +561,7 @@ _mm128_maskz_shldv_epi16(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_shldv_epi16(__m128i __S, __m128i __A, __m128i __B)
+_mm_shldv_epi16(__m128i __S, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpshldvw128_mask ((__v8hi) __S,
               (__v8hi) __A,
@@ -608,7 +597,7 @@ _mm256_shrdv_epi64(__m256i __S, __m256i __A, __m256i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_mask_shrdv_epi64(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
+_mm_mask_shrdv_epi64(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpshrdvq128_mask ((__v2di) __S,
               (__v2di) __A,
@@ -617,7 +606,7 @@ _mm128_mask_shrdv_epi64(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_maskz_shrdv_epi64(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
+_mm_maskz_shrdv_epi64(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpshrdvq128_maskz ((__v2di) __S,
               (__v2di) __A,
@@ -626,7 +615,7 @@ _mm128_maskz_shrdv_epi64(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_shrdv_epi64(__m128i __S, __m128i __A, __m128i __B)
+_mm_shrdv_epi64(__m128i __S, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpshrdvq128_mask ((__v2di) __S,
               (__v2di) __A,
@@ -662,7 +651,7 @@ _mm256_shrdv_epi32(__m256i __S, __m256i __A, __m256i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_mask_shrdv_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
+_mm_mask_shrdv_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpshrdvd128_mask ((__v4si) __S,
               (__v4si) __A,
@@ -671,7 +660,7 @@ _mm128_mask_shrdv_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_maskz_shrdv_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
+_mm_maskz_shrdv_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpshrdvd128_maskz ((__v4si) __S,
               (__v4si) __A,
@@ -680,7 +669,7 @@ _mm128_maskz_shrdv_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_shrdv_epi32(__m128i __S, __m128i __A, __m128i __B)
+_mm_shrdv_epi32(__m128i __S, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpshrdvd128_mask ((__v4si) __S,
               (__v4si) __A,
@@ -716,7 +705,7 @@ _mm256_shrdv_epi16(__m256i __S, __m256i __A, __m256i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_mask_shrdv_epi16(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
+_mm_mask_shrdv_epi16(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpshrdvw128_mask ((__v8hi) __S,
               (__v8hi) __A,
@@ -725,7 +714,7 @@ _mm128_mask_shrdv_epi16(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_maskz_shrdv_epi16(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
+_mm_maskz_shrdv_epi16(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpshrdvw128_maskz ((__v8hi) __S,
               (__v8hi) __A,
@@ -734,7 +723,7 @@ _mm128_maskz_shrdv_epi16(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_shrdv_epi16(__m128i __S, __m128i __A, __m128i __B)
+_mm_shrdv_epi16(__m128i __S, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpshrdvw128_mask ((__v8hi) __S,
               (__v8hi) __A,
diff --git a/lib/Headers/avx512vlvnniintrin.h b/lib/Headers/avx512vlvnniintrin.h
index 745ae8b7ad3d..40cbbf29964d 100644
--- a/lib/Headers/avx512vlvnniintrin.h
+++ b/lib/Headers/avx512vlvnniintrin.h
@@ -141,7 +141,7 @@ _mm256_dpwssds_epi32(__m256i __S, __m256i __A, __m256i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_mask_dpbusd_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
+_mm_mask_dpbusd_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpdpbusd128_mask ((__v4si) __S,
               (__v4si) __A,
@@ -150,7 +150,7 @@ _mm128_mask_dpbusd_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_maskz_dpbusd_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
+_mm_maskz_dpbusd_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpdpbusd128_maskz ((__v4si) __S,
               (__v4si) __A,
@@ -159,7 +159,7 @@ _mm128_maskz_dpbusd_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_dpbusd_epi32(__m128i __S, __m128i __A, __m128i __B)
+_mm_dpbusd_epi32(__m128i __S, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpdpbusd128_mask ((__v4si) __S,
               (__v4si) __A,
@@ -168,7 +168,7 @@ _mm128_dpbusd_epi32(__m128i __S, __m128i __A, __m128i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_mask_dpbusds_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
+_mm_mask_dpbusds_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpdpbusds128_mask ((__v4si) __S,
               (__v4si) __A,
@@ -177,7 +177,7 @@ _mm128_mask_dpbusds_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_maskz_dpbusds_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
+_mm_maskz_dpbusds_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpdpbusds128_maskz ((__v4si) __S,
               (__v4si) __A,
@@ -186,7 +186,7 @@ _mm128_maskz_dpbusds_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_dpbusds_epi32(__m128i __S, __m128i __A, __m128i __B)
+_mm_dpbusds_epi32(__m128i __S, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpdpbusds128_mask ((__v4si) __S,
               (__v4si) __A,
@@ -195,7 +195,7 @@ _mm128_dpbusds_epi32(__m128i __S, __m128i __A, __m128i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_mask_dpwssd_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
+_mm_mask_dpwssd_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpdpwssd128_mask ((__v4si) __S,
               (__v4si) __A,
@@ -204,7 +204,7 @@ _mm128_mask_dpwssd_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_maskz_dpwssd_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
+_mm_maskz_dpwssd_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpdpwssd128_maskz ((__v4si) __S,
               (__v4si) __A,
@@ -213,7 +213,7 @@ _mm128_maskz_dpwssd_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_dpwssd_epi32(__m128i __S, __m128i __A, __m128i __B)
+_mm_dpwssd_epi32(__m128i __S, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpdpwssd128_mask ((__v4si) __S,
               (__v4si) __A,
@@ -222,7 +222,7 @@ _mm128_dpwssd_epi32(__m128i __S, __m128i __A, __m128i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_mask_dpwssds_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
+_mm_mask_dpwssds_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpdpwssds128_mask ((__v4si) __S,
               (__v4si) __A,
@@ -231,7 +231,7 @@ _mm128_mask_dpwssds_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_maskz_dpwssds_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
+_mm_maskz_dpwssds_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpdpwssds128_maskz ((__v4si) __S,
               (__v4si) __A,
@@ -240,7 +240,7 @@ _mm128_maskz_dpwssds_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
 }
 
 static __inline__ __m128i __DEFAULT_FN_ATTRS
-_mm128_dpwssds_epi32(__m128i __S, __m128i __A, __m128i __B)
+_mm_dpwssds_epi32(__m128i __S, __m128i __A, __m128i __B)
 {
   return (__m128i) __builtin_ia32_vpdpwssds128_mask ((__v4si) __S,
               (__v4si) __A,
diff --git a/lib/Sema/SemaDecl.cpp b/lib/Sema/SemaDecl.cpp
index 7ca48c34e516..0ceaf7c6d691 100644
--- a/lib/Sema/SemaDecl.cpp
+++ b/lib/Sema/SemaDecl.cpp
@@ -10947,6 +10947,8 @@ void Sema::CheckCompleteVariableDeclaration(VarDecl *var) {
   if (var->isThisDeclarationADefinition() &&
       var->getDeclContext()->getRedeclContext()->isFileContext() &&
       var->isExternallyVisible() && var->hasLinkage() &&
+      !var->isInline() && !var->getDescribedVarTemplate() &&
+      !isTemplateInstantiation(var->getTemplateSpecializationKind()) &&
       !getDiagnostics().isIgnored(diag::warn_missing_variable_declarations,
                                   var->getLocation())) {
     // Find a previous declaration that's not a definition.
diff --git a/test/CodeGen/aarch64-inline-asm.c b/test/CodeGen/aarch64-inline-asm.c
index a1078f1bab83..264df9d5fc03 100644
--- a/test/CodeGen/aarch64-inline-asm.c
+++ b/test/CodeGen/aarch64-inline-asm.c
@@ -54,3 +54,23 @@ void test_constraint_Q(void) {
     asm("ldxr %0, %1" : "=r"(val) : "Q"(var));
 // CHECK: call i32 asm "ldxr $0, $1", "=r,*Q"(i64* @var)
 }
+
+void test_gcc_registers(void) {
+    register unsigned long reg0 asm("r0") = 0;
+    register unsigned long reg1 asm("r1") = 1;
+    register unsigned int  reg29 asm("r29") = 2;
+    register unsigned int  reg30 asm("r30") = 3;
+
+    // Test remapping register names in register ... asm("rN") statments.
+    // rN register operands in these two inline assembly lines
+    // should get renamed to valid AArch64 registers.
+    asm volatile("hvc #0" : : "r" (reg0), "r" (reg1));
+    // CHECK: call void asm sideeffect "hvc #0", "{x0},{x1}"
+    asm volatile("hvc #0" : : "r" (reg29), "r" (reg30));
+    // CHECK: call void asm sideeffect "hvc #0", "{fp},{lr}"
+
+    // rN registers when used without register ... asm("rN") syntax
+    // should not be remapped.
+    asm volatile("mov r0, r1\n");
+    // CHECK: call void asm sideeffect "mov r0, r1\0A", ""()
+}
diff --git a/test/CodeGen/attr-target-x86.c b/test/CodeGen/attr-target-x86.c
index 9e46de74916b..43faab37a1a9 100644
--- a/test/CodeGen/attr-target-x86.c
+++ b/test/CodeGen/attr-target-x86.c
@@ -37,10 +37,10 @@ int __attribute__((target("arch=lakemont,mmx"))) lake(int a) { return 4; }
 // CHECK: qq{{.*}} #6
 // CHECK: lake{{.*}} #7
 // CHECK: #0 = {{.*}}"target-cpu"="i686" "target-features"="+x87"
-// CHECK: #1 = {{.*}}"target-cpu"="ivybridge" "target-features"="+aes,+avx,+cx16,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt"
+// CHECK: #1 = {{.*}}"target-cpu"="ivybridge" "target-features"="+aes,+avx,+cx16,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt"
 // CHECK: #2 = {{.*}}"target-cpu"="i686" "target-features"="+x87,-aes,-avx,-avx2,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512ifma,-avx512pf,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vpopcntdq,-f16c,-fma,-fma4,-gfni,-pclmul,-sha,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-vaes,-vpclmulqdq,-xop,-xsave,-xsaveopt"
 // CHECK: #3 = {{.*}}"target-cpu"="i686" "target-features"="+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87"
 // CHECK: #4 = {{.*}}"target-cpu"="i686" "target-features"="+x87,-avx,-avx2,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512ifma,-avx512pf,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vpopcntdq,-f16c,-fma,-fma4,-sse4.1,-sse4.2,-vaes,-vpclmulqdq,-xop,-xsave,-xsaveopt"
-// CHECK: #5 = {{.*}}"target-cpu"="ivybridge" "target-features"="+avx,+cx16,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt,-aes,-vaes"
+// CHECK: #5 = {{.*}}"target-cpu"="ivybridge" "target-features"="+avx,+cx16,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt,-aes,-vaes"
 // CHECK: #6 = {{.*}}"target-cpu"="i686" "target-features"="+x87,-3dnow,-3dnowa,-mmx"
 // CHECK: #7 = {{.*}}"target-cpu"="lakemont" "target-features"="+mmx"
diff --git a/test/CodeGen/avx512vlbitalg-builtins.c b/test/CodeGen/avx512vlbitalg-builtins.c
index 9b2a1a469b2a..3dd5b68fd463 100644
--- a/test/CodeGen/avx512vlbitalg-builtins.c
+++ b/test/CodeGen/avx512vlbitalg-builtins.c
@@ -21,23 +21,23 @@ __m256i test_mm256_maskz_popcnt_epi16(__mmask16 __U, __m256i __B) {
   return _mm256_maskz_popcnt_epi16(__U, __B);
 }
 
-__m128i test_mm128_popcnt_epi16(__m128i __A) {
-  // CHECK-LABEL: @test_mm128_popcnt_epi16
+__m128i test_mm_popcnt_epi16(__m128i __A) {
+  // CHECK-LABEL: @test_mm_popcnt_epi16
   // CHECK: @llvm.ctpop.v8i16
-  return _mm128_popcnt_epi16(__A);
+  return _mm_popcnt_epi16(__A);
 }
 
-__m128i test_mm128_mask_popcnt_epi16(__m128i __A, __mmask8 __U, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_mask_popcnt_epi16
+__m128i test_mm_mask_popcnt_epi16(__m128i __A, __mmask8 __U, __m128i __B) {
+  // CHECK-LABEL: @test_mm_mask_popcnt_epi16
   // CHECK: @llvm.ctpop.v8i16
   // CHECK: select <8 x i1> %{{[0-9]+}}, <8 x i16> %{{[0-9]+}}, <8 x i16> {{.*}}
-  return _mm128_mask_popcnt_epi16(__A, __U, __B);
+  return _mm_mask_popcnt_epi16(__A, __U, __B);
 }
-__m128i test_mm128_maskz_popcnt_epi16(__mmask8 __U, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_maskz_popcnt_epi16
+__m128i test_mm_maskz_popcnt_epi16(__mmask8 __U, __m128i __B) {
+  // CHECK-LABEL: @test_mm_maskz_popcnt_epi16
   // CHECK: @llvm.ctpop.v8i16
   // CHECK: select <8 x i1> %{{[0-9]+}}, <8 x i16> %{{[0-9]+}}, <8 x i16> {{.*}}
-  return _mm128_maskz_popcnt_epi16(__U, __B);
+  return _mm_maskz_popcnt_epi16(__U, __B);
 }
 
 __m256i test_mm256_popcnt_epi8(__m256i __A) {
@@ -59,46 +59,46 @@ __m256i test_mm256_maskz_popcnt_epi8(__mmask32 __U, __m256i __B) {
   return _mm256_maskz_popcnt_epi8(__U, __B);
 }
 
-__m128i test_mm128_popcnt_epi8(__m128i __A) {
-  // CHECK-LABEL: @test_mm128_popcnt_epi8
+__m128i test_mm_popcnt_epi8(__m128i __A) {
+  // CHECK-LABEL: @test_mm_popcnt_epi8
   // CHECK: @llvm.ctpop.v16i8
-  return _mm128_popcnt_epi8(__A);
+  return _mm_popcnt_epi8(__A);
 }
 
-__m128i test_mm128_mask_popcnt_epi8(__m128i __A, __mmask16 __U, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_mask_popcnt_epi8
+__m128i test_mm_mask_popcnt_epi8(__m128i __A, __mmask16 __U, __m128i __B) {
+  // CHECK-LABEL: @test_mm_mask_popcnt_epi8
   // CHECK: @llvm.ctpop.v16i8
   // CHECK: select <16 x i1> %{{[0-9]+}}, <16 x i8> %{{[0-9]+}}, <16 x i8> {{.*}}
-  return _mm128_mask_popcnt_epi8(__A, __U, __B);
+  return _mm_mask_popcnt_epi8(__A, __U, __B);
 }
-__m128i test_mm128_maskz_popcnt_epi8(__mmask16 __U, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_maskz_popcnt_epi8
+__m128i test_mm_maskz_popcnt_epi8(__mmask16 __U, __m128i __B) {
+  // CHECK-LABEL: @test_mm_maskz_popcnt_epi8
   // CHECK: @llvm.ctpop.v16i8
   // CHECK: select <16 x i1> %{{[0-9]+}}, <16 x i8> %{{[0-9]+}}, <16 x i8> {{.*}}
-  return _mm128_maskz_popcnt_epi8(__U, __B);
+  return _mm_maskz_popcnt_epi8(__U, __B);
 }
 
-__mmask32 test_mm256_mask_bitshuffle_epi32_mask(__mmask32 __U, __m256i __A, __m256i __B) {
-  // CHECK-LABEL: @test_mm256_mask_bitshuffle_epi32_mask
+__mmask32 test_mm256_mask_bitshuffle_epi64_mask(__mmask32 __U, __m256i __A, __m256i __B) {
+  // CHECK-LABEL: @test_mm256_mask_bitshuffle_epi64_mask
   // CHECK: @llvm.x86.avx512.mask.vpshufbitqmb.256
-  return _mm256_mask_bitshuffle_epi32_mask(__U, __A, __B);
+  return _mm256_mask_bitshuffle_epi64_mask(__U, __A, __B);
 }
 
-__mmask32 test_mm256_bitshuffle_epi32_mask(__m256i __A, __m256i __B) {
-  // CHECK-LABEL: @test_mm256_bitshuffle_epi32_mask
+__mmask32 test_mm256_bitshuffle_epi64_mask(__m256i __A, __m256i __B) {
+  // CHECK-LABEL: @test_mm256_bitshuffle_epi64_mask
   // CHECK: @llvm.x86.avx512.mask.vpshufbitqmb.256
-  return _mm256_bitshuffle_epi32_mask(__A, __B);
+  return _mm256_bitshuffle_epi64_mask(__A, __B);
 }
 
-__mmask16 test_mm128_mask_bitshuffle_epi16_mask(__mmask16 __U, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_mask_bitshuffle_epi16_mask
+__mmask16 test_mm_mask_bitshuffle_epi64_mask(__mmask16 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_mask_bitshuffle_epi64_mask
   // CHECK: @llvm.x86.avx512.mask.vpshufbitqmb.128
-  return _mm128_mask_bitshuffle_epi16_mask(__U, __A, __B);
+  return _mm_mask_bitshuffle_epi64_mask(__U, __A, __B);
 }
 
-__mmask16 test_mm128_bitshuffle_epi16_mask(__m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_bitshuffle_epi16_mask
+__mmask16 test_mm_bitshuffle_epi64_mask(__m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_bitshuffle_epi64_mask
   // CHECK: @llvm.x86.avx512.mask.vpshufbitqmb.128
-  return _mm128_bitshuffle_epi16_mask(__A, __B);
+  return _mm_bitshuffle_epi64_mask(__A, __B);
 }
 
diff --git a/test/CodeGen/avx512vlvbmi2-builtins.c b/test/CodeGen/avx512vlvbmi2-builtins.c
index 6edc66d30eee..6615616c6f9b 100644
--- a/test/CodeGen/avx512vlvbmi2-builtins.c
+++ b/test/CodeGen/avx512vlvbmi2-builtins.c
@@ -2,88 +2,88 @@
 
 #include <immintrin.h>
 
-__m128i test_mm128_mask_compress_epi16(__m128i __S, __mmask8 __U, __m128i __D) {
-  // CHECK-LABEL: @test_mm128_mask_compress_epi16
+__m128i test_mm_mask_compress_epi16(__m128i __S, __mmask8 __U, __m128i __D) {
+  // CHECK-LABEL: @test_mm_mask_compress_epi16
   // CHECK: @llvm.x86.avx512.mask.compress.w.128
-  return _mm128_mask_compress_epi16(__S, __U, __D);
+  return _mm_mask_compress_epi16(__S, __U, __D);
 }
 
-__m128i test_mm128_maskz_compress_epi16(__mmask8 __U, __m128i __D) {
-  // CHECK-LABEL: @test_mm128_maskz_compress_epi16
+__m128i test_mm_maskz_compress_epi16(__mmask8 __U, __m128i __D) {
+  // CHECK-LABEL: @test_mm_maskz_compress_epi16
   // CHECK: @llvm.x86.avx512.mask.compress.w.128
-  return _mm128_maskz_compress_epi16(__U, __D);
+  return _mm_maskz_compress_epi16(__U, __D);
 }
 
-__m128i test_mm128_mask_compress_epi8(__m128i __S, __mmask16 __U, __m128i __D) {
-  // CHECK-LABEL: @test_mm128_mask_compress_epi8
+__m128i test_mm_mask_compress_epi8(__m128i __S, __mmask16 __U, __m128i __D) {
+  // CHECK-LABEL: @test_mm_mask_compress_epi8
   // CHECK: @llvm.x86.avx512.mask.compress.b.128
-  return _mm128_mask_compress_epi8(__S, __U, __D);
+  return _mm_mask_compress_epi8(__S, __U, __D);
 }
 
-__m128i test_mm128_maskz_compress_epi8(__mmask16 __U, __m128i __D) {
-  // CHECK-LABEL: @test_mm128_maskz_compress_epi8
+__m128i test_mm_maskz_compress_epi8(__mmask16 __U, __m128i __D) {
+  // CHECK-LABEL: @test_mm_maskz_compress_epi8
   // CHECK: @llvm.x86.avx512.mask.compress.b.128
-  return _mm128_maskz_compress_epi8(__U, __D);
+  return _mm_maskz_compress_epi8(__U, __D);
 }
 
-void test_mm128_mask_compressstoreu_epi16(void *__P, __mmask8 __U, __m128i __D) {
-  // CHECK-LABEL: @test_mm128_mask_compressstoreu_epi16
+void test_mm_mask_compressstoreu_epi16(void *__P, __mmask8 __U, __m128i __D) {
+  // CHECK-LABEL: @test_mm_mask_compressstoreu_epi16
   // CHECK: @llvm.x86.avx512.mask.compress.store.w.128
-  _mm128_mask_compressstoreu_epi16(__P, __U, __D);
+  _mm_mask_compressstoreu_epi16(__P, __U, __D);
 }
 
-void test_mm128_mask_compressstoreu_epi8(void *__P, __mmask16 __U, __m128i __D) {
-  // CHECK-LABEL: @test_mm128_mask_compressstoreu_epi8
+void test_mm_mask_compressstoreu_epi8(void *__P, __mmask16 __U, __m128i __D) {
+  // CHECK-LABEL: @test_mm_mask_compressstoreu_epi8
   // CHECK: @llvm.x86.avx512.mask.compress.store.b.128
-  _mm128_mask_compressstoreu_epi8(__P, __U, __D);
+  _mm_mask_compressstoreu_epi8(__P, __U, __D);
 }
 
-__m128i test_mm128_mask_expand_epi16(__m128i __S, __mmask8 __U, __m128i __D) {
-  // CHECK-LABEL: @test_mm128_mask_expand_epi16
+__m128i test_mm_mask_expand_epi16(__m128i __S, __mmask8 __U, __m128i __D) {
+  // CHECK-LABEL: @test_mm_mask_expand_epi16
   // CHECK: @llvm.x86.avx512.mask.expand.w.128
-  return _mm128_mask_expand_epi16(__S, __U, __D);
+  return _mm_mask_expand_epi16(__S, __U, __D);
 }
 
-__m128i test_mm128_maskz_expand_epi16(__mmask8 __U, __m128i __D) {
-  // CHECK-LABEL: @test_mm128_maskz_expand_epi16
+__m128i test_mm_maskz_expand_epi16(__mmask8 __U, __m128i __D) {
+  // CHECK-LABEL: @test_mm_maskz_expand_epi16
   // CHECK: @llvm.x86.avx512.mask.expand.w.128
-  return _mm128_maskz_expand_epi16(__U, __D);
+  return _mm_maskz_expand_epi16(__U, __D);
 }
 
-__m128i test_mm128_mask_expand_epi8(__m128i __S, __mmask16 __U, __m128i __D) {
-  // CHECK-LABEL: @test_mm128_mask_expand_epi8
+__m128i test_mm_mask_expand_epi8(__m128i __S, __mmask16 __U, __m128i __D) {
+  // CHECK-LABEL: @test_mm_mask_expand_epi8
   // CHECK: @llvm.x86.avx512.mask.expand.b.128
-  return _mm128_mask_expand_epi8(__S, __U, __D);
+  return _mm_mask_expand_epi8(__S, __U, __D);
 }
 
-__m128i test_mm128_maskz_expand_epi8(__mmask16 __U, __m128i __D) {
-  // CHECK-LABEL: @test_mm128_maskz_expand_epi8
+__m128i test_mm_maskz_expand_epi8(__mmask16 __U, __m128i __D) {
+  // CHECK-LABEL: @test_mm_maskz_expand_epi8
   // CHECK: @llvm.x86.avx512.mask.expand.b.128
-  return _mm128_maskz_expand_epi8(__U, __D);
+  return _mm_maskz_expand_epi8(__U, __D);
 }
 
-__m128i test_mm128_mask_expandloadu_epi16(__m128i __S, __mmask8 __U, void const* __P) {
-  // CHECK-LABEL: @test_mm128_mask_expandloadu_epi16
+__m128i test_mm_mask_expandloadu_epi16(__m128i __S, __mmask8 __U, void const* __P) {
+  // CHECK-LABEL: @test_mm_mask_expandloadu_epi16
   // CHECK: @llvm.x86.avx512.mask.expand.load.w.128
-  return _mm128_mask_expandloadu_epi16(__S, __U, __P);
+  return _mm_mask_expandloadu_epi16(__S, __U, __P);
 }
 
-__m128i test_mm128_maskz_expandloadu_epi16(__mmask8 __U, void const* __P) {
-  // CHECK-LABEL: @test_mm128_maskz_expandloadu_epi16
+__m128i test_mm_maskz_expandloadu_epi16(__mmask8 __U, void const* __P) {
+  // CHECK-LABEL: @test_mm_maskz_expandloadu_epi16
   // CHECK: @llvm.x86.avx512.mask.expand.load.w.128
-  return _mm128_maskz_expandloadu_epi16(__U, __P);
+  return _mm_maskz_expandloadu_epi16(__U, __P);
 }
 
-__m128i test_mm128_mask_expandloadu_epi8(__m128i __S, __mmask16 __U, void const* __P) {
-  // CHECK-LABEL: @test_mm128_mask_expandloadu_epi8
+__m128i test_mm_mask_expandloadu_epi8(__m128i __S, __mmask16 __U, void const* __P) {
+  // CHECK-LABEL: @test_mm_mask_expandloadu_epi8
   // CHECK: @llvm.x86.avx512.mask.expand.load.b.128
-  return _mm128_mask_expandloadu_epi8(__S, __U, __P);
+  return _mm_mask_expandloadu_epi8(__S, __U, __P);
 }
 
-__m128i test_mm128_maskz_expandloadu_epi8(__mmask16 __U, void const* __P) {
-  // CHECK-LABEL: @test_mm128_maskz_expandloadu_epi8
+__m128i test_mm_maskz_expandloadu_epi8(__mmask16 __U, void const* __P) {
+  // CHECK-LABEL: @test_mm_maskz_expandloadu_epi8
   // CHECK: @llvm.x86.avx512.mask.expand.load.b.128
-  return _mm128_maskz_expandloadu_epi8(__U, __P);
+  return _mm_maskz_expandloadu_epi8(__U, __P);
 }
 
 __m256i test_mm256_mask_compress_epi16(__m256i __S, __mmask16 __U, __m256i __D) {
@@ -188,22 +188,22 @@ __m256i test_mm256_shldi_epi64(__m256i __A, __m256i __B) {
   return _mm256_shldi_epi64(__A, __B, 31);
 }
 
-__m128i test_mm128_mask_shldi_epi64(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_mask_shldi_epi64
+__m128i test_mm_mask_shldi_epi64(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_mask_shldi_epi64
   // CHECK: @llvm.x86.avx512.mask.vpshld.q.128
-  return _mm128_mask_shldi_epi64(__S, __U, __A, __B, 127);
+  return _mm_mask_shldi_epi64(__S, __U, __A, __B, 127);
 }
 
-__m128i test_mm128_maskz_shldi_epi64(__mmask8 __U, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_maskz_shldi_epi64
+__m128i test_mm_maskz_shldi_epi64(__mmask8 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_maskz_shldi_epi64
   // CHECK: @llvm.x86.avx512.mask.vpshld.q.128
-  return _mm128_maskz_shldi_epi64(__U, __A, __B, 63);
+  return _mm_maskz_shldi_epi64(__U, __A, __B, 63);
 }
 
-__m128i test_mm128_shldi_epi64(__m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_shldi_epi64
+__m128i test_mm_shldi_epi64(__m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_shldi_epi64
   // CHECK: @llvm.x86.avx512.mask.vpshld.q.128
-  return _mm128_shldi_epi64(__A, __B, 31);
+  return _mm_shldi_epi64(__A, __B, 31);
 }
 
 __m256i test_mm256_mask_shldi_epi32(__m256i __S, __mmask8 __U, __m256i __A, __m256i __B) {
@@ -224,22 +224,22 @@ __m256i test_mm256_shldi_epi32(__m256i __A, __m256i __B) {
   return _mm256_shldi_epi32(__A, __B, 31);
 }
 
-__m128i test_mm128_mask_shldi_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_mask_shldi_epi32
+__m128i test_mm_mask_shldi_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_mask_shldi_epi32
   // CHECK: @llvm.x86.avx512.mask.vpshld.d.128
-  return _mm128_mask_shldi_epi32(__S, __U, __A, __B, 127);
+  return _mm_mask_shldi_epi32(__S, __U, __A, __B, 127);
 }
 
-__m128i test_mm128_maskz_shldi_epi32(__mmask8 __U, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_maskz_shldi_epi32
+__m128i test_mm_maskz_shldi_epi32(__mmask8 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_maskz_shldi_epi32
   // CHECK: @llvm.x86.avx512.mask.vpshld.d.128
-  return _mm128_maskz_shldi_epi32(__U, __A, __B, 63);
+  return _mm_maskz_shldi_epi32(__U, __A, __B, 63);
 }
 
-__m128i test_mm128_shldi_epi32(__m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_shldi_epi32
+__m128i test_mm_shldi_epi32(__m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_shldi_epi32
   // CHECK: @llvm.x86.avx512.mask.vpshld.d.128
-  return _mm128_shldi_epi32(__A, __B, 31);
+  return _mm_shldi_epi32(__A, __B, 31);
 }
 
 __m256i test_mm256_mask_shldi_epi16(__m256i __S, __mmask16 __U, __m256i __A, __m256i __B) {
@@ -260,22 +260,22 @@ __m256i test_mm256_shldi_epi16(__m256i __A, __m256i __B) {
   return _mm256_shldi_epi16(__A, __B, 31);
 }
 
-__m128i test_mm128_mask_shldi_epi16(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_mask_shldi_epi16
+__m128i test_mm_mask_shldi_epi16(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_mask_shldi_epi16
   // CHECK: @llvm.x86.avx512.mask.vpshld.w.128
-  return _mm128_mask_shldi_epi16(__S, __U, __A, __B, 127);
+  return _mm_mask_shldi_epi16(__S, __U, __A, __B, 127);
 }
 
-__m128i test_mm128_maskz_shldi_epi16(__mmask8 __U, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_maskz_shldi_epi16
+__m128i test_mm_maskz_shldi_epi16(__mmask8 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_maskz_shldi_epi16
   // CHECK: @llvm.x86.avx512.mask.vpshld.w.128
-  return _mm128_maskz_shldi_epi16(__U, __A, __B, 63);
+  return _mm_maskz_shldi_epi16(__U, __A, __B, 63);
 }
 
-__m128i test_mm128_shldi_epi16(__m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_shldi_epi16
+__m128i test_mm_shldi_epi16(__m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_shldi_epi16
   // CHECK: @llvm.x86.avx512.mask.vpshld.w.128
-  return _mm128_shldi_epi16(__A, __B, 31);
+  return _mm_shldi_epi16(__A, __B, 31);
 }
 
 __m256i test_mm256_mask_shrdi_epi64(__m256i __S, __mmask8 __U, __m256i __A, __m256i __B) {
@@ -296,22 +296,22 @@ __m256i test_mm256_shrdi_epi64(__m256i __A, __m256i __B) {
   return _mm256_shrdi_epi64(__A, __B, 31);
 }
 
-__m128i test_mm128_mask_shrdi_epi64(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_mask_shrdi_epi64
+__m128i test_mm_mask_shrdi_epi64(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_mask_shrdi_epi64
   // CHECK: @llvm.x86.avx512.mask.vpshrd.q.128
-  return _mm128_mask_shrdi_epi64(__S, __U, __A, __B, 127);
+  return _mm_mask_shrdi_epi64(__S, __U, __A, __B, 127);
 }
 
-__m128i test_mm128_maskz_shrdi_epi64(__mmask8 __U, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_maskz_shrdi_epi64
+__m128i test_mm_maskz_shrdi_epi64(__mmask8 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_maskz_shrdi_epi64
   // CHECK: @llvm.x86.avx512.mask.vpshrd.q.128
-  return _mm128_maskz_shrdi_epi64(__U, __A, __B, 63);
+  return _mm_maskz_shrdi_epi64(__U, __A, __B, 63);
 }
 
-__m128i test_mm128_shrdi_epi64(__m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_shrdi_epi64
+__m128i test_mm_shrdi_epi64(__m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_shrdi_epi64
   // CHECK: @llvm.x86.avx512.mask.vpshrd.q.128
-  return _mm128_shrdi_epi64(__A, __B, 31);
+  return _mm_shrdi_epi64(__A, __B, 31);
 }
 
 __m256i test_mm256_mask_shrdi_epi32(__m256i __S, __mmask8 __U, __m256i __A, __m256i __B) {
@@ -332,22 +332,22 @@ __m256i test_mm256_shrdi_epi32(__m256i __A, __m256i __B) {
   return _mm256_shrdi_epi32(__A, __B, 31);
 }
 
-__m128i test_mm128_mask_shrdi_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_mask_shrdi_epi32
+__m128i test_mm_mask_shrdi_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_mask_shrdi_epi32
   // CHECK: @llvm.x86.avx512.mask.vpshrd.d.128
-  return _mm128_mask_shrdi_epi32(__S, __U, __A, __B, 127);
+  return _mm_mask_shrdi_epi32(__S, __U, __A, __B, 127);
 }
 
-__m128i test_mm128_maskz_shrdi_epi32(__mmask8 __U, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_maskz_shrdi_epi32
+__m128i test_mm_maskz_shrdi_epi32(__mmask8 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_maskz_shrdi_epi32
   // CHECK: @llvm.x86.avx512.mask.vpshrd.d.128
-  return _mm128_maskz_shrdi_epi32(__U, __A, __B, 63);
+  return _mm_maskz_shrdi_epi32(__U, __A, __B, 63);
 }
 
-__m128i test_mm128_shrdi_epi32(__m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_shrdi_epi32
+__m128i test_mm_shrdi_epi32(__m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_shrdi_epi32
   // CHECK: @llvm.x86.avx512.mask.vpshrd.d.128
-  return _mm128_shrdi_epi32(__A, __B, 31);
+  return _mm_shrdi_epi32(__A, __B, 31);
 }
 
 __m256i test_mm256_mask_shrdi_epi16(__m256i __S, __mmask16 __U, __m256i __A, __m256i __B) {
@@ -368,22 +368,22 @@ __m256i test_mm256_shrdi_epi16(__m256i __A, __m256i __B) {
   return _mm256_shrdi_epi16(__A, __B, 31);
 }
 
-__m128i test_mm128_mask_shrdi_epi16(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_mask_shrdi_epi16
+__m128i test_mm_mask_shrdi_epi16(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_mask_shrdi_epi16
   // CHECK: @llvm.x86.avx512.mask.vpshrd.w.128
-  return _mm128_mask_shrdi_epi16(__S, __U, __A, __B, 127);
+  return _mm_mask_shrdi_epi16(__S, __U, __A, __B, 127);
 }
 
-__m128i test_mm128_maskz_shrdi_epi16(__mmask8 __U, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_maskz_shrdi_epi16
+__m128i test_mm_maskz_shrdi_epi16(__mmask8 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_maskz_shrdi_epi16
   // CHECK: @llvm.x86.avx512.mask.vpshrd.w.128
-  return _mm128_maskz_shrdi_epi16(__U, __A, __B, 63);
+  return _mm_maskz_shrdi_epi16(__U, __A, __B, 63);
 }
 
-__m128i test_mm128_shrdi_epi16(__m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_shrdi_epi16
+__m128i test_mm_shrdi_epi16(__m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_shrdi_epi16
   // CHECK: @llvm.x86.avx512.mask.vpshrd.w.128
-  return _mm128_shrdi_epi16(__A, __B, 31);
+  return _mm_shrdi_epi16(__A, __B, 31);
 }
 
 __m256i test_mm256_mask_shldv_epi64(__m256i __S, __mmask8 __U, __m256i __A, __m256i __B) {
@@ -404,22 +404,22 @@ __m256i test_mm256_shldv_epi64(__m256i __S, __m256i __A, __m256i __B) {
   return _mm256_shldv_epi64(__S, __A, __B);
 }
 
-__m128i test_mm128_mask_shldv_epi64(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_mask_shldv_epi64
+__m128i test_mm_mask_shldv_epi64(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_mask_shldv_epi64
   // CHECK: @llvm.x86.avx512.mask.vpshldv.q.128
-  return _mm128_mask_shldv_epi64(__S, __U, __A, __B);
+  return _mm_mask_shldv_epi64(__S, __U, __A, __B);
 }
 
-__m128i test_mm128_maskz_shldv_epi64(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_maskz_shldv_epi64
+__m128i test_mm_maskz_shldv_epi64(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_maskz_shldv_epi64
   // CHECK: @llvm.x86.avx512.maskz.vpshldv.q.128
-  return _mm128_maskz_shldv_epi64(__U, __S, __A, __B);
+  return _mm_maskz_shldv_epi64(__U, __S, __A, __B);
 }
 
-__m128i test_mm128_shldv_epi64(__m128i __S, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_shldv_epi64
+__m128i test_mm_shldv_epi64(__m128i __S, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_shldv_epi64
   // CHECK: @llvm.x86.avx512.mask.vpshldv.q.128
-  return _mm128_shldv_epi64(__S, __A, __B);
+  return _mm_shldv_epi64(__S, __A, __B);
 }
 
 __m256i test_mm256_mask_shldv_epi32(__m256i __S, __mmask8 __U, __m256i __A, __m256i __B) {
@@ -440,22 +440,22 @@ __m256i test_mm256_shldv_epi32(__m256i __S, __m256i __A, __m256i __B) {
   return _mm256_shldv_epi32(__S, __A, __B);
 }
 
-__m128i test_mm128_mask_shldv_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_mask_shldv_epi32
+__m128i test_mm_mask_shldv_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_mask_shldv_epi32
   // CHECK: @llvm.x86.avx512.mask.vpshldv.d.128
-  return _mm128_mask_shldv_epi32(__S, __U, __A, __B);
+  return _mm_mask_shldv_epi32(__S, __U, __A, __B);
 }
 
-__m128i test_mm128_maskz_shldv_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_maskz_shldv_epi32
+__m128i test_mm_maskz_shldv_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_maskz_shldv_epi32
   // CHECK: @llvm.x86.avx512.maskz.vpshldv.d.128
-  return _mm128_maskz_shldv_epi32(__U, __S, __A, __B);
+  return _mm_maskz_shldv_epi32(__U, __S, __A, __B);
 }
 
-__m128i test_mm128_shldv_epi32(__m128i __S, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_shldv_epi32
+__m128i test_mm_shldv_epi32(__m128i __S, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_shldv_epi32
   // CHECK: @llvm.x86.avx512.mask.vpshldv.d.128
-  return _mm128_shldv_epi32(__S, __A, __B);
+  return _mm_shldv_epi32(__S, __A, __B);
 }
 
 __m256i test_mm256_mask_shldv_epi16(__m256i __S, __mmask16 __U, __m256i __A, __m256i __B) {
@@ -476,22 +476,22 @@ __m256i test_mm256_shldv_epi16(__m256i __S, __m256i __A, __m256i __B) {
   return _mm256_shldv_epi16(__S, __A, __B);
 }
 
-__m128i test_mm128_mask_shldv_epi16(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_mask_shldv_epi16
+__m128i test_mm_mask_shldv_epi16(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_mask_shldv_epi16
   // CHECK: @llvm.x86.avx512.mask.vpshldv.w.128
-  return _mm128_mask_shldv_epi16(__S, __U, __A, __B);
+  return _mm_mask_shldv_epi16(__S, __U, __A, __B);
 }
 
-__m128i test_mm128_maskz_shldv_epi16(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_maskz_shldv_epi16
+__m128i test_mm_maskz_shldv_epi16(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_maskz_shldv_epi16
   // CHECK: @llvm.x86.avx512.maskz.vpshldv.w.128
-  return _mm128_maskz_shldv_epi16(__U, __S, __A, __B);
+  return _mm_maskz_shldv_epi16(__U, __S, __A, __B);
 }
 
-__m128i test_mm128_shldv_epi16(__m128i __S, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_shldv_epi16
+__m128i test_mm_shldv_epi16(__m128i __S, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_shldv_epi16
   // CHECK: @llvm.x86.avx512.mask.vpshldv.w.128
-  return _mm128_shldv_epi16(__S, __A, __B);
+  return _mm_shldv_epi16(__S, __A, __B);
 }
 
 __m256i test_mm256_mask_shrdv_epi64(__m256i __S, __mmask8 __U, __m256i __A, __m256i __B) {
@@ -512,22 +512,22 @@ __m256i test_mm256_shrdv_epi64(__m256i __S, __m256i __A, __m256i __B) {
   return _mm256_shrdv_epi64(__S, __A, __B);
 }
 
-__m128i test_mm128_mask_shrdv_epi64(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_mask_shrdv_epi64
+__m128i test_mm_mask_shrdv_epi64(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_mask_shrdv_epi64
   // CHECK: @llvm.x86.avx512.mask.vpshrdv.q.128
-  return _mm128_mask_shrdv_epi64(__S, __U, __A, __B);
+  return _mm_mask_shrdv_epi64(__S, __U, __A, __B);
 }
 
-__m128i test_mm128_maskz_shrdv_epi64(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_maskz_shrdv_epi64
+__m128i test_mm_maskz_shrdv_epi64(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_maskz_shrdv_epi64
   // CHECK: @llvm.x86.avx512.maskz.vpshrdv.q.128
-  return _mm128_maskz_shrdv_epi64(__U, __S, __A, __B);
+  return _mm_maskz_shrdv_epi64(__U, __S, __A, __B);
 }
 
-__m128i test_mm128_shrdv_epi64(__m128i __S, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_shrdv_epi64
+__m128i test_mm_shrdv_epi64(__m128i __S, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_shrdv_epi64
   // CHECK: @llvm.x86.avx512.mask.vpshrdv.q.128
-  return _mm128_shrdv_epi64(__S, __A, __B);
+  return _mm_shrdv_epi64(__S, __A, __B);
 }
 
 __m256i test_mm256_mask_shrdv_epi32(__m256i __S, __mmask8 __U, __m256i __A, __m256i __B) {
@@ -548,22 +548,22 @@ __m256i test_mm256_shrdv_epi32(__m256i __S, __m256i __A, __m256i __B) {
   return _mm256_shrdv_epi32(__S, __A, __B);
 }
 
-__m128i test_mm128_mask_shrdv_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_mask_shrdv_epi32
+__m128i test_mm_mask_shrdv_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_mask_shrdv_epi32
   // CHECK: @llvm.x86.avx512.mask.vpshrdv.d.128
-  return _mm128_mask_shrdv_epi32(__S, __U, __A, __B);
+  return _mm_mask_shrdv_epi32(__S, __U, __A, __B);
 }
 
-__m128i test_mm128_maskz_shrdv_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_maskz_shrdv_epi32
+__m128i test_mm_maskz_shrdv_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_maskz_shrdv_epi32
   // CHECK: @llvm.x86.avx512.maskz.vpshrdv.d.128
-  return _mm128_maskz_shrdv_epi32(__U, __S, __A, __B);
+  return _mm_maskz_shrdv_epi32(__U, __S, __A, __B);
 }
 
-__m128i test_mm128_shrdv_epi32(__m128i __S, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_shrdv_epi32
+__m128i test_mm_shrdv_epi32(__m128i __S, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_shrdv_epi32
   // CHECK: @llvm.x86.avx512.mask.vpshrdv.d.128
-  return _mm128_shrdv_epi32(__S, __A, __B);
+  return _mm_shrdv_epi32(__S, __A, __B);
 }
 
 __m256i test_mm256_mask_shrdv_epi16(__m256i __S, __mmask16 __U, __m256i __A, __m256i __B) {
@@ -584,21 +584,21 @@ __m256i test_mm256_shrdv_epi16(__m256i __S, __m256i __A, __m256i __B) {
   return _mm256_shrdv_epi16(__S, __A, __B);
 }
 
-__m128i test_mm128_mask_shrdv_epi16(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_mask_shrdv_epi16
+__m128i test_mm_mask_shrdv_epi16(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_mask_shrdv_epi16
   // CHECK: @llvm.x86.avx512.mask.vpshrdv.w.128
-  return _mm128_mask_shrdv_epi16(__S, __U, __A, __B);
+  return _mm_mask_shrdv_epi16(__S, __U, __A, __B);
 }
 
-__m128i test_mm128_maskz_shrdv_epi16(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_maskz_shrdv_epi16
+__m128i test_mm_maskz_shrdv_epi16(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_maskz_shrdv_epi16
   // CHECK: @llvm.x86.avx512.maskz.vpshrdv.w.128
-  return _mm128_maskz_shrdv_epi16(__U, __S, __A, __B);
+  return _mm_maskz_shrdv_epi16(__U, __S, __A, __B);
 }
 
-__m128i test_mm128_shrdv_epi16(__m128i __S, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_shrdv_epi16
+__m128i test_mm_shrdv_epi16(__m128i __S, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_shrdv_epi16
   // CHECK: @llvm.x86.avx512.mask.vpshrdv.w.128
-  return _mm128_shrdv_epi16(__S, __A, __B);
+  return _mm_shrdv_epi16(__S, __A, __B);
 }
 
diff --git a/test/CodeGen/avx512vlvnni-builtins.c b/test/CodeGen/avx512vlvnni-builtins.c
index 861b915fdb29..f6265f4189f9 100644
--- a/test/CodeGen/avx512vlvnni-builtins.c
+++ b/test/CodeGen/avx512vlvnni-builtins.c
@@ -74,75 +74,75 @@ __m256i test_mm256_dpwssds_epi32(__m256i __S, __m256i __A, __m256i __B) {
   return _mm256_dpwssds_epi32(__S, __A, __B);
 }
 
-__m128i test_mm128_mask_dpbusd_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_mask_dpbusd_epi32
+__m128i test_mm_mask_dpbusd_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_mask_dpbusd_epi32
   // CHECK: @llvm.x86.avx512.mask.vpdpbusd.128
-  return _mm128_mask_dpbusd_epi32(__S, __U, __A, __B);
+  return _mm_mask_dpbusd_epi32(__S, __U, __A, __B);
 }
 
-__m128i test_mm128_maskz_dpbusd_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_maskz_dpbusd_epi32
+__m128i test_mm_maskz_dpbusd_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_maskz_dpbusd_epi32
   // CHECK: @llvm.x86.avx512.maskz.vpdpbusd.128
-  return _mm128_maskz_dpbusd_epi32(__U, __S, __A, __B);
+  return _mm_maskz_dpbusd_epi32(__U, __S, __A, __B);
 }
 
-__m128i test_mm128_dpbusd_epi32(__m128i __S, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_dpbusd_epi32
+__m128i test_mm_dpbusd_epi32(__m128i __S, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_dpbusd_epi32
   // CHECK: @llvm.x86.avx512.mask.vpdpbusd.128
-  return _mm128_dpbusd_epi32(__S, __A, __B);
+  return _mm_dpbusd_epi32(__S, __A, __B);
 }
 
-__m128i test_mm128_mask_dpbusds_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_mask_dpbusds_epi32
+__m128i test_mm_mask_dpbusds_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_mask_dpbusds_epi32
   // CHECK: @llvm.x86.avx512.mask.vpdpbusds.128
-  return _mm128_mask_dpbusds_epi32(__S, __U, __A, __B);
+  return _mm_mask_dpbusds_epi32(__S, __U, __A, __B);
 }
 
-__m128i test_mm128_maskz_dpbusds_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_maskz_dpbusds_epi32
+__m128i test_mm_maskz_dpbusds_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_maskz_dpbusds_epi32
   // CHECK: @llvm.x86.avx512.maskz.vpdpbusds.128
-  return _mm128_maskz_dpbusds_epi32(__U, __S, __A, __B);
+  return _mm_maskz_dpbusds_epi32(__U, __S, __A, __B);
 }
 
-__m128i test_mm128_dpbusds_epi32(__m128i __S, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_dpbusds_epi32
+__m128i test_mm_dpbusds_epi32(__m128i __S, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_dpbusds_epi32
   // CHECK: @llvm.x86.avx512.mask.vpdpbusds.128
-  return _mm128_dpbusds_epi32(__S, __A, __B);
+  return _mm_dpbusds_epi32(__S, __A, __B);
 }
 
-__m128i test_mm128_mask_dpwssd_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_mask_dpwssd_epi32
+__m128i test_mm_mask_dpwssd_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_mask_dpwssd_epi32
   // CHECK: @llvm.x86.avx512.mask.vpdpwssd.128
-  return _mm128_mask_dpwssd_epi32(__S, __U, __A, __B);
+  return _mm_mask_dpwssd_epi32(__S, __U, __A, __B);
 }
 
-__m128i test_mm128_maskz_dpwssd_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_maskz_dpwssd_epi32
+__m128i test_mm_maskz_dpwssd_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_maskz_dpwssd_epi32
   // CHECK: @llvm.x86.avx512.maskz.vpdpwssd.128
-  return _mm128_maskz_dpwssd_epi32(__U, __S, __A, __B);
+  return _mm_maskz_dpwssd_epi32(__U, __S, __A, __B);
 }
 
-__m128i test_mm128_dpwssd_epi32(__m128i __S, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_dpwssd_epi32
+__m128i test_mm_dpwssd_epi32(__m128i __S, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_dpwssd_epi32
   // CHECK: @llvm.x86.avx512.mask.vpdpwssd.128
-  return _mm128_dpwssd_epi32(__S, __A, __B);
+  return _mm_dpwssd_epi32(__S, __A, __B);
 }
 
-__m128i test_mm128_mask_dpwssds_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_mask_dpwssds_epi32
+__m128i test_mm_mask_dpwssds_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_mask_dpwssds_epi32
   // CHECK: @llvm.x86.avx512.mask.vpdpwssds.128
-  return _mm128_mask_dpwssds_epi32(__S, __U, __A, __B);
+  return _mm_mask_dpwssds_epi32(__S, __U, __A, __B);
 }
 
-__m128i test_mm128_maskz_dpwssds_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_maskz_dpwssds_epi32
+__m128i test_mm_maskz_dpwssds_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_maskz_dpwssds_epi32
   // CHECK: @llvm.x86.avx512.maskz.vpdpwssds.128
-  return _mm128_maskz_dpwssds_epi32(__U, __S, __A, __B);
+  return _mm_maskz_dpwssds_epi32(__U, __S, __A, __B);
 }
 
-__m128i test_mm128_dpwssds_epi32(__m128i __S, __m128i __A, __m128i __B) {
-  // CHECK-LABEL: @test_mm128_dpwssds_epi32
+__m128i test_mm_dpwssds_epi32(__m128i __S, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_dpwssds_epi32
   // CHECK: @llvm.x86.avx512.mask.vpdpwssds.128
-  return _mm128_dpwssds_epi32(__S, __A, __B);
+  return _mm_dpwssds_epi32(__S, __A, __B);
 }
 
diff --git a/test/CodeGen/decl.c b/test/CodeGen/decl.c
index 2065e3364bcd..2734ea7c5910 100644
--- a/test/CodeGen/decl.c
+++ b/test/CodeGen/decl.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -w -emit-llvm < %s | FileCheck %s
+// RUN: %clang_cc1 -w -fmerge-all-constants -emit-llvm < %s | FileCheck %s
 
 // CHECK: @test1.x = internal constant [12 x i32] [i32 1
 // CHECK: @test2.x = private unnamed_addr constant [13 x i32] [i32 1,
diff --git a/test/CodeGen/function-attributes.c b/test/CodeGen/function-attributes.c
index e14397440100..9174b8785d9e 100644
--- a/test/CodeGen/function-attributes.c
+++ b/test/CodeGen/function-attributes.c
@@ -71,7 +71,7 @@ void f15(void) {
 
 // PR5254
 // CHECK-LABEL: define void @f16
-// CHECK: [[ALIGN:#[0-9]+]]
+// CHECK: [[SR:#[0-9]+]]
 // CHECK: {
 void __attribute__((force_align_arg_pointer)) f16(void) {
 }
@@ -112,7 +112,7 @@ void f20(void) {
 // CHECK: attributes [[NUW]] = { nounwind optsize{{.*}} }
 // CHECK: attributes [[AI]] = { alwaysinline nounwind optsize{{.*}} }
 // CHECK: attributes [[NUW_OS_RN]] = { nounwind optsize readnone{{.*}} }
-// CHECK: attributes [[ALIGN]] = { nounwind optsize alignstack=16{{.*}} }
+// CHECK: attributes [[SR]] = { nounwind optsize{{.*}} "stackrealign"{{.*}} }
 // CHECK: attributes [[RT]] = { nounwind optsize returns_twice{{.*}} }
 // CHECK: attributes [[NR]] = { noreturn optsize }
 // CHECK: attributes [[NUW_RN]] = { nounwind optsize readnone }
diff --git a/test/CodeGen/mingw-long-double.c b/test/CodeGen/mingw-long-double.c
index 1c7c31f88be3..166f7decfc3a 100644
--- a/test/CodeGen/mingw-long-double.c
+++ b/test/CodeGen/mingw-long-double.c
@@ -1,5 +1,7 @@
 // RUN: %clang_cc1 -triple i686-windows-gnu -emit-llvm -o - %s \
 // RUN:    | FileCheck %s --check-prefix=GNU32
+// RUN: %clang_cc1 -triple i686-windows-gnu -emit-llvm -o - %s -mms-bitfields \
+// RUN:    | FileCheck %s --check-prefix=GNU32
 // RUN: %clang_cc1 -triple x86_64-windows-gnu -emit-llvm -o - %s \
 // RUN:    | FileCheck %s --check-prefix=GNU64
 // RUN: %clang_cc1 -triple x86_64-windows-msvc -emit-llvm -o - %s \
diff --git a/test/CodeGen/ms_struct-long-double.c b/test/CodeGen/ms_struct-long-double.c
new file mode 100644
index 000000000000..9b3ea7947a03
--- /dev/null
+++ b/test/CodeGen/ms_struct-long-double.c
@@ -0,0 +1,17 @@
+// RUN: %clang_cc1 -emit-llvm-only -triple i686-windows-gnu -fdump-record-layouts %s | FileCheck %s
+// RUN: %clang_cc1 -emit-llvm-only -triple i686-linux -fdump-record-layouts -Wno-incompatible-ms-struct %s | FileCheck %s
+// RUN: not %clang_cc1 -emit-llvm-only -triple i686-linux -fdump-record-layouts %s 2>&1 | FileCheck %s -check-prefix=ERROR
+
+struct ldb_struct {
+  char c;
+  long double ldb;
+} __attribute__((__ms_struct__));
+
+struct ldb_struct a;
+
+// CHECK:             0 | struct ldb_struct
+// CHECK-NEXT:        0 |   char c
+// CHECK-NEXT:        4 |   long double ldb
+// CHECK-NEXT:          | [sizeof=16, align=4]
+
+// ERROR: error: ms_struct may not produce Microsoft-compatible layouts with fundamental data types with sizes that aren't a power of two
diff --git a/test/CodeGenCXX/const-init-cxx11.cpp b/test/CodeGenCXX/const-init-cxx11.cpp
index c4962bc08ad6..801d7b1e19cc 100644
--- a/test/CodeGenCXX/const-init-cxx11.cpp
+++ b/test/CodeGenCXX/const-init-cxx11.cpp
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -w -triple x86_64-elf-gnu -emit-llvm -o - %s -std=c++11 | FileCheck %s
+// RUN: %clang_cc1 -w -fmerge-all-constants -triple x86_64-elf-gnu -emit-llvm -o - %s -std=c++11 | FileCheck %s
 
 // FIXME: The padding in all these objects should be zero-initialized.
 namespace StructUnion {
diff --git a/test/CodeGenCXX/cxx0x-initializer-references.cpp b/test/CodeGenCXX/cxx0x-initializer-references.cpp
index 318c8ea0d770..595d27ca2e83 100644
--- a/test/CodeGenCXX/cxx0x-initializer-references.cpp
+++ b/test/CodeGenCXX/cxx0x-initializer-references.cpp
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -std=c++11 -S -triple armv7-none-eabi -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -std=c++11 -S -triple armv7-none-eabi -fmerge-all-constants -emit-llvm -o - %s | FileCheck %s
 
 namespace reference {
   struct A {
diff --git a/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp b/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp
index 67215ef48fb3..44b188568708 100644
--- a/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp
+++ b/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp
@@ -1,5 +1,5 @@
-// RUN: %clang_cc1 -std=c++11 -triple x86_64-none-linux-gnu -emit-llvm -o - %s | FileCheck -check-prefixes=X86,CHECK %s
-// RUN: %clang_cc1 -std=c++11 -triple amdgcn-amd-amdhsa-amdgiz -DNO_TLS -emit-llvm -o - %s | FileCheck -check-prefixes=AMD,CHECK %s
+// RUN: %clang_cc1 -std=c++11 -triple x86_64-none-linux-gnu -fmerge-all-constants -emit-llvm -o - %s | FileCheck -check-prefixes=X86,CHECK %s
+// RUN: %clang_cc1 -std=c++11 -triple amdgcn-amd-amdhsa-amdgiz -DNO_TLS -fmerge-all-constants -emit-llvm -o - %s | FileCheck -check-prefixes=AMD,CHECK %s
 
 namespace std {
   typedef decltype(sizeof(int)) size_t;
diff --git a/test/CodeGenObjCXX/arc-cxx11-init-list.mm b/test/CodeGenObjCXX/arc-cxx11-init-list.mm
index c3723c619ab0..af607654e159 100644
--- a/test/CodeGenObjCXX/arc-cxx11-init-list.mm
+++ b/test/CodeGenObjCXX/arc-cxx11-init-list.mm
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -triple armv7-ios5.0 -std=c++11 -fobjc-arc -Os -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple armv7-ios5.0 -std=c++11 -fmerge-all-constants -fobjc-arc -Os -emit-llvm -o - %s | FileCheck %s
 
 // CHECK: @[[STR0:.*]] = private unnamed_addr constant [5 x i8] c"str0\00", section "__TEXT,__cstring,cstring_literals"
 // CHECK: @[[UNNAMED_CFSTRING0:.*]] = private global %struct.__NSConstantString_tag { i32* getelementptr inbounds ([0 x i32], [0 x i32]* @__CFConstantStringClassReference, i32 0, i32 0), i32 1992, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @[[STR0]], i32 0, i32 0), i32 4 }, section "__DATA,__cfstring"
diff --git a/test/Driver/Inputs/empty.cfg b/test/Driver/Inputs/empty.cfg
new file mode 100644
index 000000000000..e69de29bb2d1
--- /dev/null
+++ b/test/Driver/Inputs/empty.cfg
diff --git a/test/Driver/clang_f_opts.c b/test/Driver/clang_f_opts.c
index b22f74fb5557..e044893d3e6c 100644
--- a/test/Driver/clang_f_opts.c
+++ b/test/Driver/clang_f_opts.c
@@ -276,6 +276,7 @@
 // RUN:     -fno-inline-small-functions -finline-small-functions              \
 // RUN:     -fno-fat-lto-objects -ffat-lto-objects                            \
 // RUN:     -fno-merge-constants -fmerge-constants                            \
+// RUN:     -fno-merge-all-constants -fmerge-all-constants                    \
 // RUN:     -fno-caller-saves -fcaller-saves                                  \
 // RUN:     -fno-reorder-blocks -freorder-blocks                              \
 // RUN:     -fno-schedule-insns2 -fschedule-insns2                            \
@@ -503,3 +504,9 @@
 // CHECK-WINDOWS-ISO10646: "-fwchar-type=int"
 // CHECK-WINDOWS-ISO10646: "-fsigned-wchar"
 
+// RUN: %clang -### -S -fmerge-all-constants %s 2>&1 | FileCheck -check-prefix=CHECK-MERGE-ALL-CONSTANTS %s
+// RUN: %clang -### -S -fno-merge-all-constants %s 2>&1 | FileCheck -check-prefix=CHECK-NO-MERGE-ALL-CONSTANTS %s
+// RUN: %clang -### -S -fmerge-all-constants -fno-merge-all-constants %s 2>&1 | FileCheck -check-prefix=CHECK-NO-MERGE-ALL-CONSTANTS %s
+// RUN: %clang -### -S -fno-merge-all-constants -fmerge-all-constants %s 2>&1 | FileCheck -check-prefix=CHECK-MERGE-ALL-CONSTANTS %s
+// CHECK-NO-MERGE-ALL-CONSTANTS-NOT: "-fmerge-all-constants"
+// CHECK-MERGE-ALL-CONSTANTS: "-fmerge-all-constants"
diff --git a/test/Driver/config-file4.c b/test/Driver/config-file4.c
new file mode 100644
index 000000000000..9231ab64e157
--- /dev/null
+++ b/test/Driver/config-file4.c
@@ -0,0 +1,2 @@
+// RUN: %clang --config %S/Inputs/empty.cfg -Wall -Wextra -Wformat -Wstrict-aliasing -Wshadow -Wpacked -Winline -Wimplicit-function-declaration -c %s -O2 -o /dev/null -v 2>&1 | FileCheck %s -check-prefix PR37196
+// PR37196: Configuration file: {{.*}}empty.cfg
diff --git a/test/Driver/mingw-libgcc.c b/test/Driver/mingw-libgcc.c
index 1d45c91651de..bfe2360ed4e6 100644
--- a/test/Driver/mingw-libgcc.c
+++ b/test/Driver/mingw-libgcc.c
@@ -2,11 +2,11 @@
 // Verified with gcc version 5.1.0 (i686-posix-dwarf-rev0, Built by MinGW-W64 project).
 
 // gcc, static
-// RUN: %clang -v -target i686-pc-windows-gnu -rtlib=platform -### %s 2>&1 | FileCheck -check-prefix=CHECK_STATIC %s
-// RUN: %clang -static -v -target i686-pc-windows-gnu -rtlib=platform -### %s 2>&1 | FileCheck -check-prefix=CHECK_STATIC %s
-// RUN: %clang -static-libgcc -v -target i686-pc-windows-gnu -rtlib=platform -### %s 2>&1 | FileCheck -check-prefix=CHECK_STATIC %s
-// RUN: %clang -static -shared -v -target i686-pc-windows-gnu -rtlib=platform -### %s 2>&1 | FileCheck -check-prefix=CHECK_STATIC %s
-// RUN: %clang -static-libgcc -shared -v -target i686-pc-windows-gnu -rtlib=platform -### %s 2>&1 | FileCheck -check-prefix=CHECK_STATIC %s
+// RUN: %clang -v -target i686-pc-windows-gnu -rtlib=platform -### %s 2>&1 | FileCheck -check-prefixes=CHECK_STATIC,CHECK_BDYNAMIC %s
+// RUN: %clang -static -v -target i686-pc-windows-gnu -rtlib=platform -### %s 2>&1 | FileCheck -check-prefixes=CHECK_STATIC,CHECK_BSTATIC %s
+// RUN: %clang -static-libgcc -v -target i686-pc-windows-gnu -rtlib=platform -### %s 2>&1 | FileCheck -check-prefixes=CHECK_STATIC,CHECK_BDYNAMIC %s
+// RUN: %clang -static -shared -v -target i686-pc-windows-gnu -rtlib=platform -### %s 2>&1 | FileCheck -check-prefixes=CHECK_STATIC,CHECK_SHARED,CHECK_BSTATIC %s
+// RUN: %clang -static-libgcc -shared -v -target i686-pc-windows-gnu -rtlib=platform -### %s 2>&1 | FileCheck -check-prefixes=CHECK_STATIC,CHECK_SHARED,CHECK_BDYNAMIC %s
 
 // gcc, dynamic
 // RUN: %clang -shared -v -target i686-pc-windows-gnu -rtlib=platform -### %s 2>&1 | FileCheck -check-prefix=CHECK_DYNAMIC %s
@@ -21,5 +21,8 @@
 // RUN: %clang --driver-mode=g++ -v -target i686-pc-windows-gnu -rtlib=platform -### %s 2>&1 | FileCheck -check-prefix=CHECK_DYNAMIC %s
 // RUN: %clang -shared --driver-mode=g++ -v -target i686-pc-windows-gnu -rtlib=platform -### %s 2>&1 | FileCheck -check-prefix=CHECK_DYNAMIC %s
 
+// CHECK_SHARED: "--shared"
+// CHECK_BSTATIC: "-Bstatic"
+// CHECK_BDYNAMIC: "-Bdynamic"
 // CHECK_STATIC: "-lgcc" "-lgcc_eh"
 // CHECK_DYNAMIC: "-lgcc_s" "-lgcc"
diff --git a/test/Driver/mips-features.c b/test/Driver/mips-features.c
index a9db0f101700..d9bde7ded6f0 100644
--- a/test/Driver/mips-features.c
+++ b/test/Driver/mips-features.c
@@ -402,3 +402,9 @@
 // RUN: %clang -target -mips-mti-linux-gnu -### -c %s -mno-branch-likely 2>&1 \
 // RUN:   | FileCheck --check-prefix=NO-BRANCH-LIKELY %s
 // NO-BRANCH-LIKELY: argument unused during compilation: '-mno-branch-likely'
+
+// -mindirect-jump=hazard
+// RUN: %clang -target mips-unknown-linux-gnu -### -c %s \
+// RUN:        -mindirect-jump=hazard 2>&1 \
+// RUN:   | FileCheck --check-prefix=INDIRECT-BH %s
+// INDIRECT-BH: "-target-feature" "+use-indirect-jump-hazard"
diff --git a/test/Driver/mips-indirect-branch.c b/test/Driver/mips-indirect-branch.c
new file mode 100644
index 000000000000..64e85d5dc5a1
--- /dev/null
+++ b/test/Driver/mips-indirect-branch.c
@@ -0,0 +1,23 @@
+// REQUIRES: mips-registered-target
+// -mindirect-jump=hazard -mips32
+// RUN: %clang -target mips-unknown-linux-gnu -mips32 -### -c %s \
+// RUN:        -mindirect-jump=hazard 2>&1 | FileCheck %s --check-prefix=MIPS32
+// MIPS32: error: '-mindirect-jump=hazard' is unsupported with the 'mips32' architecture
+
+// -mindirect-jump=hazard -mmicromips
+// RUN: %clang -target mips-unknown-linux-gnu -mmicromips -### -c %s \
+// RUN:        -mindirect-jump=hazard 2>&1 | FileCheck %s --check-prefix=MICROMIPS
+// MICROMIPS: error: '-mindirect-jump=hazard' is unsupported with the 'micromips' architecture
+
+// -mindirect-jump=hazard -mips16
+// RUN: %clang -target mips-unknown-linux-gnu -mips16 -### -c %s \
+// RUN:        -mindirect-jump=hazard 2>&1 | FileCheck %s --check-prefix=MIPS16
+// MIPS16: error: '-mindirect-jump=hazard' is unsupported with the 'mips16' architecture
+
+// RUN: %clang -target mips-unknown-linux-gnu  -### -c %s \
+// RUN:        -mindirect-jump=retopline 2>&1 | FileCheck %s --check-prefix=RETOPLINE
+// RETOPLINE: error: unknown '-mindirect-jump=' option 'retopline'
+
+// RUN: %clang -target mips-unknown-linux-gnu  -### -mips32 -c %s \
+// RUN:        -mindirect-jump=retopline 2>&1 | FileCheck %s --check-prefix=MIXED
+// MIXED: error: unknown '-mindirect-jump=' option 'retopline'
diff --git a/test/Driver/windows-cross.c b/test/Driver/windows-cross.c
index 4b52e99cee34..d96b0283a90e 100644
--- a/test/Driver/windows-cross.c
+++ b/test/Driver/windows-cross.c
@@ -3,6 +3,11 @@
 
 // CHECK-BASIC-LIBCXX: armv7-windows-itanium-ld" "--sysroot={{.*}}/Inputs/Windows/ARM/8.1" "-m" "thumb2pe" "-Bdynamic" "--entry" "mainCRTStartup" "--allow-multiple-definition" "-o" "{{[^"]*}}" "{{[^"]*}}.o" "-lmsvcrt"
 
+// RUN: %clang -### -target armv7-windows-itanium --sysroot %S/Inputs/Windows/ARM/8.1 -B %S/Inputs/Windows/ARM/8.1/usr/bin -fuse-ld=ld -stdlib=libstdc++ -rtlib=compiler-rt -static -o /dev/null %s 2>&1 \
+// RUN:   | FileCheck %s --check-prefix CHECK-STATIC
+
+// CHECK-STATIC: armv7-windows-itanium-ld" "--sysroot={{.*}}/Inputs/Windows/ARM/8.1" "-m" "thumb2pe" "-Bstatic" "--entry" "mainCRTStartup" "--allow-multiple-definition" "-o" "{{[^"]*}}" "{{[^"]*}}.o" "-lmsvcrt"
+
 // RUN: %clang -### -target armv7-windows-itanium --sysroot %s/Inputs/Windows/ARM/8.1 -B %S/Inputs/Windows/ARM/8.1/usr/bin -fuse-ld=ld -rtlib=compiler-rt -stdlib=libstdc++ -o /dev/null %s 2>&1 \
 // RUN:   | FileCheck %s --check-prefix CHECK-RTLIB
 
@@ -23,6 +28,11 @@
 
 // CHECK-SHARED: armv7-windows-itanium-ld" "--sysroot={{.*}}/Inputs/Windows/ARM/8.1" "-m" "thumb2pe" "-shared" "-Bdynamic" "--enable-auto-image-base" "--entry" "_DllMainCRTStartup" "--allow-multiple-definition" "-o" "shared.dll" "--out-implib" "shared.lib" "{{.*}}.o" "-lmsvcrt" "{{.*[\\/]}}clang_rt.builtins-arm.lib"
 
+// RUN: %clang -### -target armv7-windows-itanium --sysroot %S/Inputs/Windows/ARM/8.1 -B %S/Inputs/Windows/ARM/8.1/usr/bin -fuse-ld=ld -shared -rtlib=compiler-rt -stdlib=libc++ -static -o shared.dll %s 2>&1 \
+// RUN:   | FileCheck %s --check-prefix CHECK-SHARED-STATIC
+
+// CHECK-SHARED-STATIC: armv7-windows-itanium-ld" "--sysroot={{.*}}/Inputs/Windows/ARM/8.1" "-m" "thumb2pe" "-shared" "-Bstatic" "--enable-auto-image-base" "--entry" "_DllMainCRTStartup" "--allow-multiple-definition" "-o" "shared.dll" "--out-implib" "shared.lib" "{{.*}}.o" "-lmsvcrt" "{{.*[\\/]}}clang_rt.builtins-arm.lib"
+
 // RUN: %clang -### -target armv7-windows-itanium --sysroot %s/Inputs/Windows/ARM/8.1 -B %S/Inputs/Windows/ARM/8.1/usr/bin -fuse-ld=ld -shared -rtlib=compiler-rt -stdlib=libc++ -nostartfiles -o shared.dll %s 2>&1 \
 // RUN:   | FileCheck %s --check-prefix CHECK-NOSTARTFILES
 
diff --git a/test/Index/Inputs/reparse-issue.h b/test/Index/Inputs/reparse-issue.h
new file mode 100644
index 000000000000..79f1d88a7fc3
--- /dev/null
+++ b/test/Index/Inputs/reparse-issue.h
@@ -0,0 +1,3 @@
+
+asdf;
+
diff --git a/test/Index/Inputs/reparse-issue.h-0 b/test/Index/Inputs/reparse-issue.h-0
new file mode 100644
index 000000000000..f004abf1f5f0
--- /dev/null
+++ b/test/Index/Inputs/reparse-issue.h-0
@@ -0,0 +1,4 @@
+//
+//
+asdf;
+
diff --git a/test/Index/Inputs/reparse-issue.h-1 b/test/Index/Inputs/reparse-issue.h-1
new file mode 100644
index 000000000000..9f9dde858d47
--- /dev/null
+++ b/test/Index/Inputs/reparse-issue.h-1
@@ -0,0 +1,5 @@
+//
+//
+//
+asdf;
+
diff --git a/test/Index/reparsed-live-issue.cpp b/test/Index/reparsed-live-issue.cpp
new file mode 100644
index 000000000000..56423de0b72a
--- /dev/null
+++ b/test/Index/reparsed-live-issue.cpp
@@ -0,0 +1,4 @@
+// RUN: env CINDEXTEST_EDITING=1 LIBCLANG_DISABLE_CRASH_RECOVERY=1 c-index-test -test-load-source-reparse 2 none -remap-file-0=%S/Inputs/reparse-issue.h,%S/Inputs/reparse-issue.h-0 -remap-file-1=%S/Inputs/reparse-issue.h,%S/Inputs/reparse-issue.h-1 -- %s 2>&1 | FileCheck %s
+#include "Inputs/reparse-issue.h"
+
+// CHECK: reparse-issue.h:4:1:{1:1-1:1}: error: C++ requires a type specifier for all declarations
diff --git a/test/SemaCXX/constant-expression-cxx11.cpp b/test/SemaCXX/constant-expression-cxx11.cpp
index 51dd6199e63a..fe4c54e7e6f2 100644
--- a/test/SemaCXX/constant-expression-cxx11.cpp
+++ b/test/SemaCXX/constant-expression-cxx11.cpp
@@ -629,6 +629,10 @@ namespace ArrayOfUnknownBound {
 
   extern const int carr[]; // expected-note {{here}}
   constexpr int n = carr[0]; // expected-error {{constant}} expected-note {{non-constexpr variable}}
+
+  constexpr int local_extern[] = {1, 2, 3};
+  void f() { extern const int local_extern[]; }
+  static_assert(local_extern[1] == 2, "");
 }
 
 namespace DependentValues {
diff --git a/test/SemaCXX/warn-missing-variable-declarations.cpp b/test/SemaCXX/warn-missing-variable-declarations.cpp
index 5b882845f3c6..5b71f38c811f 100644
--- a/test/SemaCXX/warn-missing-variable-declarations.cpp
+++ b/test/SemaCXX/warn-missing-variable-declarations.cpp
@@ -1,4 +1,4 @@
-// RUN: %clang -Wmissing-variable-declarations -fsyntax-only -Xclang -verify %s
+// RUN: %clang -Wmissing-variable-declarations -fsyntax-only -Xclang -verify -std=c++17 %s
 
 // Variable declarations that should trigger a warning.
 int vbad1; // expected-warning{{no previous extern declaration for non-static variable 'vbad1'}}
@@ -52,3 +52,24 @@ class C {
 namespace {
   int vgood4;
 }
+
+inline int inline_var = 0;
+const int const_var = 0;
+constexpr int constexpr_var = 0;
+inline constexpr int inline_constexpr_var = 0;
+extern const int extern_const_var = 0; // expected-warning {{no previous extern declaration}}
+extern constexpr int extern_constexpr_var = 0; // expected-warning {{no previous extern declaration}}
+
+template<typename> int var_template = 0;
+template<typename> constexpr int const_var_template = 0;
+template<typename> static int static_var_template = 0;
+
+template int var_template<int[1]>;
+int use_var_template() { return var_template<int[2]>; }
+template int var_template<int[3]>;
+extern template int var_template<int[4]>;
+template<> int var_template<int[5]>; // expected-warning {{no previous extern declaration}}
+
+// FIXME: We give this specialization internal linkage rather than inheriting
+// the linkage from the template! We should not warn here.
+template<> int static_var_template<int[5]>; // expected-warning {{no previous extern declaration}}
diff --git a/tools/driver/driver.cpp b/tools/driver/driver.cpp
index fa757da9535c..1b614accb2ce 100644
--- a/tools/driver/driver.cpp
+++ b/tools/driver/driver.cpp
@@ -212,20 +212,21 @@ static void insertTargetAndModeArgs(const ParsedClangName &NameParts,
   // Put target and mode arguments at the start of argument list so that
   // arguments specified in command line could override them. Avoid putting
   // them at index 0, as an option like '-cc1' must remain the first.
-  auto InsertionPoint = ArgVector.begin();
-  if (InsertionPoint != ArgVector.end())
+  int InsertionPoint = 0;
+  if (ArgVector.size() > 0)
     ++InsertionPoint;
 
   if (NameParts.DriverMode) {
     // Add the mode flag to the arguments.
-    ArgVector.insert(InsertionPoint,
+    ArgVector.insert(ArgVector.begin() + InsertionPoint,
                      GetStableCStr(SavedStrings, NameParts.DriverMode));
   }
 
   if (NameParts.TargetIsValid) {
     const char *arr[] = {"-target", GetStableCStr(SavedStrings,
                                                   NameParts.TargetPrefix)};
-    ArgVector.insert(InsertionPoint, std::begin(arr), std::end(arr));
+    ArgVector.insert(ArgVector.begin() + InsertionPoint,
+                     std::begin(arr), std::end(arr));
   }
 }