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authorWarner Losh <imp@FreeBSD.org>2014-08-31 04:55:32 +0000
committerWarner Losh <imp@FreeBSD.org>2014-08-31 04:55:32 +0000
commit081ea6e2ce3778c71b9db86f0af1900ecfc266d6 (patch)
tree0da5ffd36c6ff57306e2c5ea07051924f2a35a35 /Bindings/arm/cpu-enable-method/marvell,berlin-smp
parentd1ca9b39dc9ec58a6b6169a48e5b229a33debaf0 (diff)
downloadsrc-081ea6e2ce3778c71b9db86f0af1900ecfc266d6.tar.gz
src-081ea6e2ce3778c71b9db86f0af1900ecfc266d6.zip
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+========================================================
+Secondary CPU enable-method "marvell,berlin-smp" binding
+========================================================
+
+This document describes the "marvell,berlin-smp" method for enabling secondary
+CPUs. To apply to all CPUs, a single "marvell,berlin-smp" enable method should
+be defined in the "cpus" node.
+
+Enable method name: "marvell,berlin-smp"
+Compatible machines: "marvell,berlin2" and "marvell,berlin2q"
+Compatible CPUs: "marvell,pj4b" and "arm,cortex-a9"
+Related properties: (none)
+
+Note:
+This enable method needs valid nodes compatible with "arm,cortex-a9-scu" and
+"marvell,berlin-cpu-ctrl"[1].
+
+Example:
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ enable-method = "marvell,berlin-smp";
+
+ cpu@0 {
+ compatible = "marvell,pj4b";
+ device_type = "cpu";
+ next-level-cache = <&l2>;
+ reg = <0>;
+ };
+
+ cpu@1 {
+ compatible = "marvell,pj4b";
+ device_type = "cpu";
+ next-level-cache = <&l2>;
+ reg = <1>;
+ };
+ };
+
+--
+[1] arm/marvell,berlin.txt