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author | Emmanuel Vadot <manu@FreeBSD.org> | 2022-08-10 12:20:33 +0000 |
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committer | Emmanuel Vadot <manu@FreeBSD.org> | 2022-08-10 12:20:33 +0000 |
commit | 1769b8f3a9ff2d1e1505e0a66027a5493fe30c52 (patch) | |
tree | 56e04d73df09c086eeaa7c56b4b38984c1f1d420 /Bindings/clock/qcom,gcc-sm6350.yaml | |
parent | 17bac45f172c86f09a59b2aca99646ab17f7a606 (diff) | |
download | src-1769b8f3a9ff2d1e1505e0a66027a5493fe30c52.tar.gz src-1769b8f3a9ff2d1e1505e0a66027a5493fe30c52.zip |
Diffstat (limited to 'Bindings/clock/qcom,gcc-sm6350.yaml')
-rw-r--r-- | Bindings/clock/qcom,gcc-sm6350.yaml | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/Bindings/clock/qcom,gcc-sm6350.yaml b/Bindings/clock/qcom,gcc-sm6350.yaml new file mode 100644 index 000000000000..20926cd8293e --- /dev/null +++ b/Bindings/clock/qcom,gcc-sm6350.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,gcc-sm6350.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Global Clock & Reset Controller Binding for SM6350 + +maintainers: + - Konrad Dybcio <konrad.dybcio@somainline.org> + +description: | + Qualcomm global clock control module which supports the clocks, resets and + power domains on SM6350. + + See also: + - dt-bindings/clock/qcom,gcc-sm6350.h + +properties: + compatible: + const: qcom,gcc-sm6350 + + clocks: + items: + - description: Board XO source + - description: Board active XO source + - description: Sleep clock source + + clock-names: + items: + - const: bi_tcxo + - const: bi_tcxo_ao + - const: sleep_clk + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + + '#power-domain-cells': + const: 1 + + reg: + maxItems: 1 + + protected-clocks: + description: + Protected clock specifier list as per common clock binding. + +required: + - compatible + - clocks + - clock-names + - reg + - '#clock-cells' + - '#reset-cells' + - '#power-domain-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,rpmh.h> + clock-controller@100000 { + compatible = "qcom,gcc-sm6350"; + reg = <0x00100000 0x1f0000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&rpmhcc RPMH_CXO_CLK_A>, + <&sleep_clk>; + clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; +... |