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authorEmmanuel Vadot <manu@FreeBSD.org>2021-01-14 15:25:07 +0000
committerEmmanuel Vadot <manu@FreeBSD.org>2021-01-14 15:25:07 +0000
commit5ee353c36d3c9c7f63df7c7671875e73fba70958 (patch)
tree77f0dc489fc4baaf2bab03da6d182a7339bc1297 /Bindings/clock/rockchip,rk3288-cru.txt
parent2554fe8f89383d8dedd834b46a9f616a277f8af4 (diff)
downloadsrc-5ee353c36d3c9c7f63df7c7671875e73fba70958.tar.gz
src-5ee353c36d3c9c7f63df7c7671875e73fba70958.zip
Diffstat (limited to 'Bindings/clock/rockchip,rk3288-cru.txt')
-rw-r--r--Bindings/clock/rockchip,rk3288-cru.txt8
1 files changed, 7 insertions, 1 deletions
diff --git a/Bindings/clock/rockchip,rk3288-cru.txt b/Bindings/clock/rockchip,rk3288-cru.txt
index 8cb47c39ba53..bf3a9ec19241 100644
--- a/Bindings/clock/rockchip,rk3288-cru.txt
+++ b/Bindings/clock/rockchip,rk3288-cru.txt
@@ -4,9 +4,15 @@ The RK3288 clock controller generates and supplies clock to various
controllers within the SoC and also implements a reset controller for SoC
peripherals.
+A revision of this SoC is available: rk3288w. The clock tree is a bit
+different so another dt-compatible is available. Noticed that it is only
+setting the difference but there is no automatic revision detection. This
+should be performed by bootloaders.
+
Required Properties:
-- compatible: should be "rockchip,rk3288-cru"
+- compatible: should be "rockchip,rk3288-cru" or "rockchip,rk3288w-cru" in
+ case of this revision of Rockchip rk3288.
- reg: physical base address of the controller and length of memory mapped
region.
- #clock-cells: should be 1.