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| author | Emmanuel Vadot <manu@FreeBSD.org> | 2020-06-05 19:28:32 +0000 |
|---|---|---|
| committer | Emmanuel Vadot <manu@FreeBSD.org> | 2020-06-05 19:28:32 +0000 |
| commit | 5df7ea339a6ba20ce6c2a001807a43a7cc1e9fe8 (patch) | |
| tree | afa0718f88637c22a2d4a25cf54e32b0e701b338 /Bindings/mmc/sdhci-am654.txt | |
| parent | 937eaf8bbdcf7e2cd3231b71940f9221e6857210 (diff) | |
| download | src-5df7ea339a6ba20ce6c2a001807a43a7cc1e9fe8.tar.gz src-5df7ea339a6ba20ce6c2a001807a43a7cc1e9fe8.zip | |
Import DTS files from Linux 5.7vendor/device-tree/5.7
Notes
Notes:
svn path=/vendor/device-tree/dist/; revision=361846
svn path=/vendor/device-tree/5.7/; revision=361847; tag=vendor/device-tree/5.7
Diffstat (limited to 'Bindings/mmc/sdhci-am654.txt')
| -rw-r--r-- | Bindings/mmc/sdhci-am654.txt | 21 |
1 files changed, 19 insertions, 2 deletions
diff --git a/Bindings/mmc/sdhci-am654.txt b/Bindings/mmc/sdhci-am654.txt index 50e87df47971..c6ccecb9ae5a 100644 --- a/Bindings/mmc/sdhci-am654.txt +++ b/Bindings/mmc/sdhci-am654.txt @@ -18,7 +18,20 @@ Required Properties: - clocks: Handles to the clock inputs. - clock-names: Tuple including "clk_xin" and "clk_ahb" - interrupts: Interrupt specifiers - - ti,otap-del-sel: Output Tap Delay select + Output tap delay for each speed mode: + - ti,otap-del-sel-legacy + - ti,otap-del-sel-mmc-hs + - ti,otap-del-sel-sd-hs + - ti,otap-del-sel-sdr12 + - ti,otap-del-sel-sdr25 + - ti,otap-del-sel-sdr50 + - ti,otap-del-sel-sdr104 + - ti,otap-del-sel-ddr50 + - ti,otap-del-sel-ddr52 + - ti,otap-del-sel-hs200 + - ti,otap-del-sel-hs400 + These bindings must be provided otherwise the driver will disable the + corresponding speed mode (i.e. all nodes must provide at least -legacy) Optional Properties (Required for ti,am654-sdhci-5.1 and ti,j721e-sdhci-8bit): - ti,trm-icp: DLL trim select @@ -38,6 +51,10 @@ Example: interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; sdhci-caps-mask = <0x80000007 0x0>; mmc-ddr-1_8v; - ti,otap-del-sel = <0x2>; + ti,otap-del-sel-legacy = <0x0>; + ti,otap-del-sel-mmc-hs = <0x0>; + ti,otap-del-sel-ddr52 = <0x5>; + ti,otap-del-sel-hs200 = <0x5>; + ti,otap-del-sel-hs400 = <0x0>; ti,trm-icp = <0x8>; }; |