diff options
author | Emmanuel Vadot <manu@FreeBSD.org> | 2023-08-09 13:30:20 +0000 |
---|---|---|
committer | Emmanuel Vadot <manu@FreeBSD.org> | 2023-08-09 13:30:20 +0000 |
commit | 4a8223f297bb7dff7a684da702777d7e94d054fe (patch) | |
tree | 5df2cfdd20cb0d0f4a3bd051660d2e4ec4c5a8e6 /Bindings/net | |
parent | c227958a722d6ad4841da8c2545527257ef219e8 (diff) | |
download | src-4a8223f297bb7dff7a684da702777d7e94d054fe.tar.gz src-4a8223f297bb7dff7a684da702777d7e94d054fe.zip |
Diffstat (limited to 'Bindings/net')
38 files changed, 723 insertions, 227 deletions
diff --git a/Bindings/net/amlogic,g12a-mdio-mux.yaml b/Bindings/net/amlogic,g12a-mdio-mux.yaml new file mode 100644 index 000000000000..ec5c038ce6a0 --- /dev/null +++ b/Bindings/net/amlogic,g12a-mdio-mux.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/amlogic,g12a-mdio-mux.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MDIO bus multiplexer/glue of Amlogic G12a SoC family + +description: + This is a special case of a MDIO bus multiplexer. It allows to choose between + the internal mdio bus leading to the embedded 10/100 PHY or the external + MDIO bus. + +maintainers: + - Neil Armstrong <neil.armstrong@linaro.org> + +allOf: + - $ref: mdio-mux.yaml# + +properties: + compatible: + const: amlogic,g12a-mdio-mux + + reg: + maxItems: 1 + + clocks: + items: + - description: peripheral clock + - description: platform crytal + - description: SoC 50MHz MPLL + + clock-names: + items: + - const: pclk + - const: clkin0 + - const: clkin1 + +required: + - compatible + - reg + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + mdio-multiplexer@4c000 { + compatible = "amlogic,g12a-mdio-mux"; + reg = <0x4c000 0xa4>; + clocks = <&clkc_eth_phy>, <&xtal>, <&clkc_mpll>; + clock-names = "pclk", "clkin0", "clkin1"; + mdio-parent-bus = <&mdio0>; + #address-cells = <1>; + #size-cells = <0>; + + mdio@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + mdio@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + ethernet-phy@8 { + compatible = "ethernet-phy-id0180.3301", + "ethernet-phy-ieee802.3-c22"; + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; + reg = <8>; + max-speed = <100>; + }; + }; + }; +... diff --git a/Bindings/net/amlogic,gxl-mdio-mux.yaml b/Bindings/net/amlogic,gxl-mdio-mux.yaml new file mode 100644 index 000000000000..27ae004dbea0 --- /dev/null +++ b/Bindings/net/amlogic,gxl-mdio-mux.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/amlogic,gxl-mdio-mux.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic GXL MDIO bus multiplexer + +maintainers: + - Jerome Brunet <jbrunet@baylibre.com> + +description: + This is a special case of a MDIO bus multiplexer. It allows to choose between + the internal mdio bus leading to the embedded 10/100 PHY or the external + MDIO bus on the Amlogic GXL SoC family. + +allOf: + - $ref: mdio-mux.yaml# + +properties: + compatible: + const: amlogic,gxl-mdio-mux + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: ref + +required: + - compatible + - reg + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + eth_phy_mux: mdio@558 { + compatible = "amlogic,gxl-mdio-mux"; + reg = <0x558 0xc>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&refclk>; + clock-names = "ref"; + mdio-parent-bus = <&mdio0>; + + external_mdio: mdio@0 { + reg = <0x0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + internal_mdio: mdio@1 { + reg = <0x1>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; diff --git a/Bindings/net/asix,ax88796c.yaml b/Bindings/net/asix,ax88796c.yaml index 699ebf452479..164d1ff9e83c 100644 --- a/Bindings/net/asix,ax88796c.yaml +++ b/Bindings/net/asix,ax88796c.yaml @@ -19,6 +19,7 @@ description: | allOf: - $ref: ethernet-controller.yaml# + - $ref: /schemas/spi/spi-peripheral-props.yaml properties: compatible: @@ -39,8 +40,8 @@ properties: it should be marked GPIO_ACTIVE_LOW. maxItems: 1 + controller-data: true local-mac-address: true - mac-address: true required: diff --git a/Bindings/net/can/renesas,rcar-canfd.yaml b/Bindings/net/can/renesas,rcar-canfd.yaml index 1eb98c9a1a26..d3f45d29fa0a 100644 --- a/Bindings/net/can/renesas,rcar-canfd.yaml +++ b/Bindings/net/can/renesas,rcar-canfd.yaml @@ -30,13 +30,17 @@ properties: - items: - enum: + - renesas,r8a779a0-canfd # R-Car V3U + - renesas,r8a779g0-canfd # R-Car V4H + - const: renesas,rcar-gen4-canfd # R-Car Gen4 + + - items: + - enum: - renesas,r9a07g043-canfd # RZ/G2UL and RZ/Five - renesas,r9a07g044-canfd # RZ/G2{L,LC} - renesas,r9a07g054-canfd # RZ/V2L - const: renesas,rzg2l-canfd # RZ/G2L family - - const: renesas,r8a779a0-canfd # R-Car V3U - reg: maxItems: 1 @@ -60,7 +64,7 @@ properties: $ref: /schemas/types.yaml#/definitions/flag description: The controller can operate in either CAN FD only mode (default) or - Classical CAN only mode. The mode is global to both the channels. + Classical CAN only mode. The mode is global to all channels. Specify this property to put the controller in Classical CAN only mode. assigned-clocks: @@ -80,6 +84,10 @@ patternProperties: The controller supports multiple channels and each is represented as a child node. Each channel can be enabled/disabled individually. + properties: + phys: + maxItems: 1 + additionalProperties: false required: @@ -159,7 +167,7 @@ allOf: properties: compatible: contains: - const: renesas,r8a779a0-canfd + const: renesas,rcar-gen4-canfd then: patternProperties: "^channel[2-7]$": false diff --git a/Bindings/net/dsa/arrow,xrs700x.yaml b/Bindings/net/dsa/arrow,xrs700x.yaml index 2a6d126606ca..9565a7402146 100644 --- a/Bindings/net/dsa/arrow,xrs700x.yaml +++ b/Bindings/net/dsa/arrow,xrs700x.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Arrow SpeedChips XRS7000 Series Switch allOf: - - $ref: dsa.yaml# + - $ref: dsa.yaml#/$defs/ethernet-ports maintainers: - George McCollister <george.mccollister@gmail.com> diff --git a/Bindings/net/dsa/brcm,b53.yaml b/Bindings/net/dsa/brcm,b53.yaml index 1219b830b1a4..5bef4128d175 100644 --- a/Bindings/net/dsa/brcm,b53.yaml +++ b/Bindings/net/dsa/brcm,b53.yaml @@ -66,7 +66,7 @@ required: - reg allOf: - - $ref: dsa.yaml# + - $ref: dsa.yaml#/$defs/ethernet-ports - if: properties: compatible: diff --git a/Bindings/net/dsa/brcm,sf2.yaml b/Bindings/net/dsa/brcm,sf2.yaml index d159ac78cec1..eed16e216fb6 100644 --- a/Bindings/net/dsa/brcm,sf2.yaml +++ b/Bindings/net/dsa/brcm,sf2.yaml @@ -85,11 +85,16 @@ properties: ports: type: object - properties: - brcm,use-bcm-hdr: - description: if present, indicates that the switch port has Broadcom - tags enabled (per-packet metadata) - type: boolean + patternProperties: + '^port@[0-9a-f]$': + $ref: dsa-port.yaml# + unevaluatedProperties: false + + properties: + brcm,use-bcm-hdr: + description: if present, indicates that the switch port has Broadcom + tags enabled (per-packet metadata) + type: boolean required: - reg diff --git a/Bindings/net/dsa/dsa-port.yaml b/Bindings/net/dsa/dsa-port.yaml index b173fceb8998..480120469953 100644 --- a/Bindings/net/dsa/dsa-port.yaml +++ b/Bindings/net/dsa/dsa-port.yaml @@ -4,18 +4,19 @@ $id: http://devicetree.org/schemas/net/dsa/dsa-port.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Ethernet Switch port +title: Generic DSA Switch Port maintainers: - Andrew Lunn <andrew@lunn.ch> - Florian Fainelli <f.fainelli@gmail.com> - - Vivien Didelot <vivien.didelot@gmail.com> + - Vladimir Oltean <olteanv@gmail.com> description: - Ethernet switch port Description + A DSA switch port is a component of a switch that manages one MAC, and can + pass Ethernet frames. It can act as a stanadard Ethernet switch port, or have + DSA-specific functionality. -allOf: - - $ref: /schemas/net/ethernet-controller.yaml# +$ref: /schemas/net/ethernet-switch-port.yaml# properties: reg: @@ -58,25 +59,6 @@ properties: - rtl8_4t - seville - phy-handle: true - - phy-mode: true - - fixed-link: true - - mac-address: true - - sfp: true - - managed: true - - rx-internal-delay-ps: true - - tx-internal-delay-ps: true - -required: - - reg - # CPU and DSA ports must have phylink-compatible link descriptions if: oneOf: diff --git a/Bindings/net/dsa/dsa.yaml b/Bindings/net/dsa/dsa.yaml index 5469ae8a4389..8d971813bab6 100644 --- a/Bindings/net/dsa/dsa.yaml +++ b/Bindings/net/dsa/dsa.yaml @@ -9,7 +9,7 @@ title: Ethernet Switch maintainers: - Andrew Lunn <andrew@lunn.ch> - Florian Fainelli <f.fainelli@gmail.com> - - Vivien Didelot <vivien.didelot@gmail.com> + - Vladimir Oltean <olteanv@gmail.com> description: This binding represents Ethernet Switches which have a dedicated CPU @@ -18,10 +18,9 @@ description: select: false -properties: - $nodename: - pattern: "^(ethernet-)?switch(@.*)?$" +$ref: /schemas/net/ethernet-switch.yaml# +properties: dsa,member: minItems: 2 maxItems: 2 @@ -32,30 +31,28 @@ properties: (single device hanging off a CPU port) must not specify this property $ref: /schemas/types.yaml#/definitions/uint32-array -patternProperties: - "^(ethernet-)?ports$": - type: object - properties: - '#address-cells': - const: 1 - '#size-cells': - const: 0 +additionalProperties: true + +$defs: + ethernet-ports: + description: A DSA switch without any extra port properties + $ref: '#/' patternProperties: - "^(ethernet-)?port@[0-9]+$": + "^(ethernet-)?ports$": type: object - description: Ethernet switch ports - - $ref: dsa-port.yaml# - - unevaluatedProperties: false - -oneOf: - - required: - - ports - - required: - - ethernet-ports - -additionalProperties: true + additionalProperties: false + + properties: + '#address-cells': + const: 1 + '#size-cells': + const: 0 + + patternProperties: + "^(ethernet-)?port@[0-9]+$": + description: Ethernet switch ports + $ref: dsa-port.yaml# + unevaluatedProperties: false ... diff --git a/Bindings/net/dsa/hirschmann,hellcreek.yaml b/Bindings/net/dsa/hirschmann,hellcreek.yaml index 447589b01e8e..4021b054f684 100644 --- a/Bindings/net/dsa/hirschmann,hellcreek.yaml +++ b/Bindings/net/dsa/hirschmann,hellcreek.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Hirschmann Hellcreek TSN Switch allOf: - - $ref: dsa.yaml# + - $ref: dsa.yaml#/$defs/ethernet-ports maintainers: - Andrew Lunn <andrew@lunn.ch> diff --git a/Bindings/net/dsa/mediatek,mt7530.yaml b/Bindings/net/dsa/mediatek,mt7530.yaml index f2e9ff3f580b..449ee0735012 100644 --- a/Bindings/net/dsa/mediatek,mt7530.yaml +++ b/Bindings/net/dsa/mediatek,mt7530.yaml @@ -24,56 +24,46 @@ description: | There is only the standalone version of MT7531. - Port 5 on MT7530 has got various ways of configuration. - - For standalone MT7530: + Port 5 on MT7530 has got various ways of configuration: - Port 5 can be used as a CPU port. - - PHY 0 or 4 of the switch can be muxed to connect to the gmac of the SoC - which port 5 is wired to. Usually used for connecting the wan port - directly to the CPU to achieve 2 Gbps routing in total. + - PHY 0 or 4 of the switch can be muxed to gmac5 of the switch. Therefore, + the gmac of the SoC which is wired to port 5 can connect to the PHY. + This is usually used for connecting the wan port directly to the CPU to + achieve 2 Gbps routing in total. - The driver looks up the reg on the ethernet-phy node which the phy-handle - property refers to on the gmac node to mux the specified phy. + The driver looks up the reg on the ethernet-phy node, which the phy-handle + property on the gmac node refers to, to mux the specified phy. The driver requires the gmac of the SoC to have "mediatek,eth-mac" as the - compatible string and the reg must be 1. So, for now, only gmac1 of an + compatible string and the reg must be 1. So, for now, only gmac1 of a MediaTek SoC can benefit this. Banana Pi BPI-R2 suits this. - Check out example 5 for a similar configuration. - - - Port 5 can be wired to an external phy. Port 5 becomes a DSA slave. - Check out example 7 for a similar configuration. - - For multi-chip module MT7530: - - - Port 5 can be used as a CPU port. - - - PHY 0 or 4 of the switch can be muxed to connect to gmac1 of the SoC. - Usually used for connecting the wan port directly to the CPU to achieve 2 - Gbps routing in total. - - The driver looks up the reg on the ethernet-phy node which the phy-handle - property refers to on the gmac node to mux the specified phy. For the MT7621 SoCs, rgmii2 group must be claimed with rgmii2 function. + Check out example 5. - - In case of an external phy wired to gmac1 of the SoC, port 5 must not be - enabled. + - For the multi-chip module MT7530, in case of an external phy wired to + gmac1 of the SoC, port 5 must not be enabled. In case of muxing PHY 0 or 4, the external phy must not be enabled. For the MT7621 SoCs, rgmii2 group must be claimed with rgmii2 function. + Check out example 6. - - Port 5 can be muxed to an external phy. Port 5 becomes a DSA slave. - The external phy must be wired TX to TX to gmac1 of the SoC for this to - work. Ubiquiti EdgeRouter X SFP is wired this way. + - Port 5 can be wired to an external phy. Port 5 becomes a DSA slave. - Muxing PHY 0 or 4 won't work when the external phy is connected TX to TX. + For the multi-chip module MT7530, the external phy must be wired TX to TX + to gmac1 of the SoC for this to work. Ubiquiti EdgeRouter X SFP is wired + this way. + + For the multi-chip module MT7530, muxing PHY 0 or 4 won't work when the + external phy is connected TX to TX. For the MT7621 SoCs, rgmii2 group must be claimed with gpio function. + Check out example 7. properties: @@ -157,9 +147,6 @@ patternProperties: patternProperties: "^(ethernet-)?port@[0-9]+$": type: object - description: Ethernet switch ports - - unevaluatedProperties: false properties: reg: @@ -168,7 +155,6 @@ patternProperties: for user ports. allOf: - - $ref: dsa-port.yaml# - if: required: [ ethernet ] then: @@ -238,7 +224,7 @@ $defs: - sgmii allOf: - - $ref: dsa.yaml# + - $ref: dsa.yaml#/$defs/ethernet-ports - if: required: - mediatek,mcm @@ -605,7 +591,7 @@ examples: label = "lan4"; }; - /* Commented out, phy4 is muxed to gmac1. + /* Commented out, phy4 is connected to gmac1. port@4 { reg = <4>; label = "wan"; diff --git a/Bindings/net/dsa/microchip,ksz.yaml b/Bindings/net/dsa/microchip,ksz.yaml index 4da75b1f9533..a4b53434c85c 100644 --- a/Bindings/net/dsa/microchip,ksz.yaml +++ b/Bindings/net/dsa/microchip,ksz.yaml @@ -11,7 +11,7 @@ maintainers: - Woojung Huh <Woojung.Huh@microchip.com> allOf: - - $ref: dsa.yaml# + - $ref: dsa.yaml#/$defs/ethernet-ports - $ref: /schemas/spi/spi-peripheral-props.yaml# properties: diff --git a/Bindings/net/dsa/microchip,lan937x.yaml b/Bindings/net/dsa/microchip,lan937x.yaml index b34de303966b..8d7e878b84dc 100644 --- a/Bindings/net/dsa/microchip,lan937x.yaml +++ b/Bindings/net/dsa/microchip,lan937x.yaml @@ -10,7 +10,7 @@ maintainers: - UNGLinuxDriver@microchip.com allOf: - - $ref: dsa.yaml# + - $ref: dsa.yaml#/$defs/ethernet-ports properties: compatible: diff --git a/Bindings/net/dsa/mscc,ocelot.yaml b/Bindings/net/dsa/mscc,ocelot.yaml index 347a0e1b3d3f..fe02d05196e4 100644 --- a/Bindings/net/dsa/mscc,ocelot.yaml +++ b/Bindings/net/dsa/mscc,ocelot.yaml @@ -78,7 +78,7 @@ required: - reg allOf: - - $ref: dsa.yaml# + - $ref: dsa.yaml#/$defs/ethernet-ports - if: properties: compatible: diff --git a/Bindings/net/dsa/nxp,sja1105.yaml b/Bindings/net/dsa/nxp,sja1105.yaml index df98a16e4e75..9a64ed658745 100644 --- a/Bindings/net/dsa/nxp,sja1105.yaml +++ b/Bindings/net/dsa/nxp,sja1105.yaml @@ -13,7 +13,7 @@ description: depends on the SPI bus master driver. allOf: - - $ref: "dsa.yaml#" + - $ref: dsa.yaml#/$defs/ethernet-ports - $ref: /schemas/spi/spi-peripheral-props.yaml# maintainers: diff --git a/Bindings/net/dsa/qca8k.yaml b/Bindings/net/dsa/qca8k.yaml index 978162df51f7..389892592aac 100644 --- a/Bindings/net/dsa/qca8k.yaml +++ b/Bindings/net/dsa/qca8k.yaml @@ -66,15 +66,11 @@ properties: With the legacy mapping the reg corresponding to the internal mdio is the switch reg with an offset of -1. +$ref: "dsa.yaml#" + patternProperties: "^(ethernet-)?ports$": type: object - properties: - '#address-cells': - const: 1 - '#size-cells': - const: 0 - patternProperties: "^(ethernet-)?port@[0-6]$": type: object @@ -116,7 +112,7 @@ required: - compatible - reg -additionalProperties: true +unevaluatedProperties: false examples: - | @@ -148,8 +144,6 @@ examples: switch@10 { compatible = "qca,qca8337"; - #address-cells = <1>; - #size-cells = <0>; reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>; reg = <0x10>; @@ -209,8 +203,6 @@ examples: switch@10 { compatible = "qca,qca8337"; - #address-cells = <1>; - #size-cells = <0>; reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>; reg = <0x10>; diff --git a/Bindings/net/dsa/realtek.yaml b/Bindings/net/dsa/realtek.yaml index 1a7d45a8ad66..cfd69c2604ea 100644 --- a/Bindings/net/dsa/realtek.yaml +++ b/Bindings/net/dsa/realtek.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Realtek switches for unmanaged switches allOf: - - $ref: dsa.yaml# + - $ref: dsa.yaml#/$defs/ethernet-ports maintainers: - Linus Walleij <linus.walleij@linaro.org> diff --git a/Bindings/net/dsa/renesas,rzn1-a5psw.yaml b/Bindings/net/dsa/renesas,rzn1-a5psw.yaml index 0a0d62b6c00e..833d2f68daa1 100644 --- a/Bindings/net/dsa/renesas,rzn1-a5psw.yaml +++ b/Bindings/net/dsa/renesas,rzn1-a5psw.yaml @@ -14,7 +14,7 @@ description: | handles 4 ports + 1 CPU management port. allOf: - - $ref: dsa.yaml# + - $ref: dsa.yaml#/$defs/ethernet-ports properties: compatible: diff --git a/Bindings/net/ethernet-switch-port.yaml b/Bindings/net/ethernet-switch-port.yaml new file mode 100644 index 000000000000..d5cf7e40e3c3 --- /dev/null +++ b/Bindings/net/ethernet-switch-port.yaml @@ -0,0 +1,26 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/ethernet-switch-port.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Generic Ethernet Switch Port + +maintainers: + - Andrew Lunn <andrew@lunn.ch> + - Florian Fainelli <f.fainelli@gmail.com> + - Vladimir Oltean <olteanv@gmail.com> + +description: + An Ethernet switch port is a component of a switch that manages one MAC, and + can pass Ethernet frames. + +$ref: ethernet-controller.yaml# + +properties: + reg: + description: Port number + +additionalProperties: true + +... diff --git a/Bindings/net/ethernet-switch.yaml b/Bindings/net/ethernet-switch.yaml new file mode 100644 index 000000000000..a04f8ef744aa --- /dev/null +++ b/Bindings/net/ethernet-switch.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/ethernet-switch.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Generic Ethernet Switch + +maintainers: + - Andrew Lunn <andrew@lunn.ch> + - Florian Fainelli <f.fainelli@gmail.com> + - Vladimir Oltean <olteanv@gmail.com> + +description: + Ethernet switches are multi-port Ethernet controllers. Each port has + its own number and is represented as its own Ethernet controller. + The minimum required functionality is to pass packets to software. + They may or may not be able to forward packets automonously between + ports. + +select: false + +properties: + $nodename: + pattern: "^(ethernet-)?switch(@.*)?$" + +patternProperties: + "^(ethernet-)?ports$": + type: object + unevaluatedProperties: false + + properties: + '#address-cells': + const: 1 + '#size-cells': + const: 0 + + patternProperties: + "^(ethernet-)?port@[0-9]+$": + type: object + description: Ethernet switch ports + +oneOf: + - required: + - ports + - required: + - ethernet-ports + +additionalProperties: true + +$defs: + base: + description: An ethernet switch without any extra port properties + $ref: '#/' + + patternProperties: + "^(ethernet-)?port@[0-9]+$": + description: Ethernet switch ports + $ref: ethernet-switch-port.yaml# + unevaluatedProperties: false + +... diff --git a/Bindings/net/fsl,fec.yaml b/Bindings/net/fsl,fec.yaml index 77e5f32cb62f..e6f2045f05de 100644 --- a/Bindings/net/fsl,fec.yaml +++ b/Bindings/net/fsl,fec.yaml @@ -51,6 +51,7 @@ properties: - fsl,imx8mm-fec - fsl,imx8mn-fec - fsl,imx8mp-fec + - fsl,imx93-fec - const: fsl,imx8mq-fec - const: fsl,imx6sx-fec - items: diff --git a/Bindings/net/maxlinear,gpy2xx.yaml b/Bindings/net/maxlinear,gpy2xx.yaml new file mode 100644 index 000000000000..d71fa9de2b64 --- /dev/null +++ b/Bindings/net/maxlinear,gpy2xx.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/maxlinear,gpy2xx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MaxLinear GPY2xx PHY + +maintainers: + - Andrew Lunn <andrew@lunn.ch> + - Michael Walle <michael@walle.cc> + +allOf: + - $ref: ethernet-phy.yaml# + +properties: + maxlinear,use-broken-interrupts: + description: | + Interrupts are broken on some GPY2xx PHYs in that they keep the + interrupt line asserted even after the interrupt status register is + cleared. Thus it is blocking the interrupt line which is usually bad + for shared lines. By default interrupts are disabled for this PHY and + polling mode is used. If one can live with the consequences, this + property can be used to enable interrupt handling. + + Affected PHYs (as far as known) are GPY215B and GPY215C. + type: boolean + +dependencies: + maxlinear,use-broken-interrupts: [ interrupts ] + +unevaluatedProperties: false + +examples: + - | + ethernet { + #address-cells = <1>; + #size-cells = <0>; + + ethernet-phy@0 { + reg = <0>; + interrupts-extended = <&intc 0>; + maxlinear,use-broken-interrupts; + }; + }; + +... diff --git a/Bindings/net/micrel-ksz90x1.txt b/Bindings/net/micrel-ksz90x1.txt index df9e844dd6bc..2681168777a1 100644 --- a/Bindings/net/micrel-ksz90x1.txt +++ b/Bindings/net/micrel-ksz90x1.txt @@ -158,6 +158,7 @@ KSZ9031: no link will be established. KSZ9131: +LAN8841: All skew control options are specified in picoseconds. The increment step is 100ps. Unlike KSZ9031, the values represent picoseccond delays. diff --git a/Bindings/net/motorcomm,yt8xxx.yaml b/Bindings/net/motorcomm,yt8xxx.yaml new file mode 100644 index 000000000000..157e3bbcaf6f --- /dev/null +++ b/Bindings/net/motorcomm,yt8xxx.yaml @@ -0,0 +1,117 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/motorcomm,yt8xxx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MotorComm yt8xxx Ethernet PHY + +maintainers: + - Frank Sae <frank.sae@motor-comm.com> + +allOf: + - $ref: ethernet-phy.yaml# + +properties: + compatible: + enum: + - ethernet-phy-id4f51.e91a + - ethernet-phy-id4f51.e91b + + rx-internal-delay-ps: + description: | + RGMII RX Clock Delay used only when PHY operates in RGMII mode with + internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds. + enum: [ 0, 150, 300, 450, 600, 750, 900, 1050, 1200, 1350, 1500, 1650, + 1800, 1900, 1950, 2050, 2100, 2200, 2250, 2350, 2500, 2650, 2800, + 2950, 3100, 3250, 3400, 3550, 3700, 3850, 4000, 4150 ] + default: 1950 + + tx-internal-delay-ps: + description: | + RGMII TX Clock Delay used only when PHY operates in RGMII mode with + internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds. + enum: [ 0, 150, 300, 450, 600, 750, 900, 1050, 1200, 1350, 1500, 1650, 1800, + 1950, 2100, 2250 ] + default: 1950 + + motorcomm,clk-out-frequency-hz: + description: clock output on clock output pin. + enum: [0, 25000000, 125000000] + default: 0 + + motorcomm,keep-pll-enabled: + description: | + If set, keep the PLL enabled even if there is no link. Useful if you + want to use the clock output without an ethernet link. + type: boolean + + motorcomm,auto-sleep-disabled: + description: | + If set, PHY will not enter sleep mode and close AFE after unplug cable + for a timer. + type: boolean + + motorcomm,tx-clk-adj-enabled: + description: | + This configuration is mainly to adapt to VF2 with JH7110 SoC. + Useful if you want to use tx-clk-xxxx-inverted to adj the delay of tx clk. + type: boolean + + motorcomm,tx-clk-10-inverted: + description: | + Use original or inverted RGMII Transmit PHY Clock to drive the RGMII + Transmit PHY Clock delay train configuration when speed is 10Mbps. + type: boolean + + motorcomm,tx-clk-100-inverted: + description: | + Use original or inverted RGMII Transmit PHY Clock to drive the RGMII + Transmit PHY Clock delay train configuration when speed is 100Mbps. + type: boolean + + motorcomm,tx-clk-1000-inverted: + description: | + Use original or inverted RGMII Transmit PHY Clock to drive the RGMII + Transmit PHY Clock delay train configuration when speed is 1000Mbps. + type: boolean + +unevaluatedProperties: false + +examples: + - | + mdio { + #address-cells = <1>; + #size-cells = <0>; + phy-mode = "rgmii-id"; + ethernet-phy@4 { + /* Only needed to make DT lint tools work. Do not copy/paste + * into real DTS files. + */ + compatible = "ethernet-phy-id4f51.e91a"; + + reg = <4>; + rx-internal-delay-ps = <2100>; + tx-internal-delay-ps = <150>; + motorcomm,clk-out-frequency-hz = <0>; + motorcomm,keep-pll-enabled; + motorcomm,auto-sleep-disabled; + }; + }; + - | + mdio { + #address-cells = <1>; + #size-cells = <0>; + phy-mode = "rgmii"; + ethernet-phy@5 { + /* Only needed to make DT lint tools work. Do not copy/paste + * into real DTS files. + */ + compatible = "ethernet-phy-id4f51.e91a"; + + reg = <5>; + motorcomm,clk-out-frequency-hz = <125000000>; + motorcomm,keep-pll-enabled; + motorcomm,auto-sleep-disabled; + }; + }; diff --git a/Bindings/net/mscc,vsc7514-switch.yaml b/Bindings/net/mscc,vsc7514-switch.yaml index ee0a504bdb24..8ee2c7d7ff42 100644 --- a/Bindings/net/mscc,vsc7514-switch.yaml +++ b/Bindings/net/mscc,vsc7514-switch.yaml @@ -18,14 +18,52 @@ description: | packets using CPU. Additionally, PTP is supported as well as FDMA for faster packet extraction/injection. -properties: - $nodename: - pattern: "^switch@[0-9a-f]+$" +allOf: + - if: + properties: + compatible: + const: mscc,vsc7514-switch + then: + $ref: ethernet-switch.yaml# + required: + - interrupts + - interrupt-names + properties: + reg: + minItems: 21 + reg-names: + minItems: 21 + ethernet-ports: + patternProperties: + "^port@[0-9a-f]+$": + $ref: ethernet-switch-port.yaml# + unevaluatedProperties: false + + - if: + properties: + compatible: + const: mscc,vsc7512-switch + then: + $ref: /schemas/net/dsa/dsa.yaml# + properties: + reg: + maxItems: 20 + reg-names: + maxItems: 20 + ethernet-ports: + patternProperties: + "^port@[0-9a-f]+$": + $ref: /schemas/net/dsa/dsa-port.yaml# + unevaluatedProperties: false +properties: compatible: - const: mscc,vsc7514-switch + enum: + - mscc,vsc7512-switch + - mscc,vsc7514-switch reg: + minItems: 20 items: - description: system target - description: rewriter target @@ -50,6 +88,7 @@ properties: - description: fdma target reg-names: + minItems: 20 items: - const: sys - const: rew @@ -87,59 +126,16 @@ properties: - const: xtr - const: fdma - ethernet-ports: - type: object - - properties: - '#address-cells': - const: 1 - '#size-cells': - const: 0 - - additionalProperties: false - - patternProperties: - "^port@[0-9a-f]+$": - type: object - description: Ethernet ports handled by the switch - - $ref: ethernet-controller.yaml# - - unevaluatedProperties: false - - properties: - reg: - description: Switch port number - - phy-handle: true - - phy-mode: true - - fixed-link: true - - mac-address: true - - required: - - reg - - phy-mode - - oneOf: - - required: - - phy-handle - - required: - - fixed-link - required: - compatible - reg - reg-names - - interrupts - - interrupt-names - ethernet-ports -additionalProperties: false +unevaluatedProperties: false examples: + # VSC7514 (Switchdev) - | switch@1010000 { compatible = "mscc,vsc7514-switch"; @@ -187,5 +183,51 @@ examples: }; }; }; + # VSC7512 (DSA) + - | + ethernet-switch@1{ + compatible = "mscc,vsc7512-switch"; + reg = <0x71010000 0x10000>, + <0x71030000 0x10000>, + <0x71080000 0x100>, + <0x710e0000 0x10000>, + <0x711e0000 0x100>, + <0x711f0000 0x100>, + <0x71200000 0x100>, + <0x71210000 0x100>, + <0x71220000 0x100>, + <0x71230000 0x100>, + <0x71240000 0x100>, + <0x71250000 0x100>, + <0x71260000 0x100>, + <0x71270000 0x100>, + <0x71280000 0x100>, + <0x71800000 0x80000>, + <0x71880000 0x10000>, + <0x71040000 0x10000>, + <0x71050000 0x10000>, + <0x71060000 0x10000>; + reg-names = "sys", "rew", "qs", "ptp", "port0", "port1", + "port2", "port3", "port4", "port5", "port6", + "port7", "port8", "port9", "port10", "qsys", + "ana", "s0", "s1", "s2"; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + ethernet = <&mac_sw>; + phy-handle = <&phy0>; + phy-mode = "internal"; + }; + port@1 { + reg = <1>; + phy-handle = <&phy1>; + phy-mode = "internal"; + }; + }; + }; ... diff --git a/Bindings/net/nxp,dwmac-imx.yaml b/Bindings/net/nxp,dwmac-imx.yaml index 04df496af7e6..63409cbff5ad 100644 --- a/Bindings/net/nxp,dwmac-imx.yaml +++ b/Bindings/net/nxp,dwmac-imx.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/net/nxp,dwmac-imx.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: NXP i.MX8 DWMAC glue layer +title: NXP i.MX8/9 DWMAC glue layer maintainers: - Clark Wang <xiaoning.wang@nxp.com> @@ -19,6 +19,7 @@ select: enum: - nxp,imx8mp-dwmac-eqos - nxp,imx8dxl-dwmac-eqos + - nxp,imx93-dwmac-eqos required: - compatible @@ -32,6 +33,7 @@ properties: - enum: - nxp,imx8mp-dwmac-eqos - nxp,imx8dxl-dwmac-eqos + - nxp,imx93-dwmac-eqos - const: snps,dwmac-5.10a clocks: diff --git a/Bindings/net/rfkill-gpio.yaml b/Bindings/net/rfkill-gpio.yaml new file mode 100644 index 000000000000..9630c8466fac --- /dev/null +++ b/Bindings/net/rfkill-gpio.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/rfkill-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: GPIO controlled rfkill switch + +maintainers: + - Johannes Berg <johannes@sipsolutions.net> + - Philipp Zabel <p.zabel@pengutronix.de> + +properties: + compatible: + const: rfkill-gpio + + label: + description: rfkill switch name, defaults to node name + + radio-type: + description: rfkill radio type + enum: + - bluetooth + - fm + - gps + - nfc + - ultrawideband + - wimax + - wlan + - wwan + + shutdown-gpios: + maxItems: 1 + +required: + - compatible + - radio-type + - shutdown-gpios + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + rfkill { + compatible = "rfkill-gpio"; + label = "rfkill-pcie-wlan"; + radio-type = "wlan"; + shutdown-gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>; + }; diff --git a/Bindings/net/rockchip-dwmac.yaml b/Bindings/net/rockchip-dwmac.yaml index 42fb72b6909d..04936632fcbb 100644 --- a/Bindings/net/rockchip-dwmac.yaml +++ b/Bindings/net/rockchip-dwmac.yaml @@ -49,11 +49,11 @@ properties: - rockchip,rk3368-gmac - rockchip,rk3399-gmac - rockchip,rv1108-gmac - - rockchip,rv1126-gmac - items: - enum: - rockchip,rk3568-gmac - rockchip,rk3588-gmac + - rockchip,rv1126-gmac - const: snps,dwmac-4.20a clocks: diff --git a/Bindings/net/snps,dwmac.yaml b/Bindings/net/snps,dwmac.yaml index e88a86623fce..16b7d2904696 100644 --- a/Bindings/net/snps,dwmac.yaml +++ b/Bindings/net/snps,dwmac.yaml @@ -552,7 +552,7 @@ required: dependencies: snps,reset-active-low: ["snps,reset-gpio"] - snps,reset-delay-us: ["snps,reset-gpio"] + snps,reset-delays-us: ["snps,reset-gpio"] allOf: - $ref: "ethernet-controller.yaml#" diff --git a/Bindings/net/ti,k3-am654-cpsw-nuss.yaml b/Bindings/net/ti,k3-am654-cpsw-nuss.yaml index 821974815dec..900063411a20 100644 --- a/Bindings/net/ti,k3-am654-cpsw-nuss.yaml +++ b/Bindings/net/ti,k3-am654-cpsw-nuss.yaml @@ -57,6 +57,7 @@ properties: - ti,am654-cpsw-nuss - ti,j7200-cpswxg-nuss - ti,j721e-cpsw-nuss + - ti,j721e-cpswxg-nuss - ti,am642-cpsw-nuss reg: @@ -111,7 +112,7 @@ properties: const: 0 patternProperties: - "^port@[1-4]$": + "^port@[1-8]$": type: object description: CPSWxG NUSS external ports @@ -121,7 +122,7 @@ properties: properties: reg: minimum: 1 - maximum: 4 + maximum: 8 description: CPSW port number phys: @@ -186,12 +187,36 @@ allOf: properties: compatible: contains: - const: ti,j7200-cpswxg-nuss + const: ti,j721e-cpswxg-nuss then: properties: ethernet-ports: patternProperties: - "^port@[3-4]$": false + "^port@[5-8]$": false + "^port@[1-4]$": + properties: + reg: + minimum: 1 + maximum: 4 + + - if: + not: + properties: + compatible: + contains: + enum: + - ti,j721e-cpswxg-nuss + - ti,j7200-cpswxg-nuss + then: + properties: + ethernet-ports: + patternProperties: + "^port@[3-8]$": false + "^port@[1-2]$": + properties: + reg: + minimum: 1 + maximum: 2 additionalProperties: false diff --git a/Bindings/net/ti,k3-am654-cpts.yaml b/Bindings/net/ti,k3-am654-cpts.yaml index 6230f576134b..3e910d3b24a0 100644 --- a/Bindings/net/ti,k3-am654-cpts.yaml +++ b/Bindings/net/ti,k3-am654-cpts.yaml @@ -93,6 +93,14 @@ properties: description: Number of timestamp Generator function outputs (TS_GENFx) + ti,pps: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 2 + maxItems: 2 + description: | + The pair of HWx_TS_PUSH input and TS_GENFy output indexes used for + PPS events generation. Platform/board specific. + refclk-mux: type: object additionalProperties: false diff --git a/Bindings/net/wireless/esp,esp8089.yaml b/Bindings/net/wireless/esp,esp8089.yaml index 5557676e9d4b..0ea84d6fe73e 100644 --- a/Bindings/net/wireless/esp,esp8089.yaml +++ b/Bindings/net/wireless/esp,esp8089.yaml @@ -29,15 +29,15 @@ additionalProperties: false examples: - | - mmc { - #address-cells = <1>; - #size-cells = <0>; - - wifi@1 { - compatible = "esp,esp8089"; - reg = <1>; - esp,crystal-26M-en = <2>; - }; - }; + mmc { + #address-cells = <1>; + #size-cells = <0>; + + wifi@1 { + compatible = "esp,esp8089"; + reg = <1>; + esp,crystal-26M-en = <2>; + }; + }; ... diff --git a/Bindings/net/wireless/ieee80211.yaml b/Bindings/net/wireless/ieee80211.yaml index e68ed9423150..d89f7a3f88a7 100644 --- a/Bindings/net/wireless/ieee80211.yaml +++ b/Bindings/net/wireless/ieee80211.yaml @@ -1,6 +1,5 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) # Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. - %YAML 1.2 --- $id: http://devicetree.org/schemas/net/wireless/ieee80211.yaml# diff --git a/Bindings/net/wireless/marvell-8xxx.txt b/Bindings/net/wireless/marvell-8xxx.txt index 9bf9bbac16e2..cdc303caf5f4 100644 --- a/Bindings/net/wireless/marvell-8xxx.txt +++ b/Bindings/net/wireless/marvell-8xxx.txt @@ -1,4 +1,4 @@ -Marvell 8787/8897/8997 (sd8787/sd8897/sd8997/pcie8997) SDIO/PCIE devices +Marvell 8787/8897/8978/8997 (sd8787/sd8897/sd8978/sd8997/pcie8997) SDIO/PCIE devices ------ This node provides properties for controlling the Marvell SDIO/PCIE wireless device. @@ -10,7 +10,9 @@ Required properties: - compatible : should be one of the following: * "marvell,sd8787" * "marvell,sd8897" + * "marvell,sd8978" * "marvell,sd8997" + * "nxp,iw416" * "pci11ab,2b42" * "pci1b4b,2b42" diff --git a/Bindings/net/wireless/mediatek,mt76.yaml b/Bindings/net/wireless/mediatek,mt76.yaml index f0c78f994491..7d526ff53fb7 100644 --- a/Bindings/net/wireless/mediatek,mt76.yaml +++ b/Bindings/net/wireless/mediatek,mt76.yaml @@ -1,6 +1,5 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) # Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. - %YAML 1.2 --- $id: http://devicetree.org/schemas/net/wireless/mediatek,mt76.yaml# diff --git a/Bindings/net/wireless/qcom,ath11k.yaml b/Bindings/net/wireless/qcom,ath11k.yaml index 556eb523606a..7d5f982a3d09 100644 --- a/Bindings/net/wireless/qcom,ath11k.yaml +++ b/Bindings/net/wireless/qcom,ath11k.yaml @@ -1,6 +1,5 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) # Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. - %YAML 1.2 --- $id: http://devicetree.org/schemas/net/wireless/qcom,ath11k.yaml# @@ -21,6 +20,7 @@ properties: - qcom,ipq8074-wifi - qcom,ipq6018-wifi - qcom,wcn6750-wifi + - qcom,ipq5018-wifi reg: maxItems: 1 @@ -262,10 +262,10 @@ allOf: examples: - | - q6v5_wcss: q6v5_wcss@CD00000 { + q6v5_wcss: remoteproc@cd00000 { compatible = "qcom,ipq8074-wcss-pil"; - reg = <0xCD00000 0x4040>, - <0x4AB000 0x20>; + reg = <0xcd00000 0x4040>, + <0x4ab000 0x20>; reg-names = "qdsp6", "rmb"; }; @@ -386,7 +386,7 @@ examples: #address-cells = <2>; #size-cells = <2>; - qcn9074_0: qcn9074_0@51100000 { + qcn9074_0: wifi@51100000 { no-map; reg = <0x0 0x51100000 0x0 0x03500000>; }; @@ -463,6 +463,6 @@ examples: qcom,smem-states = <&wlan_smp2p_out 0>; qcom,smem-state-names = "wlan-smp2p-out"; wifi-firmware { - iommus = <&apps_smmu 0x1c02 0x1>; + iommus = <&apps_smmu 0x1c02 0x1>; }; }; diff --git a/Bindings/net/wireless/silabs,wfx.yaml b/Bindings/net/wireless/silabs,wfx.yaml index 583db5d42226..84e5659e50ef 100644 --- a/Bindings/net/wireless/silabs,wfx.yaml +++ b/Bindings/net/wireless/silabs,wfx.yaml @@ -2,7 +2,6 @@ # Copyright (c) 2020, Silicon Laboratories, Inc. %YAML 1.2 --- - $id: http://devicetree.org/schemas/net/wireless/silabs,wfx.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# diff --git a/Bindings/net/wireless/ti,wlcore.yaml b/Bindings/net/wireless/ti,wlcore.yaml index e31456730e9f..f799a1e52173 100644 --- a/Bindings/net/wireless/ti,wlcore.yaml +++ b/Bindings/net/wireless/ti,wlcore.yaml @@ -90,47 +90,47 @@ examples: // For wl12xx family: spi1 { - #address-cells = <1>; - #size-cells = <0>; - - wlcore1: wlcore@1 { - compatible = "ti,wl1271"; - reg = <1>; - spi-max-frequency = <48000000>; - interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; - vwlan-supply = <&vwlan_fixed>; - clock-xtal; - ref-clock-frequency = <38400000>; - }; + #address-cells = <1>; + #size-cells = <0>; + + wlcore1: wlcore@1 { + compatible = "ti,wl1271"; + reg = <1>; + spi-max-frequency = <48000000>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; + vwlan-supply = <&vwlan_fixed>; + clock-xtal; + ref-clock-frequency = <38400000>; + }; }; // For wl18xx family: spi2 { - #address-cells = <1>; - #size-cells = <0>; - - wlcore2: wlcore@0 { - compatible = "ti,wl1835"; - reg = <0>; - spi-max-frequency = <48000000>; - interrupts = <27 IRQ_TYPE_EDGE_RISING>; - vwlan-supply = <&vwlan_fixed>; - }; + #address-cells = <1>; + #size-cells = <0>; + + wlcore2: wlcore@0 { + compatible = "ti,wl1835"; + reg = <0>; + spi-max-frequency = <48000000>; + interrupts = <27 IRQ_TYPE_EDGE_RISING>; + vwlan-supply = <&vwlan_fixed>; + }; }; // SDIO example: mmc3 { - vmmc-supply = <&wlan_en_reg>; - bus-width = <4>; - cap-power-off-card; - keep-power-in-suspend; - - #address-cells = <1>; - #size-cells = <0>; - - wlcore3: wlcore@2 { - compatible = "ti,wl1835"; - reg = <2>; - interrupts = <19 IRQ_TYPE_LEVEL_HIGH>; - }; + vmmc-supply = <&wlan_en_reg>; + bus-width = <4>; + cap-power-off-card; + keep-power-in-suspend; + + #address-cells = <1>; + #size-cells = <0>; + + wlcore3: wlcore@2 { + compatible = "ti,wl1835"; + reg = <2>; + interrupts = <19 IRQ_TYPE_LEVEL_HIGH>; + }; }; |