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author | Andrew Turner <andrew@FreeBSD.org> | 2016-01-28 20:21:15 +0000 |
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committer | Andrew Turner <andrew@FreeBSD.org> | 2016-01-28 20:21:15 +0000 |
commit | 235ad806ee815395bce54dc1b0ce1c06cd29b44a (patch) | |
tree | 41cbd9055ad0d6dfa04377df1bb51f3c3f3948e2 /Bindings/pwm/imx-pwm.txt | |
parent | da75c2cc5808a45edc76752ba495dcc5dcd4346c (diff) | |
download | src-235ad806ee815395bce54dc1b0ce1c06cd29b44a.tar.gz src-235ad806ee815395bce54dc1b0ce1c06cd29b44a.zip |
Import updated device-tree files from:vendor/device-tree/ianc-afaecb70
git://xenbits.xen.org/people/ianc/device-tree-rebasing.git
@afaecb70e7ebb983c86d5eb45ff952e9af79c462
Notes
Notes:
svn path=/vendor/device-tree/dist/; revision=295011
svn path=/vendor/device-tree/ianc-afaecb70/; revision=295013; tag=vendor/device-tree/ianc-afaecb70
Diffstat (limited to 'Bindings/pwm/imx-pwm.txt')
-rw-r--r-- | Bindings/pwm/imx-pwm.txt | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/Bindings/pwm/imx-pwm.txt b/Bindings/pwm/imx-pwm.txt index b50d7a6d9d7f..e00c2e9f484d 100644 --- a/Bindings/pwm/imx-pwm.txt +++ b/Bindings/pwm/imx-pwm.txt @@ -1,10 +1,17 @@ Freescale i.MX PWM controller Required properties: -- compatible: should be "fsl,<soc>-pwm" +- compatible : should be "fsl,<soc>-pwm" and one of the following + compatible strings: + - "fsl,imx1-pwm" for PWM compatible with the one integrated on i.MX1 + - "fsl,imx27-pwm" for PWM compatible with the one integrated on i.MX27 - reg: physical base address and length of the controller's registers - #pwm-cells: should be 2. See pwm.txt in this directory for a description of the cells format. +- clocks : Clock specifiers for both ipg and per clocks. +- clock-names : Clock names should include both "ipg" and "per" +See the clock consumer binding, + Documentation/devicetree/bindings/clock/clock-bindings.txt - interrupts: The interrupt for the pwm controller Example: @@ -13,5 +20,8 @@ pwm1: pwm@53fb4000 { #pwm-cells = <2>; compatible = "fsl,imx53-pwm", "fsl,imx27-pwm"; reg = <0x53fb4000 0x4000>; + clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>, + <&clks IMX5_CLK_PWM1_HF_GATE>; + clock-names = "ipg", "per"; interrupts = <61>; }; |