diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2022-01-27 22:17:16 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2022-06-04 11:59:19 +0000 |
| commit | 390adc38fc112be360bd15499e5241bf4e675b6f (patch) | |
| tree | 712d68d3aa03f7aa4902ba03dcac2a56f49ae0e5 /contrib/llvm-project/llvm/lib/Target/Mips/MipsMachineFunction.cpp | |
| parent | 8a84287b0edc66fc6dede3db770d10ff41da5464 (diff) | |
Diffstat (limited to 'contrib/llvm-project/llvm/lib/Target/Mips/MipsMachineFunction.cpp')
| -rw-r--r-- | contrib/llvm-project/llvm/lib/Target/Mips/MipsMachineFunction.cpp | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/Mips/MipsMachineFunction.cpp b/contrib/llvm-project/llvm/lib/Target/Mips/MipsMachineFunction.cpp index a7a2be30f58a..411a26e42713 100644 --- a/contrib/llvm-project/llvm/lib/Target/Mips/MipsMachineFunction.cpp +++ b/contrib/llvm-project/llvm/lib/Target/Mips/MipsMachineFunction.cpp @@ -148,14 +148,14 @@ void MipsFunctionInfo::initGlobalBaseReg(MachineFunction &MF) { void MipsFunctionInfo::createEhDataRegsFI(MachineFunction &MF) { const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); - for (int I = 0; I < 4; ++I) { + for (int &I : EhDataRegFI) { const TargetRegisterClass &RC = static_cast<const MipsTargetMachine &>(MF.getTarget()).getABI().IsN64() ? Mips::GPR64RegClass : Mips::GPR32RegClass; - EhDataRegFI[I] = MF.getFrameInfo().CreateStackObject( - TRI.getSpillSize(RC), TRI.getSpillAlign(RC), false); + I = MF.getFrameInfo().CreateStackObject(TRI.getSpillSize(RC), + TRI.getSpillAlign(RC), false); } } @@ -167,9 +167,9 @@ void MipsFunctionInfo::createISRRegFI(MachineFunction &MF) { const TargetRegisterClass &RC = Mips::GPR32RegClass; const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); - for (int I = 0; I < 2; ++I) - ISRDataRegFI[I] = MF.getFrameInfo().CreateStackObject( - TRI.getSpillSize(RC), TRI.getSpillAlign(RC), false); + for (int &I : ISRDataRegFI) + I = MF.getFrameInfo().CreateStackObject(TRI.getSpillSize(RC), + TRI.getSpillAlign(RC), false); } bool MipsFunctionInfo::isEhDataRegFI(int FI) const { |