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author | Andrew Turner <andrew@FreeBSD.org> | 2016-01-28 20:21:15 +0000 |
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committer | Andrew Turner <andrew@FreeBSD.org> | 2016-01-28 20:21:15 +0000 |
commit | 235ad806ee815395bce54dc1b0ce1c06cd29b44a (patch) | |
tree | 41cbd9055ad0d6dfa04377df1bb51f3c3f3948e2 /include/dt-bindings/clock/r8a7790-clock.h | |
parent | da75c2cc5808a45edc76752ba495dcc5dcd4346c (diff) | |
download | src-235ad806ee815395bce54dc1b0ce1c06cd29b44a.tar.gz src-235ad806ee815395bce54dc1b0ce1c06cd29b44a.zip |
Import updated device-tree files from:vendor/device-tree/ianc-afaecb70
git://xenbits.xen.org/people/ianc/device-tree-rebasing.git
@afaecb70e7ebb983c86d5eb45ff952e9af79c462
Notes
Notes:
svn path=/vendor/device-tree/dist/; revision=295011
svn path=/vendor/device-tree/ianc-afaecb70/; revision=295013; tag=vendor/device-tree/ianc-afaecb70
Diffstat (limited to 'include/dt-bindings/clock/r8a7790-clock.h')
-rw-r--r-- | include/dt-bindings/clock/r8a7790-clock.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h index 91940271cf83..7b1ad8922eec 100644 --- a/include/dt-bindings/clock/r8a7790-clock.h +++ b/include/dt-bindings/clock/r8a7790-clock.h @@ -21,6 +21,8 @@ #define R8A7790_CLK_SD0 7 #define R8A7790_CLK_SD1 8 #define R8A7790_CLK_Z 9 +#define R8A7790_CLK_RCAN 10 +#define R8A7790_CLK_ADSP 11 /* MSTP0 */ #define R8A7790_CLK_MSIOF0 0 @@ -77,9 +79,13 @@ #define R8A7790_CLK_USBDMAC0 30 #define R8A7790_CLK_USBDMAC1 31 +/* MSTP4 */ +#define R8A7790_CLK_IRQC 7 + /* MSTP5 */ #define R8A7790_CLK_AUDIO_DMAC1 1 #define R8A7790_CLK_AUDIO_DMAC0 2 +#define R8A7790_CLK_ADSP_MOD 6 #define R8A7790_CLK_THERMAL 22 #define R8A7790_CLK_PWM 23 @@ -102,6 +108,7 @@ #define R8A7790_CLK_VIN2 9 #define R8A7790_CLK_VIN1 10 #define R8A7790_CLK_VIN0 11 +#define R8A7790_CLK_ETHERAVB 12 #define R8A7790_CLK_ETHER 13 #define R8A7790_CLK_SATA1 14 #define R8A7790_CLK_SATA0 15 @@ -137,6 +144,8 @@ #define R8A7790_CLK_SCU_ALL 17 #define R8A7790_CLK_SCU_DVC1 18 #define R8A7790_CLK_SCU_DVC0 19 +#define R8A7790_CLK_SCU_CTU1_MIX1 20 +#define R8A7790_CLK_SCU_CTU0_MIX0 21 #define R8A7790_CLK_SCU_SRC9 22 #define R8A7790_CLK_SCU_SRC8 23 #define R8A7790_CLK_SCU_SRC7 24 |